Conferences related to Electronics Packaging

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2020 19th IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm)

The ITherm Conference series is the leading international venue for scientific and engineering exploration of thermal, thermomechanical, and emerging technology issues associated with electronic devices, packages, and systems.


2020 22nd European Conference on Power Electronics and Applications (EPE'20 ECCE Europe)

Energy conversion and conditioning technologies, power electronics, adjustable speed drives and their applications, power electronics for smarter grid, energy efficiency,technologies for sustainable energy systems, converters and power supplies


2020 57th ACM/ESDA/IEEE Design Automation Conference (DAC)

The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2022 59th ACM/ESDA/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2021 58th ACM/ESDA/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2019 56th ACM/ESDA/IEEE Design Automation Conference (DAC)

    EDA (Electronics Design Automation) is becoming ever more important with the continuous scaling of semiconductor devices and the growing complexities of their use in circuits and systems. Demands for lower-power, higher-reliability and more agile electronic systems raise new challenges to both design and design automation of such systems. For the past five decades, the primary focus of research track at DAC has been to showcase leading-edge research and practice in tools and methodologies for the design of circuits and systems.

  • 2018 55th ACM/ESDA/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2017 54th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2016 53nd ACM/EDAC/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2015 52nd ACM/EDAC/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2014 51st ACM/EDAC/IEEE Design Automation Conference (DAC)

    DAC Description for TMRF The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading

  • 2013 50th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 session on design methodologies and EDA tool developments, keynotes, panels, plus User Track presentations. A diverse worldwide community representing more than 1,000 organization attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2012 49th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The Design Automation Conference (DAC) is the premier event for the design of electronic circuits and systems, and for EDA and silicon solutions. DAC features a wide array of technical presentations plus over 200 of the leading electronics design suppliers

  • 2011 48th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The Design Automation Conference is the world s leading technical conference and tradeshow on electronic design and design automation. DAC is where the IC Design and EDA ecosystem learns, networks, and does business.

  • 2010 47th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The Design Automation Conference (DAC) is the premier event for the design of electronic circuits and systems, and for EDA and silicon solutions. DAC features a wide array of technical presentations plus over 200 of the leading electronics design suppliers.

  • 2009 46th ACM/EDAC/IEEE Design Automation Conference (DAC)

    DAC is the premier event for the electronic design community. DAC offers the industry s most prestigious technical conference in combination with the biggest exhibition, bringing together design, design automation and manufacturing market influencers.

  • 2008 45th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The Design Automation Conference (DAC) is the premier event for the design of electronic circuits and systems, and for EDA and silicon solutions. DAC features a wide array of technical presentations plus over 250 of the leading electronics design suppliers.

  • 2007 44th ACM/IEEE Design Automation Conference (DAC)

    The Design Automation Conference (DAC) is the premier Electronic Design Automation (EDA) and silicon solution event. DAC features over 50 technical sessions covering the latest in design methodologies and EDA tool developments and an Exhibition and Demo Suite area with over 250 of the leading EDA, silicon and IP Providers.

  • 2006 43rd ACM/IEEE Design Automation Conference (DAC)

  • 2005 42nd ACM/IEEE Design Automation Conference (DAC)

  • 2004 41st ACM/IEEE Design Automation Conference (DAC)

  • 2003 40th ACM/IEEE Design Automation Conference (DAC)

  • 2002 39th ACM/IEEE Design Automation Conference (DAC)

  • 2001 38th ACM/IEEE Design Automation Conference (DAC)

  • 2000 37th ACM/IEEE Design Automation Conference (DAC)

  • 1999 36th ACM/IEEE Design Automation Conference (DAC)

  • 1998 35th ACM/IEEE Design Automation Conference (DAC)

  • 1997 34th ACM/IEEE Design Automation Conference (DAC)

  • 1996 33rd ACM/IEEE Design Automation Conference (DAC)


2020 IEEE 70th Electronic Components and Technology Conference (ECTC)

ECTC is the premier international conference sponsored by the IEEE Components, Packaging and Manufacturing Society. ECTC paper comprise a wide spectrum of topics, including 3D packaging, electronic components, materials, assembly, interconnections, device and system packaging, optoelectronics, reliability, and simulation.


2020 IEEE Applied Power Electronics Conference and Exposition (APEC)

APEC focuses on the practical and applied aspects of the power electronics business. Not just a power designer’s conference, APEC has something of interest for anyone involved in power electronics including:- Equipment OEMs that use power supplies and converters in their equipment- Designers of power supplies, dc-dc converters, motor drives, uninterruptable power supplies, inverters and any other power electronic circuits, equipments and systems- Manufacturers and suppliers of components and assemblies used in power electronics- Manufacturing, quality and test engineers involved with power electronics equipment- Marketing, sales and anyone involved in the business of power electronic- Compliance engineers testing and qualifying power electronics equipment or equipment that uses power electronics


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Periodicals related to Electronics Packaging

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Advanced Packaging, IEEE Transactions on

The IEEE Transactions on Advanced Packaging has its focus on the modeling, design, and analysis of advanced electronic, photonic, sensors, and MEMS packaging.


Aerospace and Electronic Systems Magazine, IEEE

The IEEE Aerospace and Electronic Systems Magazine publishes articles concerned with the various aspects of systems for space, air, ocean, or ground environments.


Antennas and Propagation, IEEE Transactions on

Experimental and theoretical advances in antennas including design and development, and in the propagation of electromagnetic waves including scattering, diffraction and interaction with continuous media; and applications pertinent to antennas and propagation, such as remote sensing, applied optics, and millimeter and submillimeter wave techniques.


Circuits and Systems II: Express Briefs, IEEE Transactions on

Part I will now contain regular papers focusing on all matters related to fundamental theory, applications, analog and digital signal processing. Part II will report on the latest significant results across all of these topic areas.


Components and Packaging Technologies, IEEE Transactions on

Component parts, hybrid microelectronics, materials, packaging techniques, and manufacturing technology.


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Most published Xplore authors for Electronics Packaging

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Xplore Articles related to Electronics Packaging

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Electronics Packaging for High Reliable Piezoactuators

2007 9th Electronics Packaging Technology Conference, 2007

The use of electronic systems in automotive applications is characterized by special requirements concerning surrounding conditions, e.g. near the engine or breaks, and reliability demands. More and more piezoceramic sensors and actuators become common in such systems. Especially piezoceramic actuators are characterized by high power, low volume, fast mechanical response to an electrical pulse and a high variety of possible ...


Nano Evaluation in Electronics Packaging

2008 2nd Electronics System-Integration Technology Conference, 2008

The challenge of nano packaging requires new non-destructive evaluation (NDE) techniques to detect and characterize very small defects like transportation phenomenon, Kirkendall voids or micro cracks. Imaging technologies with resolutions in the submicron range are the desire. Possible evaluation methods are for example x-ray microscopy, x-ray tomography, ultrasonic microscopy and thermal microscopy. However, techniques with this resolution can not be ...


Graphene-based heat spreading materials for electronics packaging applications

2017 IMAPS Nordic Conference on Microelectronics Packaging (NordPac), 2017

Graphene-based heat spreading materials, including graphene-based film (GBF) and graphene-based electrically conductive adhesive (G-CA), were applied to electronics packaging. The thermal performances of GBF and G-CA were analyzed by resistance temperature detector (RTD) and thermal infrared imager. When the chip was covered by GBF and G-CA, the temperature of hotspot could be reduced by 3.1°C, at heat flux of 580 ...


A flip-chip power electronics packaging technology on a flexible polymeric substrates

Proceedings of 3rd Electronics Packaging Technology Conference (EPTC 2000) (Cat. No.00EX456), 2000

A power electronics packaging technology with flip-chip attachment on a flexible polymeric substrate was developed. The advantage of the flexible polymeric substrate is its ability to conform to unique geometrical configurations to meet specific ergonomic or space considerations in electronic systems. To further improve its packaging density, a double-sided flexible polymeric substrate was employed. In this demonstration project, a DC-DC ...


Investigations of carbon nanotubes epoxy composites for electronics packaging

2008 58th Electronic Components and Technology Conference, 2008

The part of electronics packaging is steadily forced to adapt the requirements of the microelectronic industry. For future electronics application such needs will be: 1) steady miniaturisation of the electronic devices 2) high pin count up to 5000 i / o per device 3) pitches down to 20 mum 4) higher current density per devices 5) higher thermal dissipation loss ...


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Educational Resources on Electronics Packaging

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IEEE-USA E-Books

  • Electronics Packaging for High Reliable Piezoactuators

    The use of electronic systems in automotive applications is characterized by special requirements concerning surrounding conditions, e.g. near the engine or breaks, and reliability demands. More and more piezoceramic sensors and actuators become common in such systems. Especially piezoceramic actuators are characterized by high power, low volume, fast mechanical response to an electrical pulse and a high variety of possible geometries. One application of such actuators is to drive fuel injection valves in internal combustion engines like diesel engines or petrol engines. The goal of the project group during the past years was the development and evaluation of a safe and reliable connecting and packaging technology for piezoceramic actuators in this field of application. Our paper presents, based on the general demands to the actuators and so to the technologies, the investigations that have been made, the realized tests (reliability test, endurance run), some results of destructive and non-destructive diagnostics (cross sections, X-ray) to assess the interconnections and the general results of the project.

  • Nano Evaluation in Electronics Packaging

    The challenge of nano packaging requires new non-destructive evaluation (NDE) techniques to detect and characterize very small defects like transportation phenomenon, Kirkendall voids or micro cracks. Imaging technologies with resolutions in the submicron range are the desire. Possible evaluation methods are for example x-ray microscopy, x-ray tomography, ultrasonic microscopy and thermal microscopy. However, techniques with this resolution can not be found on the market. The ldquocenter for non-destructive nano evaluation of electronic packagingrdquo (nanoeva<sup>reg</sup>) is taken up to develop this equipment in cooperation with the electronics industry and to transfer the knowledge to colleagues in industries and research institutions. The new center is a common organization of Fraunhofer IZFP-D and the electronics packaging lab with its centre of microtechnical manufacturing (ZmuP) of the Technische Universitat Dresden.

  • Graphene-based heat spreading materials for electronics packaging applications

    Graphene-based heat spreading materials, including graphene-based film (GBF) and graphene-based electrically conductive adhesive (G-CA), were applied to electronics packaging. The thermal performances of GBF and G-CA were analyzed by resistance temperature detector (RTD) and thermal infrared imager. When the chip was covered by GBF and G-CA, the temperature of hotspot could be reduced by 3.1°C, at heat flux of 580 W/cm2. To analyze the thermal performances of G-CA and GBF in 3D electronics packaging, the distribution of temperature and temperature profiles on the top surface of chip were analyzed by COMSOL. Both of GBF and G-CA could obviously reduce the temperature of hotspot on the top surface of chip, compared with that on the bare chip. With G-CA and GBF, the temperature of hotspot could be reduced by 8°C. It suggests that both of G-CA and GBF are good heat spreading materials for electronics packaging application.

  • A flip-chip power electronics packaging technology on a flexible polymeric substrates

    A power electronics packaging technology with flip-chip attachment on a flexible polymeric substrate was developed. The advantage of the flexible polymeric substrate is its ability to conform to unique geometrical configurations to meet specific ergonomic or space considerations in electronic systems. To further improve its packaging density, a double-sided flexible polymeric substrate was employed. In this demonstration project, a DC-DC switching converter was fabricated with the flip-chip power electronics packaging concept on a flexible substrate. This paper discusses the design, fabrication, and testing of a prototype converter, as well as the pros and cons of this type of packaging.

  • Investigations of carbon nanotubes epoxy composites for electronics packaging

    The part of electronics packaging is steadily forced to adapt the requirements of the microelectronic industry. For future electronics application such needs will be: 1) steady miniaturisation of the electronic devices 2) high pin count up to 5000 i / o per device 3) pitches down to 20 mum 4) higher current density per devices 5) higher thermal dissipation loss This is only a small extract of the challenges facing the electronics packaging industry in the future. The aim and duty for electronics packaging is to realize a reliable package for future electronics. Commonplace materials for joining elements like solder are not able to solve these requirements. For example in [1] the authors describe that future IC's operating at high frequencies of 10-28 GHz, signal bandwidths of 20 Gbps and lower supply voltages require an estimated maximum of R (&lt; 10 mOhm), L (&lt;5-10pH) and C (&lt;5-10 fF).[l] Current joining elements can not meet these requirements. To solve these problems the electronics packaging industry researches technologies and materials of the nanotechnology. Especially researches concerning new materials for electronics packaging rise up since the last three years. One of the most researched new materials are Carbon Nanotubes (CNT). Carbon Nanotubes have superior mechanical, electrical and thermal properties. Due to these properties CNT are considered as promising candidates in packaging technology. The most interesting field of application is the use of the Carbon Nanotubes as filler in electrical conductive adhesives. The aim is to improve the performance of conductive adhesives in comparison to common products. This study deals with characterization of carbon nanotube / epoxy adhesives in electronics packaging. For this study we optimize the CNT - adhesive system by modification of the CNT, use of different dispersion technologies and under variation of the epoxy matrix. The resulting adhesives are characterized by measuring their viscosity, mechanical strength and their thermal and electrical conductivity. For all studies Multi Wall Nanotubes were used which can be purchased at a reasonable price. For modification of the CNT they can be treated by low pressure plasma (cvd), UV / ozone treatment or modifiedchemically in solution to achieve a higher polarity resulting in a better dispersibility. Also bonding to the polymer matrix is improved. Success of the processes is studied by XPS and REM. For dispersion technology ultrasonic bath, speed mixing and/or treatment with a roll calander can be used. The polymer matrix is also varied in order to achieve an appropriate viscosity at the CNT-content of interest that enables good results in screen printing. Also CNT-polymer interaction can be adapted by varying polarity of the resin used. The distribution of CNT in the matrix is studied by TEM. The first investigations show that ultrasonic finger is the favourable dispersion technology to achieve well dispersed CNT. For modification of the CNT the plasma treatment came out to be efficient to give appropriate amounts of hydroxyl groups.

  • Study of nanosilver filled conductive adhesives and pastes for electronics packaging

    This research deals with the investigation of novel nanosilver filled conductive adhesives and pastes for application in electronics packaging. Compared to conventional soldering-based interconnection technology, electrical conductive adhesives are believed to have the following advantages: finer pitch capability, lower processing temperature requirements, more environmentally friendly than lead-containing solders. The intention of this research is to investigate the application of silver nanoparticles in conductive adhesives and pastes with an objective to improve the desired properties such as electrical conductivity and mechanical stability. Silver has the highest room temperature electrical and thermal conductivity among all metals. It is expected that adhesives with nanosilver will show higher conductivity due to better sintering and that is why the influence of curing temperature on electrical properties of the adhesives and pastes was also investigated. The dependence of resistivity and curing temperatures was shown. Resistivity was measured and compared for different adhesives and pastes: 1) conventional samples without nanoparticles, 2) mixes which contain both micro- and nanoparticles and 3) only with silver nanoparticles.

  • Nano Packaging - A challenge for Non-destructive Testing

    The challenge of nano packaging requires new non-destructive evaluation (NDE) techniques to detect and characterize very small defects like transportation phenomenon, Kirkendall voids or micro cracks. Imaging technologies with resolutions in the sub-micron range are the desire. Possible evaluation methods are for example x-ray microscopy, x-ray tomography, ultrasonic microscopy and thermal microscopy. However, techniques with the necessary resolution can not be found on the market. The Center for Non-Destructieve Nano Evaluation of Electronic Packaging (nanoeva®) is taken up to develop this equipment in cooperation with the electronics industry and to transfer the knowledge to colleagues in industries and research institutions. The new center is a common organization of Fraunhofer IZFP-D and the Electronics Packaging Lab with its Centre of Microtechnical Manufacturing (Z¿P) of the Technische Universitat Dresden. This paper will focus on the new possibilities of nano x-ray CT and shows first results.

  • Effects of fluid properties on dispensing processes for electronics packaging

    The fluid dispensing process has been widely employed in electronics packaging manufacturing to deliver fluid materials (such as epoxy, encapsulant, adhesive) on substrates or printed circuit boards (PCBs) for the purpose of die attachment, encapsulation, coating, or surface mounting. In this process, the fluid properties such as How behavior, surface tension, and contact angle can have a significant influence on the How rate of the fluid dispensed and the profile of fluid formed on the substrate or PCB, thereby affecting the quality of electronics packaging. At present, massive measurements are always required to characterize the fluid properties by using specific instruments, and the procedure of measuring is time-consuming. This paper presents a method upon which the fluid properties and their influence on the dispensing process can be readily identified from a few measurements of the process. By experiments, this method was proven to be not only cost and time effective but also promising for the investigation into the effects of fluid properties on the dispensing process.

  • Experimental Research on Heat Transfer of Confined Air Jet Impingement with Tiny Size Round Nozzle in High Density Electronics Packaging Model

    As the heat generation density of electronics packaging grow fast during recent years, the problem of heat dissipation of electronics become the obstruction of development of electronic packaging industry, which accelerated the research and development of heat transfer on the direction of microcosmic. In this research, an epoxy resin laminate heated by heating element was used as the heat transfer surface of simulated chip, and the thermocouples were mounted symmetrically along the diagonal of the laminate to measure the temperature distribution of the surface. Air jet, driven by a small pump, comes from round nozzles (1.5mm and 1mm in diameter) and impinges on the heat transfer surface with middle and low Reynolds number. The parameters such as Reynolds number and height-to-diameter ratio was changed to investigate the radial distribution of Nusselt number and the characteristics of heat transfer in stagnant section. This experimental research gives useful information for the application of air jet impingement to the cooling of electronics packaging

  • Nano-scaled functional layers for current and heat transport in electronics packaging

    The amount of information capable of being stored on a computer chip doubles every two years as stated first by Gordon Moore in 1965. Electronics packaging technology has to adopt the resulting requirements of this tremendous development of the microelectronic industry. In view of future applications it is necessary to establish new interconnect materials for high-density electronics packaging because common materials are facing physical barriers and fail to meet the requirements of nano-scale miniaturisation. These requirements will be steady miniaturisation of the electronic devices, higher current density per device, pitches down to 20 mum and higher thermal dissipation loss. Current joining elements cannot meet these requirements. For common joining element materials there are also limitations with regard to their thermomechanical behaviour. Downscaling of traditional solder bump materials to lower pitch cannot satisfy the reliability requirement [1]. For example, lead and lead-free solders typically fail when scaled down to less than 100 micron pitch due to poor fatigue resistance. On the other hand compliant interconnections do not meet the high frequency electrical requirements. Consequently, there is a need for new joining materials in electronics packaging. Carbon nanotubes (CNTs) are promising candidates for functional layers for packaging in the nanometre scale because of their superior mechanical, thermal and electrical properties. The reproducibility and the performance of such structures for thermal and electrical transport on common packaging substrates are not sufficiently known and were investigated by our groups. Latest results concerning the preparation of CNT films and their structural and functional properties are described in the present paper. Using a ldquobottom uprdquo approach the CNTs are grown with a defined wall structure on a catalyst layer by chemical vapour deposition (CVD). The catalyst layer is a nano-structured deposit on a Si wafer formed by a self assembly mechanism. The nano-scaled structuring is the most important requirement for manufacturing CNTs with defined properties. Unlike state-of- the-art methods a layer of a conducting material is deposited on the Si surface as finish. This conducting layer could be the basis for the following die bonding process transferring the CNT layer on common packaging substrates. The application potential is exemplarily shown.



Standards related to Electronics Packaging

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(Replaced) IEEE Standard VHDL Language Reference Manual

his standard revises and enhances the VHDL language reference manual (LRM) by including a standard C language interface specification; specifications from previously separate, but related, standards IEEE Std 1164 -1993,1 IEEE Std 1076.2 -1996, and IEEE Std 1076.3-1997; and general language enhancements in the areas of design and verification of electronic systems.


IEEE Recommended Practices for the Implementation of a Metric Equipment Practice (IEEE Std 1301-1991)


IEEE Standard for Information Technology - POSIX Ada Language Interfaces - Part 1: Binding for System Application Program Interface (API)

This document is part of the POSIX series of standards for applications and user interfaces to open systems. It defines the Ada language bindings as package specifications and accompanying textual descriptions of the applications program interface (API). This standard supports application portability at the source code level through the binding between ISO 8652:1995 (Ada) and ISO/IEC 9945-1:1990 (IEEE Std 1003.1-1990 ...


Standard for High Frequency Characterization for Low Temperature Co-Fired Ceramic (LTCC)Materials

This standard develops standard test methods to characterize and control Low Temperature Co-Fired Ceramic (LTCC) materials systems. The test methods are independentant of the type of LTCC materials system. The test methods will be usable by all vendors of LTCC to characterize and measure LTCC materials systems in frequencies up to 110GHz.