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Xplore Articles related to Silicon-on-insulator

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Silicon-on-sapphire: A Practical Material

1992 IEEE International SOI Conference, 1992

None


Noise Characteristics and Modeling of Lubistor

SOI Lubistors: Lateral, Unidirectional, Bipolar-type Insulated-gate Transistors, None

This chapter describes the noise characteristics of various SOI Lubistors with anode-offset regions. The static characteristics of these devices are modeled for the noise analysis; the model is composed of a series of a MOSFET and the pn junction. It is shown experimentally that the noise power of the devices is proportional toIAn(n> 0), whereIAis the anode current. Since the ...


Experimental Study of Two-Dimensional Confinement Effects on Reverse-Biased Current Characteristics of Ultra-Thin SOI Lubistors

SOI Lubistors: Lateral, Unidirectional, Bipolar-type Insulated-gate Transistors, None

In this chapter, the low-temperature behavior of reverse-biased Lubistors fabricated with a 10-nm-thick silicon-on-insulator (SOI) layer is described. Step-like current dependence on reverse bias is observed even at room temperature as well as at low temperature, which suggests distinct quantum transport in the thin silicon layer. It is demonstrated that the effective activation energies of generation-recombination centers are shallower than ...


A new, insulated-gate transistor

1966 IEEE International Solid-State Circuits Conference. Digest of Technical Papers, 1966

None


Supplementary Study on Buried Oxide Characterization:

SOI Lubistors: Lateral, Unidirectional, Bipolar-type Insulated-gate Transistors, None

This chapter proposes a macroscopic physical model for the buried oxide having a transition layer in a SIMOX substrate to estimate the parasitic capacitance. The Clausius-Mossotti relationship for two media is introduced into the model, employing an empirical factor to match with a high-frequency response. Peaks in the capacitance dependence on frequency appear only in devices with the buried oxide ...


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Educational Resources on Silicon-on-insulator

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IEEE-USA E-Books

  • Silicon-on-sapphire: A Practical Material

    None

  • Noise Characteristics and Modeling of Lubistor

    This chapter describes the noise characteristics of various SOI Lubistors with anode-offset regions. The static characteristics of these devices are modeled for the noise analysis; the model is composed of a series of a MOSFET and the pn junction. It is shown experimentally that the noise power of the devices is proportional toIAn(n> 0), whereIAis the anode current. Since the noise characteristics are not explained by conventional theory, a new model based of a phenomenological consideration is proposed. It is shown that the proposed basic model, which is compatible with the conventional Hooge model, can explain the experimental results. The influence of the anode-offset length is also discussed and modeled. [Reprinted with permission from S. Wakita and Y. Omura,Journal of Applied Physics, vol. 91, p. 2143, 2002. Copyright 2002, American Institute of Physics.]

  • Experimental Study of Two-Dimensional Confinement Effects on Reverse-Biased Current Characteristics of Ultra-Thin SOI Lubistors

    In this chapter, the low-temperature behavior of reverse-biased Lubistors fabricated with a 10-nm-thick silicon-on-insulator (SOI) layer is described. Step-like current dependence on reverse bias is observed even at room temperature as well as at low temperature, which suggests distinct quantum transport in the thin silicon layer. It is demonstrated that the effective activation energies of generation-recombination centers are shallower than simply expected, which has been examined on the basis of theoretical calculations. The quantum confinement effect on the generation--recombination process is strongly illustrated under the reverse-biased conditions. [Copyright 2007. The Japan Society of Applied Physics. Y. Omura, Experimental study of two-dimensional confinement effects on reverse-biased current characteristics of ultra-thin silicon-on-insulator lateral, unidirectional, bipolar-type insulated-gate transistors,Japanese Journal of Applied Physics, vol. 46, pp. 2968-2972, 2007.]

  • A new, insulated-gate transistor

    None

  • Supplementary Study on Buried Oxide Characterization:

    This chapter proposes a macroscopic physical model for the buried oxide having a transition layer in a SIMOX substrate to estimate the parasitic capacitance. The Clausius-Mossotti relationship for two media is introduced into the model, employing an empirical factor to match with a high-frequency response. Peaks in the capacitance dependence on frequency appear only in devices with the buried oxide having a transition layer. This property can be explained by the proposed model. It is also shown that the transition layer adjacent to buried oxide should be eliminated to reduce parasitic capacitance. [©1992 IEEE. Reprinted, with permission, from Y. Omura and K. Izumi, A macroscopic physical model and capacitive response of the buried oxide having a transition layer in a SIMOX substrate,IEEE Transactions on Electron Devices, vol. 39, pp. 1916-1921, 1992.]

  • CMOS technology directions

    Unlike NMOS technology, which has been relatively standardized by the industry, CMOS technology is currently much more varied in its methods of production. Presently, the following alternatives (and related issues) exist: bulk CMOS versus CMOS-SOS (cost, yield, performance), P-well versus N-well architecture (performance, latch-up, immunity, alpha immunity), epitaxial versus non-epitaxial substrates (latch-up, alphas, cost, yield) and single versus double poly processing (density, cost, performance). In the future, decisions regarding new isolation techniques (e.g., slot), new interconnect layers (e.g., silicides), and methods for soft-error immunity (e.g., buried layers), may cause a further fragmentation of the CMOS technology.

  • Two-Dimensionally Confined Injection Phenomena at Low Temperatures in Sub-10-nm-Thick SOI Lubistors

    This chapter describes confined carrier injection phenomena in thin-SOI Lubistors fabricated on SIMOX substrates. At 28 K conductance shows step-like anomalies due to the manifestation of a two-dimensional subband system in an 8 -nm-thick SOI structure at a low gate bias. Conductance shows an oscillation- like feature at a high gate bias owing to the injection mode change. These effects are examined by theoretical simulations based on quantum mechanics. [©1996 IEEE. Reprinted, with permission, from Y. Omura, Two-dimensionally confined injection phenomena at low temperatures in sub-10-nm-thick SOI insulated-gate p-n-junction devices,IEEE Transactions on Electron Devices, vol. 43, pp. 436-443, 1996.]

  • Novel Devices

    None

  • Experimental Consideration for Modeling of Lubistor Operation

    An experimental characterization of Lubistors has been carried out through the employment of SIMOX technology and the following results were obtained: (i) An oxygen-doped silicon (ODS) layer should be placed between the upper silicon layer and buried oxide layer to achieve the original Lubistor characteristic; that is, anode-to-cathode current is cut off by enhancement-mode gate bias.(ii) In the Lubistor'sONstate, a large potential drop exists only near a high-low junction terminal, which must be supported by the depletion layer. (iii) In the Lubistor'sOFFstate, a large potential drop exists near a pn- junction terminal, which must also be supported by the depletion layer. A simplified analysis is carried out to clarify the Lubistor's operation mechanism. A theoretical model is used to qualitatively support experimental results.

  • C-band wavelength conversion in ultrasmall silicon-on-insulator waveguides

    We demonstrate four-wave mixing to achieve C-band wavelength conversion in ultrasmall SOI waveguides. This work exploits silicon's large Raman /spl chi//sup (3)/ to further achieve active on-chip functionality. Initial experiments are compared with theoretical calculations.



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