What Are Field Programmable Gate Arrays?

Field programmable gate arrays are integrated circuit devices containing arrays of configurable logic blocks, programmable interconnects, and embedded hardware resources whose functionality is defined by configuration data loaded after manufacture rather than by fixed chip layout. They are distinguished from application-specific integrated circuits, which are designed and fabricated for a single function, by the ability to reprogram the device in the field or during development, allowing the same silicon to serve different processing tasks at different times. Xilinx introduced the first commercial device of this type in 1985, and the technology has since grown into a broad family of products manufactured primarily by Intel and AMD.

The architectural model common to all FPGAs pairs a programmable logic fabric, made up of lookup tables and flip-flops organized into configurable logic blocks, with a routing network of programmable switch points and wire segments. Configuration is stored in static RAM cells distributed across the chip. Embedded memory architectures and memory architectures are integrated directly into the fabric as block RAM (BRAM) tiles distributed among the logic array, providing local storage for filter coefficients, FIFO queues, and lookup tables too large for the logic-level LUTs alone. Dedicated digital signal processing blocks, high-speed serial transceivers, and in some devices, embedded processor cores, round out the capabilities available without external components.

Reconfigurable Devices

The defining characteristic of FPGAs among reconfigurable devices is the combination of fine-grained programmability and the ability to rewrite the configuration at any time. Unlike antifuse-based programmable logic, which is one-time programmable, SRAM-configured FPGAs can be reprogrammed through JTAG or by reloading a bitstream from flash storage. Partial reconfiguration, supported on high-end devices, allows one region of the fabric to be updated while adjacent logic continues to operate, enabling dynamic hardware swapping without system interruption. This property makes FPGAs useful in applications where the processing task changes during operation, such as adaptive radar waveform generation or software-defined radio, and in systems that need field firmware updates without hardware replacement. Field programmable analog arrays (FPAAs) address the analogous reconfigurability requirement for analog signal paths, complementing the digital flexibility of FPGAs in mixed-signal systems. Intel's FPGA architecture documentation covers the logic and memory structures that underpin reconfigurable operation.

AI Accelerators

FPGAs have become an important platform for accelerating machine learning inference workloads, particularly in deployments where the model architecture or precision requirements change frequently and the latency and energy overhead of a GPU is unacceptable. The FPGA's ability to implement custom dataflow architectures, rather than fitting the workload to a fixed processor instruction set, allows arithmetic units to be sized exactly for the bit widths and parallelism of a specific neural network layer. Microsoft's deployment of FPGAs in its Azure data centers for Bing search ranking, reported in 2016, demonstrated that FPGA-based AI acceleration at scale is commercially viable. Research groups and vendors including Xilinx (now AMD) have developed high-level synthesis toolchains such as Vitis AI that translate quantized neural network graphs into FPGA bitstreams. A broad survey of FPGA-based machine learning acceleration appears in IEEE Xplore conference and journal publications on AI accelerators.

VHDL and Design Tools

VHDL (VHSIC Hardware Description Language) is one of the two primary languages used to specify FPGA designs, alongside Verilog. Both are register-transfer-level (RTL) languages in which the designer describes circuits as assignments between named signal registers with explicit timing. The RTL description is synthesized by a toolchain into a netlist of primitive logic elements, then mapped and placed-and-routed onto the target device's fabric. High-level synthesis (HLS) tools, including AMD Vitis HLS and Intel oneAPI, raise the abstraction further by accepting C or C++ functions and generating RTL automatically. After place-and-route, the tool produces a configuration bitstream. The design flow from HDL to bitstream is documented in detail in National Instruments' FPGA fundamentals reference.

Applications

Field programmable gate arrays have applications in a wide range of disciplines, including:

• Network packet processing, encryption, and line-rate traffic management
• Real-time image processing and machine vision pipelines
• High-frequency trading infrastructure with deterministic latency requirements
• ASIC prototyping and hardware validation before tape-out
• Software-defined radio baseband processing
• Medical imaging reconstruction in CT and MRI systems