Conferences related to Yield estimation

Back to Top

2023 Annual International Conference of the IEEE Engineering in Medicine & Biology Conference (EMBC)

The conference program will consist of plenary lectures, symposia, workshops and invitedsessions of the latest significant findings and developments in all the major fields of biomedical engineering.Submitted full papers will be peer reviewed. Accepted high quality papers will be presented in oral and poster sessions,will appear in the Conference Proceedings and will be indexed in PubMed/MEDLINE.


ICC 2021 - IEEE International Conference on Communications

IEEE ICC is one of the two flagship IEEE conferences in the field of communications; Montreal is to host this conference in 2021. Each annual IEEE ICC conference typically attracts approximately 1,500-2,000 attendees, and will present over 1,000 research works over its duration. As well as being an opportunity to share pioneering research ideas and developments, the conference is also an excellent networking and publicity event, giving the opportunity for businesses and clients to link together, and presenting the scope for companies to publicize themselves and their products among the leaders of communications industries from all over the world.


GLOBECOM 2020 - 2020 IEEE Global Communications Conference

IEEE Global Communications Conference (GLOBECOM) is one of the IEEE Communications Society’s two flagship conferences dedicated to driving innovation in nearly every aspect of communications. Each year, more than 2,900 scientific researchers and their management submit proposals for program sessions to be held at the annual conference. After extensive peer review, the best of the proposals are selected for the conference program, which includes technical papers, tutorials, workshops and industry sessions designed specifically to advance technologies, systems and infrastructure that are continuing to reshape the world and provide all users with access to an unprecedented spectrum of high-speed, seamless and cost-effective global telecommunications services.


2020 IEEE International Conference on Image Processing (ICIP)

The International Conference on Image Processing (ICIP), sponsored by the IEEE SignalProcessing Society, is the premier forum for the presentation of technological advances andresearch results in the fields of theoretical, experimental, and applied image and videoprocessing. ICIP 2020, the 27th in the series that has been held annually since 1994, bringstogether leading engineers and scientists in image and video processing from around the world.


2020 57th ACM/ESDA/IEEE Design Automation Conference (DAC)

The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2010 47th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The Design Automation Conference (DAC) is the premier event for the design of electronic circuits and systems, and for EDA and silicon solutions. DAC features a wide array of technical presentations plus over 200 of the leading electronics design suppliers.

  • 2011 48th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The Design Automation Conference is the world s leading technical conference and tradeshow on electronic design and design automation. DAC is where the IC Design and EDA ecosystem learns, networks, and does business.

  • 2012 49th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The Design Automation Conference (DAC) is the premier event for the design of electronic circuits and systems, and for EDA and silicon solutions. DAC features a wide array of technical presentations plus over 200 of the leading electronics design suppliers

  • 2013 50th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 session on design methodologies and EDA tool developments, keynotes, panels, plus User Track presentations. A diverse worldwide community representing more than 1,000 organization attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2014 51st ACM/EDAC/IEEE Design Automation Conference (DAC)

    DAC Description for TMRF The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading

  • 2015 52nd ACM/EDAC/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2017 54th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2018 55th ACM/ESDA/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2021 58th ACM/ESDA/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2022 59th ACM/ESDA/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.



Periodicals related to Yield estimation

Back to Top

Antennas and Propagation, IEEE Transactions on

Experimental and theoretical advances in antennas including design and development, and in the propagation of electromagnetic waves including scattering, diffraction and interaction with continuous media; and applications pertinent to antennas and propagation, such as remote sensing, applied optics, and millimeter and submillimeter wave techniques.


Applied Superconductivity, IEEE Transactions on

Contains articles on the applications and other relevant technology. Electronic applications include analog and digital circuits employing thin films and active devices such as Josephson junctions. Power applications include magnet design as well asmotors, generators, and power transmission


Audio, Speech, and Language Processing, IEEE Transactions on

Speech analysis, synthesis, coding speech recognition, speaker recognition, language modeling, speech production and perception, speech enhancement. In audio, transducers, room acoustics, active sound control, human audition, analysis/synthesis/coding of music, and consumer audio. (8) (IEEE Guide for Authors) The scope for the proposed transactions includes SPEECH PROCESSING - Transmission and storage of Speech signals; speech coding; speech enhancement and noise reduction; ...


Automatic Control, IEEE Transactions on

The theory, design and application of Control Systems. It shall encompass components, and the integration of these components, as are necessary for the construction of such systems. The word `systems' as used herein shall be interpreted to include physical, biological, organizational and other entities and combinations thereof, which can be represented through a mathematical symbolism. The Field of Interest: shall ...


Biomedical Engineering, IEEE Transactions on

Broad coverage of concepts and methods of the physical and engineering sciences applied in biology and medicine, ranging from formalized mathematical theory through experimental science and technological development to practical clinical applications.



Most published Xplore authors for Yield estimation

Back to Top

Xplore Articles related to Yield estimation

Back to Top

Bearing accuracy with linear arrays

1970 IEEE International Conference on Engineering in the Ocean Environment - Digest of Technical Papers, 1970

This paper discusses the factors determining accuracy in estimating the bearing of a source using a linear array. These effects include beamwidth, sidelobes and nonhorizontal arrival angles. Both rms error and bias are considered.


Classification Bias of the k-Nearest Neighbor Algorithm

IEEE Transactions on Pattern Analysis and Machine Intelligence, 1984

The k-nearest neighbor classifier has been used extensively in pattern analysis applications. This classifier can, however, have substantial bias when there is little class separation and the sample sizes are unequal. This classification bias is examined for the two-class situation and formulas presented that allows selection of values of k that yields minimum bias.


A yield study of VLSI adders

IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems, 1994

Several 64-bit adders have been designed and their expected yield has been estimated. Our results show that the yield of VLSI adders can be improved by modifying the layout of the original design and/or by choosing a different layout and circuit structure. In certain situations, these approaches can improve the yield by 10% to 17%.


Shape calibration for a nominally linear equispaced array

1993 IEEE International Conference on Acoustics, Speech, and Signal Processing, 1993

The author considers a thin flexible line array of equispaced hydrophones that is towed through the sea, and develops a procedure that allows testing of the straightness of the array. The motion of the towing ship, the currents of the ocean and other forces induce deformations on the array and affect the performance of spatial processing of the data developed ...


A computer-aided approach for optimal statistical design

Proceedings of TENCON'94 - 1994 IEEE Region 10's 9th Annual International Conference on: 'Frontiers of Computer Technology', 1994

An approach for design centering and tolerancing to achieve 100% yield is introduced. The procedure consists of steps solving three optimization problems: first, centering the design point to the vicinity of the optimum point in the design parameter space, second, solving a fixed tolerance problem, and third, solving a variable tolerance problem, in which parameter tolerances are reassigned to achieve ...



Educational Resources on Yield estimation

Back to Top

IEEE.tv Videos

IMS 2012 Microapps - Improve Microwave Circuit Design Flow Through Passive Model Yield and Sensitivity Analysis
IMS 2011 Microapps - Yield Analysis During EM Simulation
IMS 2011 Microapps - Improved Microwave Device Characterization and Qualification Using Affordable Microwave Microprobing Techniques for High-Yield Production of Microwave Components
IRDS: Yield Enhancement - Slava Libman at INC 2019
State-of-the art techniques for advanced vehicle dynamics control & vehicle state estimation
Micro-Apps 2013: How to Make Your Designs More Robust
Signal Processing on Manifolds
IEEE Medal of Honor Recipient (2007): Thomas Kailath
Some Recent Work in Computational Intelligence for Software Engineering
IROS TV 2019- How to Build a Robot: Vision Based Estimation of Driving Energy for Planetary Rovers
Vladimir Cherkassky - Predictive Learning, Knowledge Discovery and Philosophy of Science
GHTC 2012 Gertjan van Stam Keynote
IROS TV 2019- Macau- Episode 2- Robots Connecting People
2015 IEEE Honors: IEEE Jack S. Kilby Signal Processing Medal - Harry L. Van Trees
ICRA 2020 Keynote - Compliant Whole-body Control for Real-World Interactions
Massive MIMO Active Antenna Arrays for Advanced Wireless Communications: IEEE CAS lecture by Dr. Mihai Banu
Micro-Apps 2013: Design Methodology for GaAs MMIC PA
Robotics History: Narratives and Networks Oral Histories: Gurav Sukhatme
Robotics History: Narratives and Networks Oral Histories: Larry Matthies
Intermodulation Distortion Mitigation in Microwave Amplifiers and Frequency Converters

IEEE-USA E-Books

  • Bearing accuracy with linear arrays

    This paper discusses the factors determining accuracy in estimating the bearing of a source using a linear array. These effects include beamwidth, sidelobes and nonhorizontal arrival angles. Both rms error and bias are considered.

  • Classification Bias of the k-Nearest Neighbor Algorithm

    The k-nearest neighbor classifier has been used extensively in pattern analysis applications. This classifier can, however, have substantial bias when there is little class separation and the sample sizes are unequal. This classification bias is examined for the two-class situation and formulas presented that allows selection of values of k that yields minimum bias.

  • A yield study of VLSI adders

    Several 64-bit adders have been designed and their expected yield has been estimated. Our results show that the yield of VLSI adders can be improved by modifying the layout of the original design and/or by choosing a different layout and circuit structure. In certain situations, these approaches can improve the yield by 10% to 17%.

  • Shape calibration for a nominally linear equispaced array

    The author considers a thin flexible line array of equispaced hydrophones that is towed through the sea, and develops a procedure that allows testing of the straightness of the array. The motion of the towing ship, the currents of the ocean and other forces induce deformations on the array and affect the performance of spatial processing of the data developed under the assumption that the array is straight. When the ship is maneuvering, the processing is generally turned off for long periods of time, an extremely penalizing situation that can be overcome by applying the procedure described to determine the maximum size of admissible sub-arrays on which the standard processing can be pursued.<<ETX>>

  • A computer-aided approach for optimal statistical design

    An approach for design centering and tolerancing to achieve 100% yield is introduced. The procedure consists of steps solving three optimization problems: first, centering the design point to the vicinity of the optimum point in the design parameter space, second, solving a fixed tolerance problem, and third, solving a variable tolerance problem, in which parameter tolerances are reassigned to achieve 10% yield and minimum cost. Two numerical examples testing the approach are presented.<<ETX>>

  • A new statistical approach for fault-tolerant VLSI systems

    A novel approach to the statistics of fault-tolerant VLSI systems is presented by compounding binomial distributions with a beta distribution. This technique was discovered in the analysis of fault-tolerant dynamic random-access memory (DRAM) chips. Manufacturing data supporting this method are shown and the application of the approach to standard fault-tolerance schemes is described. Special forms of these statistics for computer calculations are also discussed and examples are given.<<ETX>>

  • On the stability of equation-error estimates of all-pole systems

    It is well known that the standard equation-error (EE) method for the identification of linear systems yields biased estimates if the data are noise corrupted. Due to this bias, the resulting estimate can be unstable in some cases, depending on the spectral characteristics of the input and the noise, the signal-to-noise ratio (SNR), and the unknown system. The set of all-pole linear systems whose equation-error estimate is stable for all wide sense stationary inputs and white measurement noise is investigated. Some results concerning the structure of this set are given.

  • Semi-blind signal estimation for smart antennas using subspace tracking

    We discuss a semi-blind algorithm for smart antennas that utilises user identifiers that are available in existing cellular systems in addition to some structural signal properties. Our algorithm estimates, first, the row span of the adequately composed data matrix. In this part we gain a factor of up to 70 in computational complexity by employing subspace tracking algorithms. After that we project the obtained basis vectors iteratively to the finite alphabet constellation. We call the projection part of our algorithm DILSF (decoupled iterative least-squares with subspace fitting). Assuming two co-channel users in a GSM-like TDMA system and a Rayleigh fading channel with finite angular spread, we obtained a BER<10/sup -3/ with only 3 antennas, spaced 10/spl lambda/ apart. We also investigate the effect of the rank estimation accuracy on the performance and find the algorithm insensitive to minor rank estimation errors.

  • Target tracking by neural network maneuver modeling

    A new approach to tracking a maneuvering target using a neural network-based scheme is developed. The neural network models the target manoeuvre and assists a Kalman filter in updating its gains in order to generate correct estimates of target position and velocity. A performance evaluation of the target tracking scheme is conducted under various interesting scenarios. The parallel processing capabilities of trained neural nets are exploited in this application for realistically handling more input features to correct for the bias induced by the target manoeuvre.<<ETX>>

  • Designing Template Cells Suitable for Secret-Sharing Halftone Images by Quantitative Analysis

    A method for sharing secret figures in halftone images involves the random use of template cells. In this method grainy appearances of halftone images can be reduced by limiting available template cells into two for each halftone level. A method for obtaining the cell pairs of the best halftone quality is proposed. To sort out such cell pairs from all the possible ones, quantitative measures for evaluating halftone quality are developed. To evaluate flat appearances of halftone, a level variance of a cell pair is defined. Experimental results of subjective evaluation show correlations between the level variances and the subjective qualities. Other measures are also defined to evaluate continuous appearances between consecutive levels. The method is demonstrated with cells of 4 by 4 dots. An example of the best cell pairs is then presented for practical use.



Standards related to Yield estimation

Back to Top

IEEE Recommended Practice on Software Reliability

Software reliability (SR) models have been evaluated and ranked for their applicability to various situations. Many improvements have been made in SR modeling and prediction since 1992. This revised recommended practice reflects those advances in SR since 1992, including modeling and prediction for distributed and network systems. Situation specific usage guidance was refined and updated. The methodologies and tools included ...