Conferences related to System buses

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2020 IEEE Applied Power Electronics Conference and Exposition (APEC)

APEC focuses on the practical and applied aspects of the power electronics business. Not just a power designer’s conference, APEC has something of interest for anyone involved in power electronics including:- Equipment OEMs that use power supplies and converters in their equipment- Designers of power supplies, dc-dc converters, motor drives, uninterruptable power supplies, inverters and any other power electronic circuits, equipments and systems- Manufacturers and suppliers of components and assemblies used in power electronics- Manufacturing, quality and test engineers involved with power electronics equipment- Marketing, sales and anyone involved in the business of power electronic- Compliance engineers testing and qualifying power electronics equipment or equipment that uses power electronics


2020 IEEE International Conference on Robotics and Automation (ICRA)

The International Conference on Robotics and Automation (ICRA) is the IEEE Robotics and Automation Society’s biggest conference and one of the leading international forums for robotics researchers to present their work.


2020 IEEE Nuclear Science Symposium and Medical Imaging Conference (NSS/MIC)

All areas of ionizing radiation detection - detectors, signal processing, analysis of results, PET development, PET results, medical imaging using ionizing radiation


2020 IEEE Power & Energy Society General Meeting (PESGM)

The Annual IEEE PES General Meeting will bring together over 2900 attendees for technical sessions, administrative sessions, super sessions, poster sessions, student programs, awards ceremonies, committee meetings, tutorials and more


2020 IEEE/PES Transmission and Distribution Conference and Exposition (T&D)

Bi-Annual IEEE PES T&D conference. Largest T&D conference in North America.


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Periodicals related to System buses

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Advanced Packaging, IEEE Transactions on

The IEEE Transactions on Advanced Packaging has its focus on the modeling, design, and analysis of advanced electronic, photonic, sensors, and MEMS packaging.


Aerospace and Electronic Systems Magazine, IEEE

The IEEE Aerospace and Electronic Systems Magazine publishes articles concerned with the various aspects of systems for space, air, ocean, or ground environments.


Automatic Control, IEEE Transactions on

The theory, design and application of Control Systems. It shall encompass components, and the integration of these components, as are necessary for the construction of such systems. The word `systems' as used herein shall be interpreted to include physical, biological, organizational and other entities and combinations thereof, which can be represented through a mathematical symbolism. The Field of Interest: shall ...


Communications Letters, IEEE

Covers topics in the scope of IEEE Transactions on Communications but in the form of very brief publication (maximum of 6column lengths, including all diagrams and tables.)


Communications Magazine, IEEE

IEEE Communications Magazine was the number three most-cited journal in telecommunications and the number eighteen cited journal in electrical and electronics engineering in 2004, according to the annual Journal Citation Report (2004 edition) published by the Institute for Scientific Information. Read more at http://www.ieee.org/products/citations.html. This magazine covers all areas of communications such as lightwave telecommunications, high-speed data communications, personal communications ...


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Most published Xplore authors for System buses

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Xplore Articles related to System buses

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Computer architecture using NMOS technology

1980 IEEE International Solid-State Circuits Conference. Digest of Technical Papers, 1980

A family of NMOS devices for a CPU chip which executes 16-bit register-to- register operations in a single 400ns microcycle, and memory-to-register moves in 2 microcycles, will be described.


A 40K cache memory and memory management unit

1986 IEEE International Solid-State Circuits Conference. Digest of Technical Papers, 1986

The development of a cache memory to support 32b microprocessors will be offered. Including an on-chip memory unit the circuit operates at 33MHz, delivers data to the CPU in 2/4 clock cycles and is fabricated in 2μm CMOS.


A VLSI superminicomputer CPU

1984 IEEE International Solid-State Circuits Conference. Digest of Technical Papers, 1984

A 5-chip set implementing 304 instructions of a 32b super-minicomputer, will be reported. The designs include 1,220,500 transistors and operate with a 200ns microcycle.


Practical Cache Design Techniques For Today's RISC And CISC CPUS

Electro International, 1991, 1991

Cache memories are moving into the forefront of popularity. Most microprocessor system designers can now expect to be called upon to design or implement a cache at some time in their carreers. It is somewhat difficult deciding where to start when first confronted with the task of designing a cache from scratch. This paper will focus on techniques which can ...


High-speed 32-bit buses for forward-looking computers

IEEE Spectrum, 1989

The features offered by current high-performance 32-bit system buses are examined. They allow multiprocessing, scalability, block transfers to RAM, cache coherence, and autoconfiguration (the ability to poll boards connected to them, identify the boards, and adjust the software interface accordingly). The factors that need to be taken into account when designing these buses are considered, and their performance and limitations ...


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Educational Resources on System buses

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IEEE-USA E-Books

  • Computer architecture using NMOS technology

    A family of NMOS devices for a CPU chip which executes 16-bit register-to- register operations in a single 400ns microcycle, and memory-to-register moves in 2 microcycles, will be described.

  • A 40K cache memory and memory management unit

    The development of a cache memory to support 32b microprocessors will be offered. Including an on-chip memory unit the circuit operates at 33MHz, delivers data to the CPU in 2/4 clock cycles and is fabricated in 2μm CMOS.

  • A VLSI superminicomputer CPU

    A 5-chip set implementing 304 instructions of a 32b super-minicomputer, will be reported. The designs include 1,220,500 transistors and operate with a 200ns microcycle.

  • Practical Cache Design Techniques For Today's RISC And CISC CPUS

    Cache memories are moving into the forefront of popularity. Most microprocessor system designers can now expect to be called upon to design or implement a cache at some time in their carreers. It is somewhat difficult deciding where to start when first confronted with the task of designing a cache from scratch. This paper will focus on techniques which can be used in microprocessor cache designs to improve system throughput. Examples are shown using Intel's i486 processor, and the P3000 RISC processor.

  • High-speed 32-bit buses for forward-looking computers

    The features offered by current high-performance 32-bit system buses are examined. They allow multiprocessing, scalability, block transfers to RAM, cache coherence, and autoconfiguration (the ability to poll boards connected to them, identify the boards, and adjust the software interface accordingly). The factors that need to be taken into account when designing these buses are considered, and their performance and limitations are discussed.<<ETX>>

  • Technology '88: personal computers

    The state of the personal computer field in 1987, in the wake of IBM's introduction of a completely new line of personal computers, known as the Personal System/2, is examined. The possibility that the formerly monolithic IBM PC standard might develop along several different paths is discussed. Other developments, including an open-architecture Apple Macintosh model, are described. An expert opinion is offered by Allen L. Hankinson, chief of the systems and software technology division of the Institute for Computer Sciences and Technology at the National Bureau of Standards, who contends that personal computers now resemble workstations.<<ETX>>

  • A dual processor serial data controller chip

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  • An 8Kbyte intelligent cache memory

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  • The interface circuit challenge

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  • Reconfigurable computing at Xilinx

    Summary form only givem, as follows. In the last decade and a half, Field Programmable Gate Arrays (FPGAs) have grown from simple devices with a few hundred programmable logic gates to densities beyond one million gates. This growth in density has led to an ever-expanding area of application for these devices. From their early use as simple interface or "glue" logic, FPGAs have moved on to become popular platforms for implementing system bus interfaces, including industry standards such as PCI. As device density has surpassed one million gates, FPGA co-processing in data-intensive applications such as Digital Signal Processing (DSP) and networking has become commonplace. The recent announcement of the Virtex II FPGA+CPU device from Xilinx, as well as similar announcements from other vendors, indicate that the trend toward single chip FPGA+CPU processing will continue. And with ten million gate devices under development, it is expected that more system functionality, including more general purpose processing, will continue to migrate into the FPGA. While much of this type of coprocessing can also be accomplished with fixed Application Specific Integrated Circuit (ASIC) hardware, the ability to reprogram FPGA devices, even in system, opens up new opportunities for system design. Reconfigurable logic provides new methods for increasing performance, decreasing power consumption and increasing system functionality. Along with these new benefits come challenges, particularly in the area of software design tools. Tools such as Xilinx's JBits point the way toward providing a single unified environment for programming CPUs, configuring and reconfiguring hardware resources and providing integrated debug support for the single chip reconfigurable systems of the future.



Standards related to System buses

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Guide to Specifications for Gas-Insulated, Electric Power Substation Equipment

This guide covers the technical requirements for the design, fabrication, testing, installation, and in-service performance of gas-insulated substations(GIS). In line with the user functional one-line diagram, the supplier should furnish all components of the GIS such as circuit breakers(CB), disconnect switches(DS), maintenance ground switches (MGS), fast-acting ground switches(FGS), voltage transformers(VT), current transformers(CT), SF6-to-air bushings, SF6-to-cable terminations, surge arresters, all the ...


IEEE Standard Microcomputer System Bus



Jobs related to System buses

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