Conferences related to Subthreshold current

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2020 IEEE International Electron Devices Meeting (IEDM)

the IEEE/IEDM has been the world's main forum for reporting breakthroughs in technology, design, manufacturing, physics and the modeling of semiconductors and other electronic devices. Topics range from deep submicron CMOS transistors and memories to novel displays and imagers, from compound semiconductor materials to nanotechnology devices and architectures, from micromachined devices to smart -power technologies, etc.


2018 15th International Conference on Electrical Engineering/Electronics, Computer, Telecommunications and Information Technology (ECTI-CON)

Circuits and Systems, Computers, Information Technology, Communication Systems, Control and Instrumentation, Electrical Power Systems, Power Electronics, Signal Processing


2018 16th IEEE International New Circuits and Systems Conference (NEWCAS)

NEWCAS2018 will encompass a wide range of special sessions and keynote talks given by prominent expertscovering key areas of research in microsystems in order to provide all attendees a unique forum for the exchange of ideas and results. The program of the conference will be tailored to reflect the wide spectrum of topics and research interest shared by researchers in this field.

  • 2017 15th IEEE International New Circuits and Systems Conference (NEWCAS)

    IEEE International NEWCAS Conference is tailored to reflect the wide spectrum of topics and research interests shared among the organizing entities. This collaboration will be oriented towards advanced research and development activities from academia, research institutions, and industry. Topics include, but are not limited to analog, mixed-signal, and digital integrated circuits and systems, radio-frequency circuits, computer architecture and memories, microsystems, sensors and actuators, test and verification, telecommunication, technology trends, power and energy circuits and systems, biomedical circuits, energy harvesting, computer-aided design tools, device modeling, and embedded portable devices.

  • 2016 14th IEEE International New Circuits and Systems Conference (NEWCAS)

    IEEE International NEWCAS Conference is tailored to reflect the wide spectrum of topics and research interests shared among the organizing entities. This collaboration will be oriented towards advanced research and development activities from academia, research institutions, and industry. Topics include, but are not limited to analog, mixed-signal, and digital integrated circuits and systems, radio-frequqncy circuits, computer architecture and memories, microsystems, sensors and actuators, test and verification, telecommunication, technology trends, power and energy circuits and systems, biomedical circuits, energy harvesting, computer-aided design tools, and embedded portable devices.

  • 2015 IEEE 13th International New Circuits and Systems Conference (NEWCAS)

    The program of the conference will be tailored to reflect the wide spectrum of topics and research interest shared among the organizing entities. This collaboration will be oriented towards advanced research in adaptive systems which constitutes the highlights of the NEWCAS conference, but also areas related to analog and digital signal processing, low power consumption, and circuits and systems designs. The topics include, but are not limited to: Computer architecture and memories, Analog circuit design, Digital and mixed-signal circuit design, RF circuit design, Microsystems, sensors and actuators, Test and verification, Telecom, microwaves and RF, Technology Trends, Data and signal processing, Neural networks and artificial vision, CAD and design tools, Low-Power circ. & syst. techniques, Imaging & image sensors, Embedded hand-held devices, Biomed. circuits & systems, Energy Harvesting / Scavenging

  • 2014 IEEE 12th International New Circuits and Systems Conference (NEWCAS)

    will encompass a wide range of special sessions and keynote talks given by prominent experts covering key areas of research in microsystems in order to provide all attendees a unique forum for the exchange of ideas and results. The program of the conference will be tailored to reflect the wide spectrum of topics and research interest shared by researchers in this field.

  • 2013 IEEE 11th International New Circuits and Systems Conference (NEWCAS)

    NEWCAS is a major international conference presenting design methodologies, techniques and experimental results in emerging electronics, circuits and systems topics. The NEWCAS conference deals with analog and digital signal processing, low power consumption, circuits and systems design.

  • 2012 IEEE 10th International New Circuits and Systems Conference (NEWCAS)

    The conference will include regular and special session on emerging electronic systems and design methods, plenary sessions on selected advanced aspects of the theory, design and applications of electronic systems, as well as tutorials given by experts on specific topics.

  • 2011 IEEE 9th International New Circuits and Systems Conference (NEWCAS)

    NEWCAS is a major international conference presenting design methodologies, techniques and experimental results in emerging electronics, circuits and systems topics. The NEWCAS conference deals with analog and digital signal processing, low power consumption, circuits and systems design.

  • 2010 8th IEEE International NEWCAS Conference (NEWCAS)

    The conference will include regular and special session on emerging electronic systems and design methods, plenary sessions on selected advanced aspects of the theory, design and applications of electronic systems, as well as tutorials given by experts on specific topics.

  • 2009 Joint IEEE North-East Workshop on Circuits and Systems (NEWCAS) and TAISA Conference (NEWCAS-TAISA 2009)

    Advance in microelectronics in addition to signal analog processing, and their applications to telecommunications, artificial vision and biomedical. This include: system architectures, circuit (digital, analog and mixed) and system-level design, test and verification, data and signal processing, microsystems, memories and sensors and associated analog processing, mathematical methods and design tools.

  • 2008 Joint IEEE North-East Workshop on Circuits and Systems (NEWCAS) and TAISA Conference (NEWCAS-TAISA 2008)

    Advanced research in microelectronics and microsystems constitutes the highlights of the NEWCAS conferences in addition to topics regarding analog data and signal processing and their applications well-established in the TAISA conferences.

  • 2006 IEEE North-East Workshop on Circuits and Systems (NEWCAS 2006)

  • 2005 IEEE North-East Workshop on Circuits and Systems (NEWCAS 2005)

  • 2004 IEEE North-East Workshop on Circuits and Systems (NEWCAS 2004)


2018 18th International Workshop on Junction Technology (IWJT)

IWJT is an open forum focused on the needs and interest of the community of a junction formation technology in semiconductors.


2018 19th International Symposium on Quality Electronic Design (ISQED)

19th International Symposium on Quality Electronic Design (ISQED 2018) is the premier interdisciplinary and multidisciplinary Electronic Design conference?bridges the gap among Electronic/Semiconductor ecosystem members providing electronic design tools, integratedcircuit technologies, semiconductor technology,packaging, assembly & test to achieve design quality.


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Periodicals related to Subthreshold current

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Biomedical Circuits and Systems, IEEE Transactions on

The Transactions on Biomedical Circuits and Systems addresses areas at the crossroads of Circuits and Systems and Life Sciences. The main emphasis is on microelectronic issues in a wide range of applications found in life sciences, physical sciences and engineering. The primary goal of the journal is to bridge the unique scientific and technical activities of the Circuits and Systems ...


Biomedical Engineering, IEEE Transactions on

Broad coverage of concepts and methods of the physical and engineering sciences applied in biology and medicine, ranging from formalized mathematical theory through experimental science and technological development to practical clinical applications.


Circuits and Systems II: Express Briefs, IEEE Transactions on

Part I will now contain regular papers focusing on all matters related to fundamental theory, applications, analog and digital signal processing. Part II will report on the latest significant results across all of these topic areas.


Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on

Methods, algorithms, and human-machine interfaces for physical and logical design, including: planning, synthesis, partitioning, modeling, simulation, layout, verification, testing, and documentation of integrated-circuit and systems designs of all complexities. Practical applications of aids resulting in producible analog, digital, optical, or microwave integrated circuits are emphasized.


Device and Materials Reliability, IEEE Transactions on

Provides leading edge information that is critical to the creation of reliable electronic devices and materials, and a focus for interdisciplinary communication in the state of the art of reliability of electronic devices, and the materials used in their manufacture. It focuses on the reliability of electronic, optical, and magnetic devices, and microsystems; the materials and processes used in the ...


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Most published Xplore authors for Subthreshold current

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Xplore Articles related to Subthreshold current

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Characterization of Back-Channel Subthreshold Conduction of Walled Soi Devices

[1991] 49th Annual Device Research Conference Digest, 1991

None


Two-dimensional analytical model of subthreshold current in fully-depleted SOI MOSFETs

27th European Solid-State Device Research Conference, 1997

None


A Low Power 128Mb Pseudo SRAM Using Hyper Destructive Read Architecture

2005 IEEE Asian Solid-State Circuits Conference, 2005

A 128Mb pseudo SRAM is developed using a special type of architecture with the purpose of effectively reducing the standby current. Standby current, especially the off leakage current is becoming more difficult problem to handle in modern devices because shorter channel length in high density and high speed devices are at a point where off leakage is the major source. ...


A study of 90nm MOSFET subthreshold hump characteristics using newly developed MOSFET array test structure

Proceedings of the 2005 International Conference on Microelectronic Test Structures, 2005. ICMTS 2005., 2005

In this paper, 90 nm MOSFET subthreshold hump characteristics are reported for the first time by using a newly developed MOSFET array test structure, which has small-scale DUTs with a new layout pattern, in order to eliminate the influence of gate leakage and off leakage on measured MOSFET parameter data such as Vth, Ion, subthreshold slope, etc. It is confirmed ...


A high-efficiency back-bias generator with cross-coupled hybrid pumping circuit for sub-1.5 V DRAM applications

Proceedings of the 26th European Solid-State Circuits Conference, 2000

Based on the study about the previously developed back-bias generators, a new high-efficiency back-bias generator with the Cross-coupled Hybrid Pumping Circuit 2 (CHPC2) is presented in this paper. CHPC2 takes only the advantages from the previous ones, throwing away the disadvantages. CHPC2 shows |V<inf>BB</inf>|/V<inf>CC</inf>as large as 98% even at low V<inf>CC</inf>=0.9 V, strongly addressing that it will be suitable at ...


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Educational Resources on Subthreshold current

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IEEE-USA E-Books

  • Characterization of Back-Channel Subthreshold Conduction of Walled Soi Devices

    None

  • Two-dimensional analytical model of subthreshold current in fully-depleted SOI MOSFETs

    None

  • A Low Power 128Mb Pseudo SRAM Using Hyper Destructive Read Architecture

    A 128Mb pseudo SRAM is developed using a special type of architecture with the purpose of effectively reducing the standby current. Standby current, especially the off leakage current is becoming more difficult problem to handle in modern devices because shorter channel length in high density and high speed devices are at a point where off leakage is the major source. In order to solve this issue, hyper destructive read architecture (HyDRA) is developed. HyDRA is a special DRAM architecture enabling destructive reading of DRAM cells using global bitline and extra tag memory. The paper demonstrates HyDRA utilizing its fast row cycle capability to instead minimize standby power to 150muA @ 2.1V and 90degC while maintaining the speed and chip area of the conventional scheme using the same process technology

  • A study of 90nm MOSFET subthreshold hump characteristics using newly developed MOSFET array test structure

    In this paper, 90 nm MOSFET subthreshold hump characteristics are reported for the first time by using a newly developed MOSFET array test structure, which has small-scale DUTs with a new layout pattern, in order to eliminate the influence of gate leakage and off leakage on measured MOSFET parameter data such as Vth, Ion, subthreshold slope, etc. It is confirmed that a subthreshold hump occurs at random in an array, and the hump occurrence percentage differs with chips in a wafer. By extracting the hump variation with a MOSFET array, it is possible to estimate accurately and reduce the standby-current in logic LSI chips.

  • A high-efficiency back-bias generator with cross-coupled hybrid pumping circuit for sub-1.5 V DRAM applications

    Based on the study about the previously developed back-bias generators, a new high-efficiency back-bias generator with the Cross-coupled Hybrid Pumping Circuit 2 (CHPC2) is presented in this paper. CHPC2 takes only the advantages from the previous ones, throwing away the disadvantages. CHPC2 shows |V<inf>BB</inf>|/V<inf>CC</inf>as large as 98% even at low V<inf>CC</inf>=0.9 V, strongly addressing that it will be suitable at low voltage DRAM applications. Moreover, CHPC2 exhibits much better pumping efficiency and larger pumping current over the previous ones with wide R<inf>L</inf>range at V<inf>CC</inf>=1.2 V.

  • A pass transistor design methodology for 256 Mbit DRAM and beyond

    A novel pass transistor design methodology to optimize gate oxide thickness (t/sub ox/), booted wordline voltage (V/sub WL/), substrate bias (V/sub sub/), and processing conditions is presented in this paper. It is found that for a gate length of 0.3 /spl mu/m a t/sub ox/ of about 85 /spl Aring/ (which is much thicker than the /spl sim/65 /spl Aring/ t/sub ox/ for 0.25 /spl mu/m logic technology) to support a V/sub WL/ of 3.75 V, a V/sub sub/ of about -1 V, and As LDD are the optimum technological choices for 256 Mbit DRAM.<<ETX>>

  • Steep subthreshold characteristic and enhanced transconductance of fully-recessed oxide (trench) isolated 1/4 µm width MOSFETs

    This paper describes the dependence of MOSFET gate-controllability on the field isolation scheme. It is found that a fully-recessed oxide (trench) isolated MOSFET has a sharp cutoff characteristic and high transconductance in comparison with a non-recessed one. These features of the fully-recessed oxide MOSFET are due to the crowding of the gate's fringing field at the channel edge. It is also found that the gate and diffused line capacitances for the fully-recessed oxide isolation are small so that high switching speed operation can be expected.

  • Accurate Total Static Leakage Current Estimation in Transistor Stacks

    None

  • A New Interface-Trapped-Charge-Degraded Subthreshold Current Model for Quadruple-Gate MOSFETs

    By accounting for the effects of equivalent oxide charges on the flat-band voltage, a novel interface-trapped-charge-degraded subthreshold current model is presented for the quadruple-gate (QG) MOSFETs based on the quasi-3-D scaling equation and Pao-Sah's integral. It indicates that a thin gate oxide can effectively reduce the subthreshold current degradation caused by the trapped charges. In contrast to the thin gate oxide, a thick silicon film is required to alleviate the subthreshold current degradation caused by the negative trapped charges. For the short-channel behavior, the damaged device with negative and positive trapped charges can decrease and increase subthreshold current roll up caused by the short-channel effects, respectively. Due to computational efficiency, the model can be easily used to explore the hot-carrier-induced current behavior for the fully depleted QG MOSFETs for its memory cell application.

  • Generalized nth-power-law and nth-root circuits

    The aim of this paper is to design analog circuits which develop different computations. This work generalizes the basic idea of the implementation of squaring and square root circuits proposed before to generate nth-power-law circuits and nth-root circuits. The MOSFET's work on the weak inversion region which allows implementing different kinds of non-linear functions. Fundamental circuit operations were demonstrated and the performance of the circuits using SPICE (simulation program with integrated circuit emphasis) was confirmed. The design was developed for a 0.5 ¿m-technology.



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