Conferences related to Steiner trees

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ICC 2021 - IEEE International Conference on Communications

IEEE ICC is one of the two flagship IEEE conferences in the field of communications; Montreal is to host this conference in 2021. Each annual IEEE ICC conference typically attracts approximately 1,500-2,000 attendees, and will present over 1,000 research works over its duration. As well as being an opportunity to share pioneering research ideas and developments, the conference is also an excellent networking and publicity event, giving the opportunity for businesses and clients to link together, and presenting the scope for companies to publicize themselves and their products among the leaders of communications industries from all over the world.


2020 57th ACM/ESDA/IEEE Design Automation Conference (DAC)

The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2022 59th ACM/ESDA/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2021 58th ACM/ESDA/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2019 56th ACM/ESDA/IEEE Design Automation Conference (DAC)

    EDA (Electronics Design Automation) is becoming ever more important with the continuous scaling of semiconductor devices and the growing complexities of their use in circuits and systems. Demands for lower-power, higher-reliability and more agile electronic systems raise new challenges to both design and design automation of such systems. For the past five decades, the primary focus of research track at DAC has been to showcase leading-edge research and practice in tools and methodologies for the design of circuits and systems.

  • 2018 55th ACM/ESDA/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2017 54th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2016 53nd ACM/EDAC/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2015 52nd ACM/EDAC/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2014 51st ACM/EDAC/IEEE Design Automation Conference (DAC)

    DAC Description for TMRF The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading

  • 2013 50th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 session on design methodologies and EDA tool developments, keynotes, panels, plus User Track presentations. A diverse worldwide community representing more than 1,000 organization attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2012 49th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The Design Automation Conference (DAC) is the premier event for the design of electronic circuits and systems, and for EDA and silicon solutions. DAC features a wide array of technical presentations plus over 200 of the leading electronics design suppliers

  • 2011 48th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The Design Automation Conference is the world s leading technical conference and tradeshow on electronic design and design automation. DAC is where the IC Design and EDA ecosystem learns, networks, and does business.

  • 2010 47th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The Design Automation Conference (DAC) is the premier event for the design of electronic circuits and systems, and for EDA and silicon solutions. DAC features a wide array of technical presentations plus over 200 of the leading electronics design suppliers.

  • 2009 46th ACM/EDAC/IEEE Design Automation Conference (DAC)

    DAC is the premier event for the electronic design community. DAC offers the industry s most prestigious technical conference in combination with the biggest exhibition, bringing together design, design automation and manufacturing market influencers.

  • 2008 45th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The Design Automation Conference (DAC) is the premier event for the design of electronic circuits and systems, and for EDA and silicon solutions. DAC features a wide array of technical presentations plus over 250 of the leading electronics design suppliers.

  • 2007 44th ACM/IEEE Design Automation Conference (DAC)

    The Design Automation Conference (DAC) is the premier Electronic Design Automation (EDA) and silicon solution event. DAC features over 50 technical sessions covering the latest in design methodologies and EDA tool developments and an Exhibition and Demo Suite area with over 250 of the leading EDA, silicon and IP Providers.

  • 2006 43rd ACM/IEEE Design Automation Conference (DAC)

  • 2005 42nd ACM/IEEE Design Automation Conference (DAC)

  • 2004 41st ACM/IEEE Design Automation Conference (DAC)

  • 2003 40th ACM/IEEE Design Automation Conference (DAC)

  • 2002 39th ACM/IEEE Design Automation Conference (DAC)

  • 2001 38th ACM/IEEE Design Automation Conference (DAC)

  • 2000 37th ACM/IEEE Design Automation Conference (DAC)

  • 1999 36th ACM/IEEE Design Automation Conference (DAC)

  • 1998 35th ACM/IEEE Design Automation Conference (DAC)

  • 1997 34th ACM/IEEE Design Automation Conference (DAC)

  • 1996 33rd ACM/IEEE Design Automation Conference (DAC)


2020 IEEE International Conference on Systems, Man, and Cybernetics (SMC)

The 2020 IEEE International Conference on Systems, Man, and Cybernetics (SMC 2020) will be held in Metro Toronto Convention Centre (MTCC), Toronto, Ontario, Canada. SMC 2020 is the flagship conference of the IEEE Systems, Man, and Cybernetics Society. It provides an international forum for researchers and practitioners to report most recent innovations and developments, summarize state-of-the-art, and exchange ideas and advances in all aspects of systems science and engineering, human machine systems, and cybernetics. Advances in these fields have increasing importance in the creation of intelligent environments involving technologies interacting with humans to provide an enriching experience and thereby improve quality of life. Papers related to the conference theme are solicited, including theories, methodologies, and emerging applications. Contributions to theory and practice, including but not limited to the following technical areas, are invited.


GLOBECOM 2020 - 2020 IEEE Global Communications Conference

IEEE Global Communications Conference (GLOBECOM) is one of the IEEE Communications Society’s two flagship conferences dedicated to driving innovation in nearly every aspect of communications. Each year, more than 2,900 scientific researchers and their management submit proposals for program sessions to be held at the annual conference. After extensive peer review, the best of the proposals are selected for the conference program, which includes technical papers, tutorials, workshops and industry sessions designed specifically to advance technologies, systems and infrastructure that are continuing to reshape the world and provide all users with access to an unprecedented spectrum of high-speed, seamless and cost-effective global telecommunications services.


IEEE INFOCOM 2020 - IEEE Conference on Computer Communications

IEEE INFOCOM solicits research papers describing significant and innovative researchcontributions to the field of computer and data communication networks. We invite submissionson a wide range of research topics, spanning both theoretical and systems research.


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Periodicals related to Steiner trees

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Automatic Control, IEEE Transactions on

The theory, design and application of Control Systems. It shall encompass components, and the integration of these components, as are necessary for the construction of such systems. The word `systems' as used herein shall be interpreted to include physical, biological, organizational and other entities and combinations thereof, which can be represented through a mathematical symbolism. The Field of Interest: shall ...


Communications, IEEE Transactions on

Telephone, telegraphy, facsimile, and point-to-point television, by electromagnetic propagation, including radio; wire; aerial, underground, coaxial, and submarine cables; waveguides, communication satellites, and lasers; in marine, aeronautical, space and fixed station services; repeaters, radio relaying, signal storage, and regeneration; telecommunication error detection and correction; multiplexing and carrier techniques; communication switching systems; data communications; and communication theory. In addition to the above, ...


Computational Biology and Bioinformatics, IEEE/ACM Transactions on

Specific topics of interest include, but are not limited to, sequence analysis, comparison and alignment methods; motif, gene and signal recognition; molecular evolution; phylogenetics and phylogenomics; determination or prediction of the structure of RNA and Protein in two and three dimensions; DNA twisting and folding; gene expression and gene regulatory networks; deduction of metabolic pathways; micro-array design and analysis; proteomics; ...


Computer

Computer, the flagship publication of the IEEE Computer Society, publishes peer-reviewed technical content that covers all aspects of computer science, computer engineering, technology, and applications. Computer is a resource that practitioners, researchers, and managers can rely on to provide timely information about current research developments, trends, best practices, and changes in the profession.


Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on

Methods, algorithms, and human-machine interfaces for physical and logical design, including: planning, synthesis, partitioning, modeling, simulation, layout, verification, testing, and documentation of integrated-circuit and systems designs of all complexities. Practical applications of aids resulting in producible analog, digital, optical, or microwave integrated circuits are emphasized.


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Most published Xplore authors for Steiner trees

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Xplore Articles related to Steiner trees

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Multicast Routing in Wireless Sensor Networks with Incomplete Information

17th European Wireless 2011 - Sustainable Wireless Technologies, 2011

In this paper we develop a set of heuristic algorithms for the solution of the Quality of Service (QoS) constrained multicast routing problem with incomplete information in Wireless Sensor Networks (WSN). The QoS constrained multicast routing has already been analyzed and proven to be NP-complete with deterministic link measures. In this paper we investigate this problem in the case of ...


An Improved Genetic Algorithm for QOS Multicast Routing

2007 3rd International Workshop on Signal Design and Its Applications in Communications, 2007

Aiming at the problem of multicast routing with multiple QoS constraint, such as delay, bandwidth, losing rate, a new genetic algorithm is brought up based on the k-th shortest path in this paper. Our algorithm outputs an approximate Steiner tree satisfying all QoS constraint of multicast request in a network with e edges and v vertices, in time O(e<sup>+</sup>vlogv<sup>+</sup>kv). Under ...


Improved approximation bounds for the group Steiner problem

Proceedings Design, Automation and Test in Europe, 1998

Given a weighted graph and a family of k disjoint groups of nodes, the group Steiner problem asks for a minimum-cost routing tree that contains at least one node from each group. We give polynomial-time O(k/sup /spl epsiv//)-approximation algorithms for arbitrarily small values of /spl epsiv/>0, improving on the previously known O(k/sup 1/2 /)-approximation. Our techniques also solve the graph ...


A Parallel Distributed Genetic Algorithm for the Prize Collecting Steiner Tree Problem

2015 International Conference on Computational Science and Computational Intelligence (CSCI), 2015

Combinatorial optimization problems are commonly tackled through the use of metaheuristics aimed to improve the way the search space is explored (diversification) and how promising areas are exploited (intensification), in order to obtain good-quality solutions. We present a distributed genetic algorithm to solve the Prize Collecting Steiner Tree Problem, a classical combinatorial optimization problem. The proposed algorithm improves the quality ...


An intelligent optimization method for oil-gas gathering and transportation pipeline network layout

2016 Chinese Control and Decision Conference (CCDC), 2016

Gathering and transferring pipeline network of oil-gas system exerts remarkable impact on construction cost for whole oilfield engineering. In this paper, hierarchical optimization strategy is used to optimize the Multilevel Star-Tree Style of oil-gas gathering and transportation network. Firstly, this paper uses K-Means clustering algorithm to group the oil wells and then views the central point of every group as ...


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Educational Resources on Steiner trees

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IEEE-USA E-Books

  • Multicast Routing in Wireless Sensor Networks with Incomplete Information

    In this paper we develop a set of heuristic algorithms for the solution of the Quality of Service (QoS) constrained multicast routing problem with incomplete information in Wireless Sensor Networks (WSN). The QoS constrained multicast routing has already been analyzed and proven to be NP-complete with deterministic link measures. In this paper we investigate this problem in the case of incomplete information when, in aWireless Sensor Network due to information aggregation or randomly fluctuating traffic loads, link measures are considered to be random variables. We develop novel routing algorithms based on these random link metrics. The objective is to choose a tree which fulfills a given QoS criterion (e.g. delay) with maximum probability. We propose a set of algorithms based on Hopfield Neural Networks to solve the QoS constrained multicast routing problem with incomplete information. In this way, a fast tree selection becomes possible.

  • An Improved Genetic Algorithm for QOS Multicast Routing

    Aiming at the problem of multicast routing with multiple QoS constraint, such as delay, bandwidth, losing rate, a new genetic algorithm is brought up based on the k-th shortest path in this paper. Our algorithm outputs an approximate Steiner tree satisfying all QoS constraint of multicast request in a network with e edges and v vertices, in time O(e<sup>+</sup>vlogv<sup>+</sup>kv). Under the genetic algorithm we proposed, a set of new methods in coding, crossover and mutation operation are also introduced which effectively improving the convergence of the genetic algorithm.

  • Improved approximation bounds for the group Steiner problem

    Given a weighted graph and a family of k disjoint groups of nodes, the group Steiner problem asks for a minimum-cost routing tree that contains at least one node from each group. We give polynomial-time O(k/sup /spl epsiv//)-approximation algorithms for arbitrarily small values of /spl epsiv/>0, improving on the previously known O(k/sup 1/2 /)-approximation. Our techniques also solve the graph Steiner arborescence problem with an O(k/sup /spl epsiv//) approximation bound. These results are directly applicable to a practical problem in VLSI layout, namely the routing of nets with multi-port terminals. Our Java implementation is available on the Web.

  • A Parallel Distributed Genetic Algorithm for the Prize Collecting Steiner Tree Problem

    Combinatorial optimization problems are commonly tackled through the use of metaheuristics aimed to improve the way the search space is explored (diversification) and how promising areas are exploited (intensification), in order to obtain good-quality solutions. We present a distributed genetic algorithm to solve the Prize Collecting Steiner Tree Problem, a classical combinatorial optimization problem. The proposed algorithm improves the quality of the solutions by asynchronously combining distributed populations that evolve in parallel, starting from initial heterogeneous configurations. To show the effectiveness of this approach an empirical study that considers both execution time and solution quality is presented. Results show that better solutions are reached when initial populations combine configurations with high and low fitness.

  • An intelligent optimization method for oil-gas gathering and transportation pipeline network layout

    Gathering and transferring pipeline network of oil-gas system exerts remarkable impact on construction cost for whole oilfield engineering. In this paper, hierarchical optimization strategy is used to optimize the Multilevel Star-Tree Style of oil-gas gathering and transportation network. Firstly, this paper uses K-Means clustering algorithm to group the oil wells and then views the central point of every group as a gas gathering station location. Subsequently, some additional points on original gas-gathering stations is introduced to obtain a shorter pipeline network, which is formulated as a Steiner tree problem. Considering its Non-deterministic Polynomial (NP) characteristic, a modified particle swarm optimization is applied to solve this problem. Finally, some numerical computations are conducted in MATLAB system to demonstrate the effectiveness of the proposed method.

  • Hardness and Approximation of the Selected-Leaf-Terminal Steiner Tree Problem

    For a complete graph G = (V, E) with length function l : E rarr R<sup>+</sup> and two vertex subsets R sub V and R' sube R, a selected-leaf-terminal Steiner tree is a Steiner tree which contains all vertices in R such that all vertices in R \ R' belong to the leaves of this Steiner tree. The selected-leaf- terminal Steiner tree problem is to find a selected-leaf-terminal Steiner tree T whose total lengths Sigma <sub>(u, v)epsiT</sub> l(u, v) is minimum. In this paper, we show that the problem is both NP-complete and MAX SNP-hard when the lengths of edges are restricted to either 1 or 2. We also provide an approximation algorithm for the problem

  • A latency reduction mechanism for virtual machine resource allocation in delay sensitive cloud service

    Resource provisioning in cloud is highly crucial to confirm the delivery of delay sensitive service through cloud like business transaction etc. Reservation into virtual machine takes place based on cloud resource availability. VM resource would be waste because a large number of virtual machine resources are often provisioned to confirm service response time. There were various techniques to measure service response time but these are for selected cloud infrastructures, analyzing and gathering to collect each dataset individually. Few techniques are perform better in offline analysis but not effective for real-time performance measurement. Now, we are proposed an improve and effective light weight mechanism for real time service latency prediction for optimum virtual machine resource allocation in delay-sensitive services of cloud. Our main aim is to present actual and accurate time delay and cloud resource conditions in short reflect time by our latency prediction mechanism. We are expecting to get 80-90% accurate service latency prediction in cloud resources.

  • Steiner tree construction for graphene nanoribbon based circuits in presence of obstacles

    For special geometric structure, graphene nanoribbon based interconnect can be bent only in 0°, 60° and 120° angles. Hence the underlying routing grid of graphene nanoribbon based circuits and interconnects are aligned to these mentioned degrees only. Such a routing grid is known as triangular routing grid. In the routing paths of graphene nanoribbon based inter-connects some hexagonal obstacles may be present there due to some pre-existing routing paths or due to some other reasons. For a given source, a set of n sink terminals and a set of obstacles in a triangular grid we have to interconnect the source and the sink terminals avoiding the obstacles in such a way that hybrid cost is minimized. Here the interconnect cost due to length and bending is known as hybrid cost. In this paper, we propose an algorithm for the construction of obstacles-avoiding hexagonal steiner tree for graphene nanoribbon based circuits. The algorithm is tested in a random data set and the experimental results are quite encouraging.

  • A New Effective Heuristic for Solving Minimal Steiner Tree Problem on Graphs

    Minimal Steiner tree problem on graphs is a traditional optimization problem, which has wide- spread use in different application areas. Greedy heuristics for all the people to use the problem are using the shortest path heuristic, and various variants are also used. In this paper, a new heuristic for solving STPG is proposed. The new heuristic defined a novel neighborhood for local search methods. Experimental results show that the new heuristic outperforms the normal MPH heuristic in solution quality.

  • AnalogRouter: a new approach of current-driven routing for analog circuits

    Summary form only given. We present a new AnalogRouter, specifically developed to address the problems of current densities and electromigration in the routing of multi-terminal, non-planar signal nets in analog circuits. The contributions of our work are: a new current characterization method based on current vectors attached to each terminal; current-driven Steiner tree generation which effectively determines all branch currents prior to detailed routing; and a run-time and memory efficient detailed routing strategy which addresses all features of current-driven circuits, particularly varying wire widths.



Standards related to Steiner trees

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Jobs related to Steiner trees

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