Conferences related to Silicon on insulator technology

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2021 IEEE Photovoltaic Specialists Conference (PVSC)

Photovoltaic materials, devices, systems and related science and technology


2020 IEEE International Electron Devices Meeting (IEDM)

the IEEE/IEDM has been the world's main forum for reporting breakthroughs in technology, design, manufacturing, physics and the modeling of semiconductors and other electronic devices. Topics range from deep submicron CMOS transistors and memories to novel displays and imagers, from compound semiconductor materials to nanotechnology devices and architectures, from micromachined devices to smart -power technologies, etc.


2020 IEEE International Solid- State Circuits Conference - (ISSCC)

ISSCC is the foremost global forum for solid-state circuits and systems-on-a-chip. The Conference offers 5 days of technical papers and educational events related to integrated circuits, including analog, digital, data converters, memory, RF, communications, imagers, medical and MEMS ICs.


2019 IEEE 19th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SiRF)

This is a set of five conferences with a focus on wireless components, applications and systems that affect both now and our future lifestyle. The main niche of these conferences is to bring together technologists, circuit designers, system designers and entrepreneurs at a single event. It was and is the place where these worlds meet, where new processes and systems can be benchmarked against the needs of circuit designers at the bleeding edge of RF systems. This is also an area where today's design compromises can trigger tomorrow's advanced technologies, where dreams can become a reality.


2019 IEEE 28th International Symposium on Industrial Electronics (ISIE)

The conference will provide a forum for discussions and presentations of advancements inknowledge, new methods and technologies relevant to industrial electronics, along with their applications and future developments.


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Periodicals related to Silicon on insulator technology

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Biomedical Circuits and Systems, IEEE Transactions on

The Transactions on Biomedical Circuits and Systems addresses areas at the crossroads of Circuits and Systems and Life Sciences. The main emphasis is on microelectronic issues in a wide range of applications found in life sciences, physical sciences and engineering. The primary goal of the journal is to bridge the unique scientific and technical activities of the Circuits and Systems ...


Biomedical Engineering, IEEE Transactions on

Broad coverage of concepts and methods of the physical and engineering sciences applied in biology and medicine, ranging from formalized mathematical theory through experimental science and technological development to practical clinical applications.


Circuits and Systems I: Regular Papers, IEEE Transactions on

Part I will now contain regular papers focusing on all matters related to fundamental theory, applications, analog and digital signal processing. Part II will report on the latest significant results across all of these topic areas.


Circuits and Systems II: Express Briefs, IEEE Transactions on

Part I will now contain regular papers focusing on all matters related to fundamental theory, applications, analog and digital signal processing. Part II will report on the latest significant results across all of these topic areas.


Circuits and Systems Magazine, IEEE


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Most published Xplore authors for Silicon on insulator technology

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Xplore Articles related to Silicon on insulator technology

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Silicon-on-sapphire: A Practical Material

1992 IEEE International SOI Conference, 1992

None


A new, insulated-gate transistor

1966 IEEE International Solid-State Circuits Conference. Digest of Technical Papers, 1966

None


CMOS technology directions

1983 IEEE International Solid-State Circuits Conference. Digest of Technical Papers, 1983

Unlike NMOS technology, which has been relatively standardized by the industry, CMOS technology is currently much more varied in its methods of production. Presently, the following alternatives (and related issues) exist: bulk CMOS versus CMOS-SOS (cost, yield, performance), P-well versus N-well architecture (performance, latch-up, immunity, alpha immunity), epitaxial versus non-epitaxial substrates (latch-up, alphas, cost, yield) and single versus double poly ...


Novel Devices

2006 IEEE international SOI Conferencee Proceedings, 2006

None


C-band wavelength conversion in ultrasmall silicon-on-insulator waveguides

(CLEO). Conference on Lasers and Electro-Optics, 2005., 2005

We demonstrate four-wave mixing to achieve C-band wavelength conversion in ultrasmall SOI waveguides. This work exploits silicon's large Raman /spl chi//sup (3)/ to further achieve active on-chip functionality. Initial experiments are compared with theoretical calculations.


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Educational Resources on Silicon on insulator technology

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IEEE.tv Videos

Millimeter-Wave Bandpass Filter Using High-Q Conical Inductors and MOM Capacitors: RFIC Interactive Forum
RF-pFET in Fully Depleted SOI Demonstrates 420GHz FT: RFIC Industry Showcase 2017
IMS MicroApps: Silicon Technology Solutions for Wireless Front End Modules
High Efficiency SHG in Heterogeneously Integrated GaAs Ring Resonators - Lin Chang - Closing Ceremony, IPC 2018
Nanophotonic Devices for Quantum Information Processing: Optical Computing - Carsten Schuck at INC 2019
Steep Slope Devices: Advanced Nanodevices - Nicolo Oliva at INC 2019
KeyTalk with Ljubisa Stevanovic: From SiC MOSFET Devices to MW-scale Power Converters - APEC 2017
A CMOS Qubit: Quantum & Probabilistic Computing - Mark Sanquer at INC 2019
Design of Monolithic Silicon-Based Envelope-Tracking Power Amplifiers for Broadband Wireless Applications
Silicon THz: an Opportunity for Innovation
Nanotechnology, we are already there: APEC 2013 KeyTalk with Dr. Terry Lowe
GaN Transistors -- Crushing Silicon in Wireless Energy Transfer
IEEE WEBINAR SERIES-March 5th, 2014: GaN Crushing Silicon...and Let Me Tell You How
An IEEE IPC Special Session with Alexander Spott of The Optoelectronics Research Group
Connecting Silicon & Brain Neurons: Neuromorphic Computing - Stefano Vassanelli at INC 2019
Silicon Labs' Thunderboard Sense (SLTB001A): Mouser Engineering Bench Talk
Augmented Reality: Stan Honey's Impact on Sports Events and Navigation
Electrically-Pumped 1.31 μm MQW Lasers by Direct Epitaxy on Wafer-Bonded InP-on-SOI Substrate - Yingtao Hu - Closing Ceremony, IPC 2018
Single Crystal AlGaN Bulk Acoustic Wave Resonators on Silicon Substrates with High Electromechanical Coupling: RFIC Industry Showcase
ISSCC 2012 - Formal Opening

IEEE-USA E-Books

  • Silicon-on-sapphire: A Practical Material

    None

  • A new, insulated-gate transistor

    None

  • CMOS technology directions

    Unlike NMOS technology, which has been relatively standardized by the industry, CMOS technology is currently much more varied in its methods of production. Presently, the following alternatives (and related issues) exist: bulk CMOS versus CMOS-SOS (cost, yield, performance), P-well versus N-well architecture (performance, latch-up, immunity, alpha immunity), epitaxial versus non-epitaxial substrates (latch-up, alphas, cost, yield) and single versus double poly processing (density, cost, performance). In the future, decisions regarding new isolation techniques (e.g., slot), new interconnect layers (e.g., silicides), and methods for soft-error immunity (e.g., buried layers), may cause a further fragmentation of the CMOS technology.

  • Novel Devices

    None

  • C-band wavelength conversion in ultrasmall silicon-on-insulator waveguides

    We demonstrate four-wave mixing to achieve C-band wavelength conversion in ultrasmall SOI waveguides. This work exploits silicon's large Raman /spl chi//sup (3)/ to further achieve active on-chip functionality. Initial experiments are compared with theoretical calculations.

  • Controlled deposition of electrospun poly(ethylene oxide) fibers via insulators

    Electrospinning is a subjecting of a fluid jet to a high electric field process, by which polymer fibers with nano-scale diameters lower than 100 nm are formed. Significant progress has been made in this area throughout the past few years and this technology has been exploited to a wide range of applications. However, the efficiency is still very low because the repelling force could not be controlled between two needles. For the investigation, two needles were used. And 3 kinds of insulators, including polytetrafluoroethylene (PTFE) tube, polyvinyl chloride resin (PVC) tube and silicon rubber tube, were invited to overcome the repelling force. It is concluded that it is possible to provide a more controllable and easily achieved electrospinning process by using insulators.

  • Off-state modulation of SOI floating-body

    Off-state modulation of the floating-body potential in partially depleted silicon-on-insulator (PDSOI) transistors from the 90-nm technology generation is observed using pulsed current-voltage (I-V) measurements. Varying the off- value of the gate voltage is shown to either decrease the transient on-current (I/sub on,trans/) of PDSOI devices through gate-to-body leakage or increase I/sub on,trans/ due to gate-induced drain leakage. Dependence of I/sub on,trans/ on off-state gate bias is not observed in bulk devices, PDSOI devices with body contacts, or fully depleted SOI devices, confirming the role of floating-body in the observed effects. Thus, off-state conditions should be accounted for when considering floating-body effects and when using pulsed I-V measurements to study self-heating.

  • A 150-V multiple up-drain VDMOS, CMOS, and bipolar process in 'direct-bonded' silicon on insulator on silicon

    Silicon on insulator on silicon (SOIS) has been produced with silicon direct bonding (SDB). Within a silicon film of 15- mu m thickness, islands with ubiquitous oxide isolation have been formed for the simultaneous integration of 150-V power VDMOS transistors, CMOS circuits in a channelless sea-of-gates array with 2- mu m gates, and bipolar transistors. The up-drain VDMOS transistors with 2- Omega -mm/sup 2/ specific on-resistance allow multiple isolated outputs, so high-voltage push-pull drivers can be fabricated in a single chip. The bipolar transistors are comparable to those of a 60-V standard process with vertical n-p-n and lateral p-n-p current gains of 80.<<ETX>>

  • A combined 4-bit quadrature digital to analog converter/mixer for millimeter-wave applications

    A differential digital to 60 GHz quadrature mixer on a 65 nm SOI CMOS process from STMicroelectronics has been designed. Two 5 GS/s 4-bit quadrature base band signals are fully decoded and fed into an unary-weighted current DAC. The DAC output is fed to two RF Gilbert cell mixers driven by an off-chip 60 GHz LO signal. The simulated P1dB output power is -22.5 dBm for an LO power of -2 dBm at 60 GHz for a 6 mA current consumption at 1.2 V. The chip size is 1.54 × 2.6 mm<sup>2</sup>.

  • Novel 3-Axis Gyroscope on a Single Chip using SOI-Technology

    In this paper a novel 3-axis micro-machined gyroscope based on SOI-technology is presented. Compared to three-axis acceleration sensors, high performance gyroscopes having three sensing axis on a single silicon chip are not present on the market due to the more complex functionality based on the Coriolis effect. The new 3-axis gyroscope is based on standard silicon-on-insulator (SOI) -technology requiring no additional buried or cap electrodes. With this device a reduction of the package size of a multi-axis inertial measurement unit (IMU) is achievable at least by a factor of ten. Moreover, performance loss due to the assembly mismatch of spatial configuration of single axis sensors can be neglected and hence the overall costs can be significantly reduced. This paper discusses in detail the concept of the sensing structure, the modified SOI-technology and the latest measurement results of the first prototypes of the novel single-chip 3-axis gyroscope.



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