668 resources related to Silicon devices
- Topics related to Silicon devices
- IEEE Organizations related to Silicon devices
- Conferences related to Silicon devices
- Periodicals related to Silicon devices
- Most published Xplore authors for Silicon devices
2021 IEEE Photovoltaic Specialists Conference (PVSC)
Photovoltaic materials, devices, systems and related science and technology
Energy conversion and conditioning technologies, power electronics, adjustable speed drives and their applications, power electronics for smarter grid, energy efficiency,technologies for sustainable energy systems, converters and power supplies
AMC2020 is the 16th in a series of biennial international workshops on Advanced Motion Control which aims to bring together researchers from both academia and industry and to promote omnipresent motion control technologies and applications.
ECTC is the premier international conference sponsored by the IEEE Components, Packaging and Manufacturing Society. ECTC paper comprise a wide spectrum of topics, including 3D packaging, electronic components, materials, assembly, interconnections, device and system packaging, optoelectronics, reliability, and simulation.
APEC focuses on the practical and applied aspects of the power electronics business. Not just a power designer’s conference, APEC has something of interest for anyone involved in power electronics including:- Equipment OEMs that use power supplies and converters in their equipment- Designers of power supplies, dc-dc converters, motor drives, uninterruptable power supplies, inverters and any other power electronic circuits, equipments and systems- Manufacturers and suppliers of components and assemblies used in power electronics- Manufacturing, quality and test engineers involved with power electronics equipment- Marketing, sales and anyone involved in the business of power electronic- Compliance engineers testing and qualifying power electronics equipment or equipment that uses power electronics
Part I will now contain regular papers focusing on all matters related to fundamental theory, applications, analog and digital signal processing. Part II will report on the latest significant results across all of these topic areas.
IEEE Communications Magazine was the number three most-cited journal in telecommunications and the number eighteen cited journal in electrical and electronics engineering in 2004, according to the annual Journal Citation Report (2004 edition) published by the Institute for Scientific Information. Read more at http://www.ieee.org/products/citations.html. This magazine covers all areas of communications such as lightwave telecommunications, high-speed data communications, personal communications ...
Component parts, hybrid microelectronics, materials, packaging techniques, and manufacturing technology.
Computer, the flagship publication of the IEEE Computer Society, publishes peer-reviewed technical content that covers all aspects of computer science, computer engineering, technology, and applications. Computer is a resource that practitioners, researchers, and managers can rely on to provide timely information about current research developments, trends, best practices, and changes in the profession.
Methods, algorithms, and human-machine interfaces for physical and logical design, including: planning, synthesis, partitioning, modeling, simulation, layout, verification, testing, and documentation of integrated-circuit and systems designs of all complexities. Practical applications of aids resulting in producible analog, digital, optical, or microwave integrated circuits are emphasized.
1958 IEEE International Solid-State Circuits Conference. Digest of Technical Papers, 1958
Presents an abstract of the conference paper.
6th International SYmposium on Antennas, Propagation and EM Theory, 2003. Proceedings. 2003, 2003
ASlC is the "Mantra" among today's electronic engineers. To make a major impact in the integrated circuit arena, it is essential to find a way to add functionally to silicon devices. Such is the aim of the optical application specific integrated circuit (OASIC) research. The photosensitive property of silicon is used in advance imaging technology through "smart pixel" sensors. The ...
2008 Device Research Conference, 2008
In this paper, we establish that bottom-up, vapor-liquid-solid (VLS) grown silicon nanowires can be used to build MOSFETs with characteristics and performance equivalent to contemporary planar FETs. Since VLS nanowires have smoother surfaces and more uniform diameters as compared to top-down fabricated nanowires, we studied the carrier transport in n-FET and p-FET channels made with VLS nanowires having channel diameters ...
2015 IEEE 33rd VLSI Test Symposium (VTS), 2015
As silicon feature sizes approach atomic scales, device reliability is waning and the cost of dependability is on the rise. Post silicon devices, such as CNTs or TFETs, promise better performance but at the cost of even worse reliability. Will we reach the point where the cost of reliability for future silicon substrates is too expensive to justify their existence? ...
IEEE InternationalElectron Devices Meeting, 2005. IEDM Technical Digest., 2005
Silicon Labs' Thunderboard Sense (SLTB001A): Mouser Engineering Bench Talk
Steep Slope Devices: Advanced Nanodevices - Nicolo Oliva at INC 2019
Moving from Si to SiC from the End User’s Perspective - Muhammad Nawaz, APEC 2018
Single Crystal AlGaN Bulk Acoustic Wave Resonators on Silicon Substrates with High Electromechanical Coupling: RFIC Industry Showcase
A CMOS Qubit: Quantum & Probabilistic Computing - Mark Sanquer at INC 2019
KeyTalk with Ljubisa Stevanovic: From SiC MOSFET Devices to MW-scale Power Converters - APEC 2017
The Evolution and Future of RF Silicon Technologies for THz Applications
Connecting Silicon & Brain Neurons: Neuromorphic Computing - Stefano Vassanelli at INC 2019
Beyond CMOS: International Roadmap for Devices and Systems
Takuo Sugano receives the IEEE Robert N. Noyce Medal - Honors Ceremony 2016
Kurt Petersen: 2019 IEEE Medal of Honor Recipient
BSIM Spice Model Enables FinFET and UTB IC Design
Design of Monolithic Silicon-Based Envelope-Tracking Power Amplifiers for Broadband Wireless Applications
From the Quantum Moore's Law toward Silicon Based Universal Quantum Computing - IEEE Rebooting Computing 2017
Silicon THz: an Opportunity for Innovation
IMS MicroApps: Silicon Technology Solutions for Wireless Front End Modules
IEEE Patent Presentation
An IEEE IPC Special Session with Alexander Spott of The Optoelectronics Research Group
Silicon Photonics: An IPC Keynote with Michal Lipson
Presents an abstract of the conference paper.
ASlC is the "Mantra" among today's electronic engineers. To make a major impact in the integrated circuit arena, it is essential to find a way to add functionally to silicon devices. Such is the aim of the optical application specific integrated circuit (OASIC) research. The photosensitive property of silicon is used in advance imaging technology through "smart pixel" sensors. The heart of an OASIC chip is poly-si because it is a wavelength-sensitive reflector, absorber and transmitter of light.
In this paper, we establish that bottom-up, vapor-liquid-solid (VLS) grown silicon nanowires can be used to build MOSFETs with characteristics and performance equivalent to contemporary planar FETs. Since VLS nanowires have smoother surfaces and more uniform diameters as compared to top-down fabricated nanowires, we studied the carrier transport in n-FET and p-FET channels made with VLS nanowires having channel diameters down to 3.5 nm.
As silicon feature sizes approach atomic scales, device reliability is waning and the cost of dependability is on the rise. Post silicon devices, such as CNTs or TFETs, promise better performance but at the cost of even worse reliability. Will we reach the point where the cost of reliability for future silicon substrates is too expensive to justify their existence? Or will we discover new ways to contain the cost of dependability? If we do discover low- cost reliability mechanisms, how much time do we have before we must deploy them? If not, how much life does silicon have left?
Physical and metering characteristics of three room temperature X-ray dosimeters used in clinical applications, PTW diamond, Thompson MOSFET and Scanditronix silicon diode are compared with polycrystalline diamond X-ray detectors. Development of dosimeters based on natural diamond carried out by PTW have provided superior characteristics with respect to other solid state silicon devices such diodes or MOSFETs. Radiation hardness, soft tissue equivalence, lack of toxicity, negligible energy dependence and optimal sensitivity and reproducibility, have made PTW the ideal metering device for clinical dosimetry. However general use of natural dosimeters have been hindered by their rarity, very high cost and unpredictable electronic behavior due to lack of control on impurity content and crystal defects. Therefore, there have been a growing use of silicon dosimeters especially for on line configuration and in vivo dosimetry. However, both MOSFET and silicon diode do not appear to be ideal for such application for their short lifetime. Detectors based on polycrystalline diamonds seem to be the best candidate for future dosimetry since they have most of the characteristics of natural diamonds at potentially much lower cost. In this context, the performances of a laboratory made polycrystalline diamond device are compared to those of the three, PTW, Scanditronix and Thomson commercial dosimeters
The thermal fatigue life of silicon devices die bonded with lead-tin (Pb-Sn) alloys of 14 different compositions, from Pb-3%Sn to Pb-95% Su was investigated. A silver-plated silicon chip and a nickelplated copper substrate were soldered together using a piece of thin foil (100µmt) solder. Soldered silicon devices were exposed to thermal cycling tests of - 55 to 150°C (1 cycle/h). The thermal fatigue life of a device was defined as the number of thermal cycles when the heat resistance of the device reached 1.5 times its original value. The maximum thermal fatigue life was observed for Pb-50%Sn and was about 9 times that for Pb5%Sn. Solder grain growth during the thermal cycling was also observed, and scanning electron microscope (SEM) measurements showed that cracks in the solder propagated selectively in the at (Pb-rich) region.
The origin of damage causing radiation in a beam blanking scanning electron micrograph (BBSEM) was identified and removed for single-event upset (SEU) testing. The improved BBSEM was successfully used to locate SEU sensitive areas in highly integrated silicon devices.
The simulation method presented above will be applied to various VCSEL design configurations in order to obtain comparative information about the utility of certain design features. We show the three dimensional fundamental mode pattern of a standard oxide confined VCSEL with a l /spl mu/m diameter oxide aperture which occupies the first DBR layer. Design parameters which will be tested include oxide placement, oxide thickness, tapering of the oxide tip, and DBR design, amongst others.
In this paper another application of an Atomic Force Microscope (AFM) using conductive tips is presented: Voltages are applied to the semiconductor structure while a conductive tip is scanned across a cross section of the device. The tip is used as a voltage probe determining the local potential with very high resolution (nm limited by the tip size). Home-made cantilevers have been used to determine both one-and two-dimensional distributions. After a description of the preparation method the promising properties of the technique are demonstrated for simple p-n junctions. Prospectives for charge carrier profiling and electrical characterisation of fully processed devices are discussed.
No standards are currently tagged "Silicon devices"