Conferences related to Silicon alloys

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2020 57th ACM/ESDA/IEEE Design Automation Conference (DAC)

The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2022 59th ACM/ESDA/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2021 58th ACM/ESDA/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2019 56th ACM/ESDA/IEEE Design Automation Conference (DAC)

    EDA (Electronics Design Automation) is becoming ever more important with the continuous scaling of semiconductor devices and the growing complexities of their use in circuits and systems. Demands for lower-power, higher-reliability and more agile electronic systems raise new challenges to both design and design automation of such systems. For the past five decades, the primary focus of research track at DAC has been to showcase leading-edge research and practice in tools and methodologies for the design of circuits and systems.

  • 2018 55th ACM/ESDA/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2017 54th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2016 53nd ACM/EDAC/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2015 52nd ACM/EDAC/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2014 51st ACM/EDAC/IEEE Design Automation Conference (DAC)

    DAC Description for TMRF The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading

  • 2013 50th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 session on design methodologies and EDA tool developments, keynotes, panels, plus User Track presentations. A diverse worldwide community representing more than 1,000 organization attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2012 49th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The Design Automation Conference (DAC) is the premier event for the design of electronic circuits and systems, and for EDA and silicon solutions. DAC features a wide array of technical presentations plus over 200 of the leading electronics design suppliers

  • 2011 48th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The Design Automation Conference is the world s leading technical conference and tradeshow on electronic design and design automation. DAC is where the IC Design and EDA ecosystem learns, networks, and does business.

  • 2010 47th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The Design Automation Conference (DAC) is the premier event for the design of electronic circuits and systems, and for EDA and silicon solutions. DAC features a wide array of technical presentations plus over 200 of the leading electronics design suppliers.

  • 2009 46th ACM/EDAC/IEEE Design Automation Conference (DAC)

    DAC is the premier event for the electronic design community. DAC offers the industry s most prestigious technical conference in combination with the biggest exhibition, bringing together design, design automation and manufacturing market influencers.

  • 2008 45th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The Design Automation Conference (DAC) is the premier event for the design of electronic circuits and systems, and for EDA and silicon solutions. DAC features a wide array of technical presentations plus over 250 of the leading electronics design suppliers.

  • 2007 44th ACM/IEEE Design Automation Conference (DAC)

    The Design Automation Conference (DAC) is the premier Electronic Design Automation (EDA) and silicon solution event. DAC features over 50 technical sessions covering the latest in design methodologies and EDA tool developments and an Exhibition and Demo Suite area with over 250 of the leading EDA, silicon and IP Providers.

  • 2006 43rd ACM/IEEE Design Automation Conference (DAC)

  • 2005 42nd ACM/IEEE Design Automation Conference (DAC)

  • 2004 41st ACM/IEEE Design Automation Conference (DAC)

  • 2003 40th ACM/IEEE Design Automation Conference (DAC)

  • 2002 39th ACM/IEEE Design Automation Conference (DAC)

  • 2001 38th ACM/IEEE Design Automation Conference (DAC)

  • 2000 37th ACM/IEEE Design Automation Conference (DAC)

  • 1999 36th ACM/IEEE Design Automation Conference (DAC)

  • 1998 35th ACM/IEEE Design Automation Conference (DAC)

  • 1997 34th ACM/IEEE Design Automation Conference (DAC)

  • 1996 33rd ACM/IEEE Design Automation Conference (DAC)


2020 IEEE 70th Electronic Components and Technology Conference (ECTC)

ECTC is the premier international conference sponsored by the IEEE Components, Packaging and Manufacturing Society. ECTC paper comprise a wide spectrum of topics, including 3D packaging, electronic components, materials, assembly, interconnections, device and system packaging, optoelectronics, reliability, and simulation.


2020 IEEE Applied Power Electronics Conference and Exposition (APEC)

APEC focuses on the practical and applied aspects of the power electronics business. Not just a power designer’s conference, APEC has something of interest for anyone involved in power electronics including:- Equipment OEMs that use power supplies and converters in their equipment- Designers of power supplies, dc-dc converters, motor drives, uninterruptable power supplies, inverters and any other power electronic circuits, equipments and systems- Manufacturers and suppliers of components and assemblies used in power electronics- Manufacturing, quality and test engineers involved with power electronics equipment- Marketing, sales and anyone involved in the business of power electronic- Compliance engineers testing and qualifying power electronics equipment or equipment that uses power electronics


2020 IEEE International Electron Devices Meeting (IEDM)

the IEEE/IEDM has been the world's main forum for reporting breakthroughs in technology, design, manufacturing, physics and the modeling of semiconductors and other electronic devices. Topics range from deep submicron CMOS transistors and memories to novel displays and imagers, from compound semiconductor materials to nanotechnology devices and architectures, from micromachined devices to smart -power technologies, etc.


2020 IEEE Nuclear Science Symposium and Medical Imaging Conference (NSS/MIC)

All areas of ionizing radiation detection - detectors, signal processing, analysis of results, PET development, PET results, medical imaging using ionizing radiation


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Periodicals related to Silicon alloys

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Electron Device Letters, IEEE

Publishes original and significant contributions relating to the theory, design, performance and reliability of electron devices, including optoelectronic devices, nanoscale devices, solid-state devices, integrated electronic devices, energy sources, power devices, displays, sensors, electro-mechanical devices, quantum devices and electron tubes.


Electron Devices, IEEE Transactions on

Publishes original and significant contributions relating to the theory, design, performance and reliability of electron devices, including optoelectronics devices, nanoscale devices, solid-state devices, integrated electronic devices, energy sources, power devices, displays, sensors, electro-mechanical devices, quantum devices and electron tubes.


Instrumentation and Measurement, IEEE Transactions on

Measurements and instrumentation utilizing electrical and electronic techniques.


Lightwave Technology, Journal of

All aspects of optical guided-wave science, technology, and engineering in the areas of fiber and cable technologies; active and passive guided-wave componentry (light sources, detectors, repeaters, switches, fiber sensors, etc.); integrated optics and optoelectronics; systems and subsystems; new applications; and unique field trials.


Magnetics, IEEE Transactions on

Science and technology related to the basic physics and engineering of magnetism, magnetic materials, applied magnetics, magnetic devices, and magnetic data storage. The Transactions publishes scholarly articles of archival value as well as tutorial expositions and critical reviews of classical subjects and topics of current interest.


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Most published Xplore authors for Silicon alloys

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Xplore Articles related to Silicon alloys

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Electron Transport Models For Unstrained And Strained Si And SiGe

[Proceedings] 1993 International Workshop on VLSI Process and Device Modeling (1993 VPAD), 1993

None


Student realization in cleanroom of silicon-germanium thin film transistors

Proceedings 1999 IEEE International Conference on Microelectronic Systems Education (MSE'99) 'Systems Education in the 21st Century' (Cat. No.99-63794), 1999

This tutorial is intended for graduate students specialized in microelectronics formation. This training allows the student to fabricate a simple but original device. A thin film transistor for which the active layer is made of silicon-germanium alloy has been fabricated and electrically characterized. This experiment allows the student to work on several types of process step and to evaluate the ...


Low- and high-field electron-transport parameters for unstrained and strained Si/sub 1-x/Ge/sub x/

IEEE Electron Device Letters, 1997

Ohmic minority and majority drift mobilities as well as saturation velocities are reported for unstrained and strained Si/sub 1-x/Ge/sub x/ alloys up to z=0.31. The electron-transport model is verified by measurements of the in- plane majority drift mobility in strained Si/sub 1-x/Ge/sub x/ samples for various dopant and Ge concentrations. Saturation velocities are determined by full-band Monte Carlo simulations. There ...


Creation of SiGe-based SIMOX structures by low energy oxygen implantation

1997 IEEE International SOI Conference Proceedings, 1997

Summary form only given. An ultra thin, dislocation-free, SiGe virtual substrate on SiO/sub 2/ has been demonstrated as a new class of SOI structure by using low energy oxygen implantation. SIMOX-based virtual substrates are expected to boost the electronic as well as optoelectronic potentials of Si/SiGe.


A novel Si/SiGe sandwich polysilicon TFT for SRAM applications

1995 53rd Annual Device Research Conference Digest, 1995

In this work, the performance of polysilicon TFTs has been improved for the first time by introduction of a thin polycrystalline silicon-germanium alloy layer sandwiched between thin polysilicon films in the channel of the TFTs. The bandgap discontinuity in the valence band between polysilicon and SiGe confines holes in the middle of the channel away from the high defect-density polysilicon-oxide ...


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Educational Resources on Silicon alloys

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IEEE.tv Videos

IEEE Magnetics Distinguished Lecture - Alison B. Flatau
From the Quantum Moore's Law toward Silicon Based Universal Quantum Computing - IEEE Rebooting Computing 2017
Design of Monolithic Silicon-Based Envelope-Tracking Power Amplifiers for Broadband Wireless Applications
Silicon Labs' Thunderboard Sense (SLTB001A): Mouser Engineering Bench Talk
Silicon THz: an Opportunity for Innovation
Silicon Photonics: An IPC Keynote with Michal Lipson
IEEE Patent Presentation
IMS MicroApps: Silicon Technology Solutions for Wireless Front End Modules
Magnetic Nanowires: Revolutionizing Hard Drives, RAM, and Cancer Treatment
An IEEE IPC Special Session with Alexander Spott of The Optoelectronics Research Group
Nanophotonic Devices for Quantum Information Processing: Optical Computing - Carsten Schuck at INC 2019
Single Crystal AlGaN Bulk Acoustic Wave Resonators on Silicon Substrates with High Electromechanical Coupling: RFIC Industry Showcase
Materials Challenges for Next-Generation, High-Density Magnetic Recording - Kazuhiro Hono: IEEE Magnetics Distinguished Lecture 2016
Moving from Si to SiC from the End User’s Perspective - Muhammad Nawaz, APEC 2018
The Evolution and Future of RF Silicon Technologies for THz Applications
2011 IEEE Awards Ernst Weber Engineering Leadership Recognition - Tze-Chiang Chen
Steep Slope Devices: Advanced Nanodevices - Nicolo Oliva at INC 2019
Niobium Manufacturing for Superconductivity - ASC-2014 Plenary series - 5 of 13 - Tuesday 2014/8/12
Alice Wang - SSCS Chip Chat Podcast, Episode 6
Chief Scientist Barbara De Salvo on How Leti is a Pioneer to Innovation - 2016 Women in Engineering Conference

IEEE-USA E-Books

  • Electron Transport Models For Unstrained And Strained Si And SiGe

    None

  • Student realization in cleanroom of silicon-germanium thin film transistors

    This tutorial is intended for graduate students specialized in microelectronics formation. This training allows the student to fabricate a simple but original device. A thin film transistor for which the active layer is made of silicon-germanium alloy has been fabricated and electrically characterized. This experiment allows the student to work on several types of process step and to evaluate the role of the active layer on the electrical characteristics of a transistor.

  • Low- and high-field electron-transport parameters for unstrained and strained Si/sub 1-x/Ge/sub x/

    Ohmic minority and majority drift mobilities as well as saturation velocities are reported for unstrained and strained Si/sub 1-x/Ge/sub x/ alloys up to z=0.31. The electron-transport model is verified by measurements of the in- plane majority drift mobility in strained Si/sub 1-x/Ge/sub x/ samples for various dopant and Ge concentrations. Saturation velocities are determined by full-band Monte Carlo simulations. There is no substantial decrease in the mobility perpendicular to the Si/SiGe interface for doping concentrations above 10/sup 19/ cm/sup -3/ and growing x. In contrast, the saturation-drift velocity is strongly reduced with x.

  • Creation of SiGe-based SIMOX structures by low energy oxygen implantation

    Summary form only given. An ultra thin, dislocation-free, SiGe virtual substrate on SiO/sub 2/ has been demonstrated as a new class of SOI structure by using low energy oxygen implantation. SIMOX-based virtual substrates are expected to boost the electronic as well as optoelectronic potentials of Si/SiGe.

  • A novel Si/SiGe sandwich polysilicon TFT for SRAM applications

    In this work, the performance of polysilicon TFTs has been improved for the first time by introduction of a thin polycrystalline silicon-germanium alloy layer sandwiched between thin polysilicon films in the channel of the TFTs. The bandgap discontinuity in the valence band between polysilicon and SiGe confines holes in the middle of the channel away from the high defect-density polysilicon-oxide interface. From the process point of view, it is better to have a sandwich layer than having SiGe along the entire depth of the channel because oxides on SiGe are known to be of bad quality.

  • Excimer Laser Crystallisation and Processing Of Polysilicon Thin Film Transistors

    None

  • Low-loss 1×2 multimode interference wavelength demultiplexer in silicon-germanium alloy

    A low-loss multimode interference wavelength demultiplexer for 1.3- and 1.55-μm operations based on the silicon-germanium alloy material has been proposed and demonstrated. The device was fabricated by molecular beam epitaxy followed by lithography and plasma etching. The input/output facets were polished mechanically. The measured insertion losses are 4.29 and 4.28 dB and the extinction ratios are 25 and 22 dB at 1.3 and 1.55 μm, respectively.

  • Potential of Si-based superlattice thermoelectric materials for integration with Si microelectronics

    Freestanding, thin-film, Si/Ge superlattice (SL) structures over a wide range of periods, from /spl sim/300 A to /spl sim/10 A, have been experimentally investigated for their thermoelectric properties in the plane of the SL interfaces. We have observed a several-fold enhancement in the power factor at 300 K in these Si/Ge SL structures, compared to thin-film SiGe and bulk SiGe alloys. The thermoelectric power factor and Hall-effect measurements, with model calculations for effective conduction-band density of states, have been used to understand the mechanism behind the strong enhancement in power factor in these apparently weakly-quantum confined SL structures. AC calorimetry measurements have also been completed to determine the in-plane thermal diffusivity of these Si/Ge SL thin-films. The variation of thermal conductivity (k) with the SL period appears complex, with reduction in k coming apparently from both short-period and lattice-mismatch effects. Finally, we will present the first experimental demonstration of a factorial improvement in the three-dimensional figure-of-merit (ZT/sub 3D/) of Si/Ge SL structures with respect to comparable bulk SiGe alloys, with all the properties measured in the same direction, suggesting a proof-of-concept validation for thin-film SL structures. The implications of the ZT enhancement with Si/Ge SL structures would be significant for Si-based microelectronic cooling.

  • A Si/sub 0.7/Ge/sub 0.3/ strained layer etch stop for the generation of bond and etch back SOI

    Summary form only given. The authors discuss the use of an MBE grown Si/sub 0.7/Ge/sub 0.3/ strained layer as an etch stop, and the successful fabrication of bond and etch-back silicon on insulator with an undoped 200-nm silicon layer using this technology. Full integrity of the etch stop was maintained following oxidation and bonding of the prime wafer. Defects generated in the strained etch stop region during thermal treatments did not propagate into the active silicon device region.<<ETX>>

  • Lattice-Mismatch and CMOS

    We show that increasing the lattice constant on which CMOS electronics is constructed allows for an increasing electron and hole mobility in the NMOS and PMOS devices, respectively. This trend began with strained Si, and we have shown in research devices that compressed Ge combined with tensile Si can create previously unattainable high mobility MOS with high inversion charge. We also show that by increasing the lattice on Si to Ge, III-V electron channels become feasible, as well as integrated III-V optoelectronics. The core technology in advancing this lattice constant roadmap is dislocation and interface defect control



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