Conferences related to Silicidation

Back to Top

2021 IEEE Photovoltaic Specialists Conference (PVSC)

Photovoltaic materials, devices, systems and related science and technology


2020 IEEE International Electron Devices Meeting (IEDM)

the IEEE/IEDM has been the world's main forum for reporting breakthroughs in technology, design, manufacturing, physics and the modeling of semiconductors and other electronic devices. Topics range from deep submicron CMOS transistors and memories to novel displays and imagers, from compound semiconductor materials to nanotechnology devices and architectures, from micromachined devices to smart -power technologies, etc.


2019 20th International Conference on Solid-State Sensors, Actuators and Microsystems & Eurosensors XXXIII (TRANSDUCERS & EUROSENSORS XXXIII)

The world's premiere conference in MEMS sensors, actuators and integrated micro and nano systems welcomes you to attend this four-day event showcasing major technological, scientific and commercial breakthroughs in mechanical, optical, chemical and biological devices and systems using micro and nanotechnology.The major areas of activity in the development of Transducers solicited and expected at this conference include but are not limited to: Bio, Medical, Chemical, and Micro Total Analysis Systems Fabrication and Packaging Mechanical and Physical Sensors Materials and Characterization Design, Simulation and Theory Actuators Optical MEMS RF MEMS Nanotechnology Energy and Power


2019 IEEE International Reliability Physics Symposium (IRPS)

Meeting of academia and research professionals to discuss reliability challenges.


2018 14th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT)

Process & Device Technologies1. Channel Engineering2. High-k/Metal gate Technology3. Advanced Source/Drain Technology4. Interconnect Technology5. Advanced 3D Integration6. Novel Process Technologies7. Ultra-Thin Body Transistors and Device Variability8. Advanced High-k Metal Gate SoC and High Performance CMOS Platforms 9. CMOS Performance Enhancing and Novel Devices 10. Advanced FinFETs and Nanowire FETs11. CNT, MTJ Devices and Nanowire Photodiodes12. Low- Power and Steep Slope Switching Devices13. Graphene Devices14. Advanced Technologies for Ge MOSFETs15. Organic semiconductor devices and technologies16. Compound semiconductor devices and Technology 17. Ultra High Speed Transistors, HEMT/HBT etc. 18. Advanced Power Devices and Reliability19. Flash Memory20. IT Magnetic RAM21. Resistive RAM


More Conferences

Periodicals related to Silicidation

Back to Top

Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on

Methods, algorithms, and human-machine interfaces for physical and logical design, including: planning, synthesis, partitioning, modeling, simulation, layout, verification, testing, and documentation of integrated-circuit and systems designs of all complexities. Practical applications of aids resulting in producible analog, digital, optical, or microwave integrated circuits are emphasized.


Electron Device Letters, IEEE

Publishes original and significant contributions relating to the theory, design, performance and reliability of electron devices, including optoelectronic devices, nanoscale devices, solid-state devices, integrated electronic devices, energy sources, power devices, displays, sensors, electro-mechanical devices, quantum devices and electron tubes.


Electron Devices, IEEE Transactions on

Publishes original and significant contributions relating to the theory, design, performance and reliability of electron devices, including optoelectronics devices, nanoscale devices, solid-state devices, integrated electronic devices, energy sources, power devices, displays, sensors, electro-mechanical devices, quantum devices and electron tubes.


Microelectromechanical Systems, Journal of

A journal covering Microsensing, Microactuation, Micromechanics, Microdynamics, and Microelectromechanical Systems (MEMS). Contains articles on devices with dimensions that typically range from macrometers to millimeters, microfabrication techniques, microphenomena; microbearings, and microsystems; theoretical, computational, modeling and control results; new materials and designs; tribology; microtelemanipulation; and applications to biomedical engineering, optics, fluidics, etc. The Journal is jointly sponsored by the IEEE Electron Devices ...


Nanotechnology, IEEE Transactions on

The proposed IEEE Transactions on Nanotechnology will be devoted to the publication of manuscripts of archival value in the general area of nanotechnology, that is rapidly emerging as one of the fastest growing and most promising new technological developments for the next generation and beyond.


More Periodicals

Most published Xplore authors for Silicidation

Back to Top

Xplore Articles related to Silicidation

Back to Top

Salicides for 0.18 um and below

28th European Solid-State Device Research Conference, 1998

None


A novel salicide process (SEDAM) for sub-quarter micron CMOS devices

Proceedings of 1994 IEEE International Electron Devices Meeting, 1994

A new salicide process, featuring selective silicon deposition and subsequent pre-amorphization (SEDAM), has been developed for sub-quarter micron CMOS devices. Non-doped silicon films were selectively deposited on gate and source/drain regions to avoid silicidation suppression due to heavily-doped As. Furthermore, silicidation was enhanced by pre-amorphization on the narrow gate and source/drain regions. TiSi/sub 2/ films, with a sheet resistance of ...


Topography and Schottky contact models applied to NiSi SALICIDE process [MOSFET applications]

International Conference on Simulation of Semiconductor Processes and Devices, 2003. SISPAD 2003., 2003

Nickel monosilicide (NiSi) is considered to be a promising candidate for the self-aligned silicide (SALICIDE) material of 65 nm node MOSFETs and beyond. Therefore, an accurate simulation method for the NiSi SALICIDE process is required in order to design the optimum device. We realize, for the first time, the integrated simulation with silicide topography and Schottky contact models, and propose ...


Dopant redistribution induced by Ni silicidation at 300/spl deg/C

The Fourth International Workshop on Junction Technology, 2004. IWJT '04., 2004

The dopant (arsenic and boron) redistribution induced by Ni silicidation at 300/spl deg/C is investigated by cross-section transmission electron microscopy and secondary ion mass spectroscopy. The dopant segregation at silicide/Si interface is observed. Also a high concentration dopant peak near silicide surface is revealed and attributed to void layer formation due to Kirkendall voiding effect and volume reduction after silicidation. ...


Dual phase TOSI-gate process on High-K dielectrics in a CMP-less flow

2006 European Solid-State Device Research Conference, 2006

In this paper, we demonstrate for the first time a new original approach of the integration of dual phase totally silicided (TOSI) gates using a close-to- standard CMOS flow without any additional CMP step targeting the use of NiSi for NMOS and Ni<sub>2</sub>Si for the PMOS gate electrode on high-k dielectrics. The impact of the TOSI-process on the gate stack ...


More Xplore Articles

Educational Resources on Silicidation

Back to Top

IEEE.tv Videos

No IEEE.tv Videos are currently tagged "Silicidation"

IEEE-USA E-Books

  • Salicides for 0.18 um and below

    None

  • A novel salicide process (SEDAM) for sub-quarter micron CMOS devices

    A new salicide process, featuring selective silicon deposition and subsequent pre-amorphization (SEDAM), has been developed for sub-quarter micron CMOS devices. Non-doped silicon films were selectively deposited on gate and source/drain regions to avoid silicidation suppression due to heavily-doped As. Furthermore, silicidation was enhanced by pre-amorphization on the narrow gate and source/drain regions. TiSi/sub 2/ films, with a sheet resistance of /spl les/10 /spl Omega/sq., were stably and uniformly formed on all n/sup +/- and p/sup +/-poly-Si and source/drain diffusion layers for 0.15 /spl mu/m CMOS devices without degradation in the I-V characteristics.<<ETX>>

  • Topography and Schottky contact models applied to NiSi SALICIDE process [MOSFET applications]

    Nickel monosilicide (NiSi) is considered to be a promising candidate for the self-aligned silicide (SALICIDE) material of 65 nm node MOSFETs and beyond. Therefore, an accurate simulation method for the NiSi SALICIDE process is required in order to design the optimum device. We realize, for the first time, the integrated simulation with silicide topography and Schottky contact models, and propose a calibration strategy of contact resistance. In this paper, we demonstrate the accurate simulation results of the silicide both in terms of its topography and contact resistance for the NiSi SALICIDE process.

  • Dopant redistribution induced by Ni silicidation at 300/spl deg/C

    The dopant (arsenic and boron) redistribution induced by Ni silicidation at 300/spl deg/C is investigated by cross-section transmission electron microscopy and secondary ion mass spectroscopy. The dopant segregation at silicide/Si interface is observed. Also a high concentration dopant peak near silicide surface is revealed and attributed to void layer formation due to Kirkendall voiding effect and volume reduction after silicidation. The re- segregation during the conversion from Ni/sub 2/Si to NiSi contributes an extra boron peak in the middle region of the formed silicide film on P+/N Si.

  • Dual phase TOSI-gate process on High-K dielectrics in a CMP-less flow

    In this paper, we demonstrate for the first time a new original approach of the integration of dual phase totally silicided (TOSI) gates using a close-to- standard CMOS flow without any additional CMP step targeting the use of NiSi for NMOS and Ni<sub>2</sub>Si for the PMOS gate electrode on high-k dielectrics. The impact of the TOSI-process on the gate stack characteristics is investigated in detail on capacitance, gate leakage and work function data. With respect to poly-Si gated devices we find a significant reduction of the effective oxide thickness in inversion without degradation of the gate leakage statistics. The results emphasize the potential of the integration of TOSI- gates on high-k gate oxides

  • Formation of (TixW1-x)Si2/(TixW1-x)N contacts by rapid thermal silicidation

    The formation of (TixW1-x)Si2/(TixW1-x)N by rapid thermnal processing of TixW1-x on Si in an N2 ambient is investigated. A distinct snowploughing of As atoms is observed during silicide formation. The diffusion barrier properties of the (TixW1-x)Si2/(TixW1-x)N stack in contact with Al is investigated upon post-metal annealing.

  • Comparison of the Behaviour of Arsenic During Titanium and Tungsten Disilicide Formation

    The direct reaction between W or Ti and silicon, to form tungsten silicide and titanium silicide is studied for both unimplanted and arsenic implanted silicon substrates. For W on implanted substrates, the silicide growth rate decreases drastically, being dependent on the implantation dose and energy. The dopant effect can be explained by the formation of a dopant rich phase at the silicide/silicon interface. For Ti, the dopant effect is much less pronounced, slowing down the rate of formation of the silicon rich phase TiSi<inf>2</inf>. A clear arsenic pile up at the silicide-silicon interface is not observed. The diffusion barrier is distributed in the whole silicide layer.

  • Impact of NI Layer Thickness and Anneal Time on Nickel Silicide Formation by Rapid Thermal Processing

    The effects of different initial Ni layer thickness and various anneal times during the nickel silicidation process have been investigated as a function of rapid thermal annealing temperature between 200 and 800degC. By means of electrical and optical measurements the Ni silicide phase transformations are explained. Spectroscopic ellipsometry has been used to measure Ni and Ni silicide thickness. An oxide on the Ni layer was found to be generated, if the time between Ni deposition and annealing is not short enough. Also a method to monitor the Ni silicidation process on RTP systems was introduced

  • Silicide technology for USJ in next technology node

    Silicide technology for ultra-shallow junction in next technology node is discussed. Salicide material is changed from low resistivity refractory metal silicide to near-noble metal silicide from the view point of less consumption of Si by silicidation. The pn junction leakage for shallow S/D can be drastically improved by NiSi as compared with CoSi/sub 2/.

  • NiSi nano-contacts to strained and unstrained silicon nanowires

    Nano-contacts of NiSi to n+and p+doped strained and unstrained Si nanowires (NWs) were studied. Several Ni silicide phases were found: Ni2Si formed under the Ni electrodes, Ni3Si very close to the Ni electrodes, while NiSi was observed along the Si NWs. The NiSi nanowire length decreases with increasing wire cross section A. The silicidation speed along the Si NW shows a linear relation to 1/A, indicating volume silicidation of the Si NW. Uniaxial strain seems to have no effect on the silicidation speed. Contact resistivities as low as 1.2 × 10-8Ω·cm2were obtained for NiSi contacts to both, strained and unstrained Si nanowires.



Standards related to Silicidation

Back to Top

No standards are currently tagged "Silicidation"


Jobs related to Silicidation

Back to Top