Conferences related to Sampled data circuits

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2020 IEEE 70th Electronic Components and Technology Conference (ECTC)

ECTC is the premier international conference sponsored by the IEEE Components, Packaging and Manufacturing Society. ECTC paper comprise a wide spectrum of topics, including 3D packaging, electronic components, materials, assembly, interconnections, device and system packaging, optoelectronics, reliability, and simulation.


2020 IEEE International Conference on Plasma Science (ICOPS)

IEEE International Conference on Plasma Science (ICOPS) is an annual conference coordinated by the Plasma Science and Application Committee (PSAC) of the IEEE Nuclear & Plasma Sciences Society.


2020 IEEE International Solid- State Circuits Conference - (ISSCC)

ISSCC is the foremost global forum for solid-state circuits and systems-on-a-chip. The Conference offers 5 days of technical papers and educational events related to integrated circuits, including analog, digital, data converters, memory, RF, communications, imagers, medical and MEMS ICs.


2020 IEEE Nuclear Science Symposium and Medical Imaging Conference (NSS/MIC)

All areas of ionizing radiation detection - detectors, signal processing, analysis of results, PET development, PET results, medical imaging using ionizing radiation


ICASSP 2020 - 2020 IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP)

The ICASSP meeting is the world's largest and most comprehensive technical conference focused on signal processing and its applications. The conference will feature world-class speakers, tutorials, exhibits, and over 50 lecture and poster sessions.


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Periodicals related to Sampled data circuits

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Applied Superconductivity, IEEE Transactions on

Contains articles on the applications and other relevant technology. Electronic applications include analog and digital circuits employing thin films and active devices such as Josephson junctions. Power applications include magnet design as well asmotors, generators, and power transmission


Automatic Control, IEEE Transactions on

The theory, design and application of Control Systems. It shall encompass components, and the integration of these components, as are necessary for the construction of such systems. The word `systems' as used herein shall be interpreted to include physical, biological, organizational and other entities and combinations thereof, which can be represented through a mathematical symbolism. The Field of Interest: shall ...


Biomedical Circuits and Systems, IEEE Transactions on

The Transactions on Biomedical Circuits and Systems addresses areas at the crossroads of Circuits and Systems and Life Sciences. The main emphasis is on microelectronic issues in a wide range of applications found in life sciences, physical sciences and engineering. The primary goal of the journal is to bridge the unique scientific and technical activities of the Circuits and Systems ...


Biomedical Engineering, IEEE Transactions on

Broad coverage of concepts and methods of the physical and engineering sciences applied in biology and medicine, ranging from formalized mathematical theory through experimental science and technological development to practical clinical applications.


Circuits and Systems for Video Technology, IEEE Transactions on

Video A/D and D/A, display technology, image analysis and processing, video signal characterization and representation, video compression techniques and signal processing, multidimensional filters and transforms, analog video signal processing, neural networks for video applications, nonlinear video signal processing, video storage and retrieval, computer vision, packet video, high-speed real-time circuits, VLSI architecture and implementation for video technology, multiprocessor systems--hardware and software-- ...


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Most published Xplore authors for Sampled data circuits

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Xplore Articles related to Sampled data circuits

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High performance GaAs analog sampled data circuits and systems

1991., IEEE International Sympoisum on Circuits and Systems, 1991

The design of high-frequency GaAs analog sampled data systems using switched capacitor circuit techniques is reviewed including op-amp and switch design and optimization of the circuit for maximum clock-rate. A second order switched capacitor bandpass filter example with high precision measured response characteristics for a clock-rate of 500 MHz is discussed. Possible op-amp and switch designs to allow clock-rates around ...


Current mode approach to /spl Sigma//spl Delta/ modulators

ISCAS '98. Proceedings of the 1998 IEEE International Symposium on Circuits and Systems (Cat. No.98CH36187), 1998

This paper presents an approach to /spl Sigma//spl Delta/ modulators relying on current mode sampled data circuits with switched transconductances. The /spl Sigma//spl Delta/ modulator structures are composed of current mode building blocks with transconductance amplifiers and capacitors. All building blocks and three different /spl Sigma//spl Delta/ structures-first-order, second-order and multistage-are designed and simulated by using VLSISPICE COMPASS DESIGN programs ...


Current mode /spl radic/X-domain Palmo technique cell for programmable analog VLSI

2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512), 2004

Palmo techniques use pulse width modulated digital signals to convey analog signal information between programmable analog cells. A cell based on CMOS current mode comparator and square root domain integrator circuits is presented. This new implementation of the Palmo cell may be operated in continuous time or sampled data modes to perform a variety of signal processing tasks. Circuits operate ...


A CMOS-Readout-Amplifier For Instrumentation Applications

ESSCIRC '90: Sixteenth European Solid-State Circuits Conference, 1990

In the recent years enormous progress has been made in integration of sensors and electronics on the same silicon substrate. So a strong demand for incorporated instrumentation amplifiers has arisen. In this paper we present a fully integrated CMOS version of such an amplifier using switched capacitor techniques. The amplifier system provides differential input capability, programmable amplification, clock generation, and ...


Automatic synthesis of analog and sampled-data circuits in CMOS technology

IEEE Proceedings of the Custom Integrated Circuits Conference, 1990

A tool for the design and implementation of analog CMOS and switched-capacitor (SC) networks is described. It requires a set of specifications and a circuit description of each SC block. It generates the requirements of an operational amplifier for each SC block, and designs and evaluates the performance of operational amplifier through iteration with SPICE. The result is a stand- ...


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Educational Resources on Sampled data circuits

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IEEE.tv Videos

Single Crystal AlGaN Bulk Acoustic Wave Resonators on Silicon Substrates with High Electromechanical Coupling: RFIC Industry Showcase
Raspberry Pi High Speed SerDes Characterization Platform
IMS 2015 Keynote: Soft Assemblies of Radios, Sensors and Circuits for the Skin
ON-CHIP VOLTAGE AND TIMING DIAGNOSTIC CIRCUITS
Probabilistic AI: Quantum & Probabilistic Computing - Jean Simatic at INC 2019
SIMULATION TECHNIQUES FOR DATA CONVERTER DESIGN
IEEE Custom Integrated Circuits Conference
Erasing Logic-Memory Boundaries in Superconductor Electronics - Vasili Semenov: 2016 International Conference on Rebooting Computing
Superconductive Energy-Efficient Computing - ASC-2014 Plenary-series - 6 of 13 - Wednesday 2014/8/13
Physical Restraints on Quantum Circuits - IEEE Rebooting Computing 2017
Noise-Shaped Active SAR Analog-to-Digital Converter - IEEE Circuits and Systems Society (CAS) Distinguished Lecture
ISSCC 2012 - Awards Ceremony
High Throughput Neural Network based Embedded Streaming Multicore Processors - Tarek Taha: 2016 International Conference on Rebooting Computing
SOC DESIGN METHODOLOGY FOR IMPROVED ROBUSTNESS
Analog Devices, Inc. accepts the IEEE Corporate Innovation Award - Honors Ceremony 2017
Alice Wang - SSCS Chip Chat Podcast, Episode 6
Multi-Level Optical Weights in Integrated Circuits - IEEE Rebooting Computing 2017
BSIM Spice Model Enables FinFET and UTB IC Design
An 802.11ba 495μW -92.6dBm-Sensitivity Blocker-Tolerant Wake-up Radio Receiver - Renzhi Liu - RFIC 2019 Showcase
IMS 2011 Microapps - Memory Effects in RF Circuits: Definition, Manifestations and Fast, Accurate Simulation

IEEE-USA E-Books

  • High performance GaAs analog sampled data circuits and systems

    The design of high-frequency GaAs analog sampled data systems using switched capacitor circuit techniques is reviewed including op-amp and switch design and optimization of the circuit for maximum clock-rate. A second order switched capacitor bandpass filter example with high precision measured response characteristics for a clock-rate of 500 MHz is discussed. Possible op-amp and switch designs to allow clock-rates around 1 GHz are presented.<<ETX>>

  • Current mode approach to /spl Sigma//spl Delta/ modulators

    This paper presents an approach to /spl Sigma//spl Delta/ modulators relying on current mode sampled data circuits with switched transconductances. The /spl Sigma//spl Delta/ modulator structures are composed of current mode building blocks with transconductance amplifiers and capacitors. All building blocks and three different /spl Sigma//spl Delta/ structures-first-order, second-order and multistage-are designed and simulated by using VLSISPICE COMPASS DESIGN programs on a SUNSPARC20 computer and then manufactured via Eurochip service center in 0.7 /spl mu/m ES2 digital process to verify the proposed concept.

  • Current mode /spl radic/X-domain Palmo technique cell for programmable analog VLSI

    Palmo techniques use pulse width modulated digital signals to convey analog signal information between programmable analog cells. A cell based on CMOS current mode comparator and square root domain integrator circuits is presented. This new implementation of the Palmo cell may be operated in continuous time or sampled data modes to perform a variety of signal processing tasks. Circuits operate at 3V, with sampling rates of up to 5 MHz for sampled data circuits and cut-off frequencies up to 16MHz for continuous time third order low pass filter circuits.

  • A CMOS-Readout-Amplifier For Instrumentation Applications

    In the recent years enormous progress has been made in integration of sensors and electronics on the same silicon substrate. So a strong demand for incorporated instrumentation amplifiers has arisen. In this paper we present a fully integrated CMOS version of such an amplifier using switched capacitor techniques. The amplifier system provides differential input capability, programmable amplification, clock generation, and low-pass filtering on the chip. The output signal is continuous in time and the system can be used without any special precautions necessary for sampled-data circuits. Emphasis was laid on high PSRR, low noise and offset, low harmonic distortion, and small amplification error. For covering a large field of applications only slightly different realizations can be used for capacitive sensors as well as for resistive sensor bridges.

  • Automatic synthesis of analog and sampled-data circuits in CMOS technology

    A tool for the design and implementation of analog CMOS and switched-capacitor (SC) networks is described. It requires a set of specifications and a circuit description of each SC block. It generates the requirements of an operational amplifier for each SC block, and designs and evaluates the performance of operational amplifier through iteration with SPICE. The result is a stand- alone layout of a SC block which can be placed and routed with other SC blocks or analog and digital cells using a general auto-placement and router tool.<<ETX>>

  • Switched inverter - A new technique for sample data low-voltage and low-power applications

    In this paper, a new technique called 'switched inverter' for analog sample data signal processing is proposed. The circuit is based on the conventional CMOS inverter operating as a transconductor. The proposed circuit does not require linear capacitors and employs switches that operate at fixed channel voltage. Owing to the use of inverters, the proposed structure presents class- AB operation. A 8'th taps FIR filter has been designed in a standard 0.35-μm CMOS technology at 0.6 V supply.

  • Laplace domain analysis of periodic noise modulation

    Noise analysis of sampled-data circuits in the general framework of periodic noise modulation is discussed. The analysis relies on the Laplace transform instead of the more popular Fourier analysis. The approach leads to integral expressions that can be directly computed through numerical methods. Familiar Fourier domain expressions involving infinite series are shown to be special solutions to these integrals. The theory of the modified z transform is extended to the case of two-sided random signals to study the effect of correlated double sampling. The purpose of this analysis is to elaborate a basis for noise analysis of complex switched-capacitor (SC) circuits.

  • A low power high performance switched-current multiplier

    This paper presents an accurate switched-current multiplier, designed for 3.3 V supply voltage, performing 0.625 M multiplications per second with a maximum nonlinearity of 0.94%. The used technology is 2.4 /spl mu/m n-well CMOS. The power dissipation is lower than 0.3 mWatts.

  • A CMOS readout amplifier for instrumentation applications

    An integrated readout amplifier for instrumentation applications in smart sensor systems is presented. A fully integrated CMOS version of such an amplifier has been developed using switched-capacitor techniques. The amplifier system provides differential input capability, programmable amplification, clock generation, and low-pass filtering on the chip. The output signal is continuous in time and the system can be used without any of the special precautions necessary for sampled-data circuits. Emphasis was put on high PSRR (-63 dB at DC), low noise (10- mu V/sub rms/ input equivalent wideband noise) and offset, low harmonic distortion, and small amplification error (<0.06% at 4 V/sub pp/). To cover a large field of applications, only slightly different realizations can be used for capacitive sensors as well as for resistive sensor bridges.<<ETX>>

  • Improved two-step clock-feedthrough compensation technique for switched-current circuits

    A new clock-feedthrough compensation scheme for switched-current circuits is proposed. The scheme is especially suited for the design of delay lines for high-frequency operation. The circuit operates by using an improved two-step technique, in which the input is sampled in a parallel combination of a coarse and a fine memory transistor. Since both transistors are of the same type, large switching transients compared to the conventional S/sup 2/I scheme can be avoided. Using the proposed circuit, the coarse memory has considerably more time to settle. Compared to the simple cell, the circuit solution requires only one extra switch and one additional clock phase.



Standards related to Sampled data circuits

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