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ECTC is the premier international conference sponsored by the IEEE Components, Packaging and Manufacturing Society. ECTC paper comprise a wide spectrum of topics, including 3D packaging, electronic components, materials, assembly, interconnections, device and system packaging, optoelectronics, reliability, and simulation.
The world's premiere conference in MEMS sensors, actuators and integrated micro and nano systems welcomes you to attend this four-day event showcasing major technological, scientific and commercial breakthroughs in mechanical, optical, chemical and biological devices and systems using micro and nanotechnology.The major areas of activity in the development of Transducers solicited and expected at this conference include but are not limited to: Bio, Medical, Chemical, and Micro Total Analysis Systems Fabrication and Packaging Mechanical and Physical Sensors Materials and Characterization Design, Simulation and Theory Actuators Optical MEMS RF MEMS Nanotechnology Energy and Power
electronic components, materials, packaging, integration, microfluidics, mems, sensors
This workshop will focus on low-temperature bonding technologies which will ultimately lead to entirely new manufacturing approaches to 3D and heterogeneous integration of semiconductor devices and microsystems, as well as photonic systems.The workshop invites papers presenting new developments in low-temperature bonding technologies, new device applications, facilities and technologies for mass-production, and basic science relating to these technologies.
DNA Nanotechnology Micro-to-nano-scale Bridging Nanobiology and Nanomedicine Nanoelectronics Nanomanufacturing and Nanofabrication Nano Robotics and Automation Nanomaterials Nano-optics, Nano-optoelectronics and Nanophotonics Nanofluidics Nanomagnetics Nano/Molecular Heat Transfer & Energy Conversion Nanoscale Communication and Networks Nano/Molecular Sensors, Actuators and Systems
The IEEE Transactions on Advanced Packaging has its focus on the modeling, design, and analysis of advanced electronic, photonic, sensors, and MEMS packaging.
Contains articles on the applications and other relevant technology. Electronic applications include analog and digital circuits employing thin films and active devices such as Josephson junctions. Power applications include magnet design as well asmotors, generators, and power transmission
Component parts, hybrid microelectronics, materials, packaging techniques, and manufacturing technology.
Provides leading edge information that is critical to the creation of reliable electronic devices and materials, and a focus for interdisciplinary communication in the state of the art of reliability of electronic devices, and the materials used in their manufacture. It focuses on the reliability of electronic, optical, and magnetic devices, and microsystems; the materials and processes used in the ...
Design for manufacturability, cost and process modeling, process control and automation, factory analysis and improvement, information systems, statistical methods, environmentally-friendly processing, and computer-integrated manufacturing for the production of electronic assemblies, products, and systems.
53rd Electronic Components and Technology Conference, 2003. Proceedings., 2003
Proceedings of the 4th International Symposium on Electronic Materials and Packaging, 2002., 2002
The flip chip technique using non-conductive adhesive (NCA) or anisotropic conductive film (ACF) has become a key technology for fine-pitch interconnection such as display packaging for compact electronic products. This film type electronic package, flip chip assembly on organic substrate such as FR-4 printed circuit board (PCB), has advantages such as low cost, reliable electronic performance, easier assembly process, and ...
2009 59th Electronic Components and Technology Conference, 2009
A chip-on-flex (COF) bonding technology using Sn bumps and a non-conductive adhesive (NCA) was investigated. Two types of Sn bumps, square bumps and hemispherical bumps, were fabricated. The COF bonding was performed at 180degC for 5 s at 90 MPa after the NCA was dispensed. To evaluate the reliability of the COF joints, a high temperature storage test (150degC, 1000 ...
2010 Proceedings 60th Electronic Components and Technology Conference (ECTC), 2010
Photo-patternable NCAs have been newly developed. The new photo-patternable and thermo-curable NCAs were coated on a wafer and selectively exposed to deep ultra violet (UV). Without post exposure bake, the final products on exposed area were dissolved into a sodium carbonate solution and those on unexposed area were not dissolved. As a result, the new NCAs on a wafer were ...
52nd Electronic Components and Technology Conference 2002. (Cat. No.02CH37345), 2002
Chip Scale Packages (CSP) have been adapted for mobile phones, DVC, PC cards, PDA's and various other applications due to the robustness, cost effectiveness, and high reliability of CSP packages. For first level interconnection in CSP, wire bonding with encapsulation, Au stud bump by conductive adhesive, and solder bump interconnection with underfill process are mostly used. Non-conductive adhesives (NCA), widely ...
The flip chip technique using non-conductive adhesive (NCA) or anisotropic conductive film (ACF) has become a key technology for fine-pitch interconnection such as display packaging for compact electronic products. This film type electronic package, flip chip assembly on organic substrate such as FR-4 printed circuit board (PCB), has advantages such as low cost, reliable electronic performance, easier assembly process, and low temperature process. To account for the deterioration in electrical performance during high temperature operation, both analytical and experimental investigations were performed in this study. Interfacial shear stress along the adhesive layer was examined by applying existing analytical solutions for film structures. Analytical approaches were, then, compared with a numerical FEA solution and verified by experimental data obtained by a Moire interferometry experiment.
A chip-on-flex (COF) bonding technology using Sn bumps and a non-conductive adhesive (NCA) was investigated. Two types of Sn bumps, square bumps and hemispherical bumps, were fabricated. The COF bonding was performed at 180degC for 5 s at 90 MPa after the NCA was dispensed. To evaluate the reliability of the COF joints, a high temperature storage test (150degC, 1000 h), thermal cycling test (-25degC/+125degC, 1000 cycles), and temperature and humidity test (85degC /85% RH, 1000 h) were performed. The bondability and reliability were evaluated by measuring the contact resistance of each bump. The contact resistance results showed that all COF joints were successfully fabricated. Good bondability was ascribed to the easy deformation of the soft Sn bumps and to metallurgical bonding in the bump/pad interfaces. However, several failed joints were detected in the COF joints fabricated using square Sn bumps after reliability test. The reliability of the COF joints fabricated using hemispherical bumps was excellent. NCA trapping in the bump/pad interface in the square bump specimens had an influence on the reliability of those joints. This technique has been successfully applied to image sensor packaging.
Photo-patternable NCAs have been newly developed. The new photo-patternable and thermo-curable NCAs were coated on a wafer and selectively exposed to deep ultra violet (UV). Without post exposure bake, the final products on exposed area were dissolved into a sodium carbonate solution and those on unexposed area were not dissolved. As a result, the new NCAs on a wafer were patterned without curing. After a photo-lithography, the wafer with patterned NCA was singulated and the diced chips were flip chip assembled on flexible printed circuit boards (FPCBs). Flip chip assembly using the new photo-patternable NCAs showed the same stable contact resistance and adhesion strength as conventional NCA flip chip assembles.
Chip Scale Packages (CSP) have been adapted for mobile phones, DVC, PC cards, PDA's and various other applications due to the robustness, cost effectiveness, and high reliability of CSP packages. For first level interconnection in CSP, wire bonding with encapsulation, Au stud bump by conductive adhesive, and solder bump interconnection with underfill process are mostly used. Non-conductive adhesives (NCA), widely used in display packaging and fine pitch flip chip packaging technology, are recommended as one of the most suitable interconnection materials for flip chip CSPs. NCA interconnection in flip chip assembly have many advantages such as easier processing, good electrical performance, lower cost, and low temperature processing. In this paper, we have developed film type NCA materials for flip chip assembly on organic substrates such as FR-4 printed circuit boards (PCBs) or BT resin. NCAs are generally a mixture of epoxy polymer resin without any fillers, and have high CTE values like conventional underfill materials used to enhance thermal cycling reliability of solder flip chip assembly on FR-4 boards. In order to reduce thermal and mechanical stress and strain induced by CTE mismatch between a chip and organic substrate, the CTE of NCAs was optimized by filler content. The modified NCA interconnection in flip chip CSP showed highly reliable interconnection when exposed to various environmental tests.
The low temperature and ultra fine pitch chip on glass (COG) bonding using non-conductive adhesive (NCA) was developed. 30 mum pitch Sn bumps on Si chip were bonded with the metal pads on the glass substrate at 80 degC. Reflowed Sn bumps were used to reduce the NCA trapping. The initial contact resistance of the bump joints at 80 MPa pressure was less than 30 mOmega, which was lower than that of the joints using anisotropy conductive film (ACF). Aging treatment at 85 degC slightly decreased the contact resistance. Failed COG joints were not observed before and after aging
In order to respond to the need for extreme miniaturization, a flip-chip process has been developed. Valtronic is using nonconductive adhesive to attach stud bumped dice without additional underfill. This original process can be applied on rigid and flexible PWBs and is described in this paper. Using a test vehicle, a qualification test program was conducted in order to quantify the limits of the process and verify all specifications required by specific markets such as industrial or medical. The flip-chip process adapts well to flexible polyimide substrates. This enables the flip-chip to be applicable to a wide range of applications, particularly for 3D packaging. First, dice are connected using a flip-chip process on a flat substrate on the flexible circuit. Next, the third dimension is obtained by bending and/or rolling the substrate on itself, accomplishing a 3D package. Finally, the package is completed by soldering on dedicated traces and filling with epoxy if required. This innovative package looks like CSP, where miniature solder balls allow the package to be attached to another substrate (motherboard) through the reflow process. Furthermore, the process offers the possibility of adding SMD components on the back side of the flip-chip areas. To develop this bending/folding method, a full scale module was assembled with daisy chain die. This module was used to evaluate the flip-chip interconnect reliability before and after bending. Finally, a cubical hearing aid module was developed and industrialized. Its final dimensions are 4.5/spl times/4.0/spl times/3.0 mm. The module contains 3 ICs and 18 SMDs.
Anisotropic conductive adhesives (ACA) and non-conductive adhesives (NCA) are used in adhesive flip chip technology. An optimized cure process for these ACA and NCA materials is critical to develop the ultimate mechanical and electrical properties of the adhesive flip chip joints. Typically, these adhesives are formulated to achieve complete cure in less than 60 seconds at a cure temperature between 180degC and 250degC. This fast cure characteristic poses great difficulties for conventional cure characterization techniques. In this study, advanced cure monitoring techniques including modulated differential scanning calorimetry (MDSC), dielectric analysis (DEA) and fibre Bragg grating (FBG) were explored. Cure shrinkage was also measured using both FBG and thermomechanical analysis (TMA). Findings showed that MDSC is an improved method for analysis of partial-cured sample compared to conventional DSC. It was also demonstrated that cure characterization for these fast-cure materials is feasible using both DEA and FBG. It is worth noting that both DEA and FBG have potential for in-situ cure monitoring since the sensors can be embedded into the material during actual assembly process. For cure shrinkage measurement, feasibility of FBG was demonstrated in addition to using TMA which has been reported in prior work. Cure shrinkage results obtained using both techniques were found to be in good agreement. In summary, this paper has demonstrated the feasibility of several methodologies for cure behaviour characterization of fast-cure ACA and NCA materials. The key findings from this work represent a significant step towards cure process optimization for the development of reliable adhesive flip chip interconnects.
We report experimental results for chip-to-chip data communications on a superconducting Multi-Chip-Module (MCM) using a novel fabrication technique. The MCM was produced using a non-conductive adhesive to bond a 5-mm times 5-mm test chip to a 1-cm times 1-cm carrier. To our knowledge, this is the first time this technique was used for MCM assembly at cryogenic temperatures. The module demonstrated superior mechanical stability and protection from its environment during thermal cycling. The MCM also retained its electrical properties after multiple thermal cycling from room temperature to 4 K. We designed test circuits including various digital test benches, as well as analog test structures for bump characteristics. The superconducting circuitry successfully passed single-flux quanta at rates exceeding 50 Gbps. We measured error rates lower than 5 times 10<sup>-14</sup> at 36 Gbps using 100-micrometer- diameter In-Sn solder bumps, and lower than 6 times 10<sup>-14</sup> at 57 Gbps using 30-micrometer-diameter solder bumps.
Flip chip assembly using non-conductive adhesives (NCAs) and anisotropic conductive adhesives (ACAs) is gaining importance and acceptance in electronics packaging industry. For this packaging technology, a variety of material combinations is possible involving different bump types and adhesives. One of the challenges is to select a robust flip chip joint configuration to meet desired reliability requirements. In this paper, we report the influence of Au bump types, adhesives and substrate finishings on assembly feasibility and reliability of the flip chip joints. Results showed that bump type and its geometry has a major impact on the daisy chain resistances. The lowest and most consistent joint resistances were obtained with Au stud bumps. The incompatible combination of geometrically flat bumps and silica-filled adhesives was also identified. Resistance stability as a function of stress test was most dependent on the adhesive type used. Substrate pads with Au plating showed greater stability compared to pads with organic solderability preservative (OSP) coating. Based on the results, Au stud bump with non-conductive paste (NCP) has been identified to be the most suitable combination for high I/O and large die application
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