Conferences related to Neuromorphics

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2023 Annual International Conference of the IEEE Engineering in Medicine & Biology Conference (EMBC)

The conference program will consist of plenary lectures, symposia, workshops and invitedsessions of the latest significant findings and developments in all the major fields of biomedical engineering.Submitted full papers will be peer reviewed. Accepted high quality papers will be presented in oral and poster sessions,will appear in the Conference Proceedings and will be indexed in PubMed/MEDLINE.


2020 57th ACM/ESDA/IEEE Design Automation Conference (DAC)

The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2022 59th ACM/ESDA/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2021 58th ACM/ESDA/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2019 56th ACM/ESDA/IEEE Design Automation Conference (DAC)

    EDA (Electronics Design Automation) is becoming ever more important with the continuous scaling of semiconductor devices and the growing complexities of their use in circuits and systems. Demands for lower-power, higher-reliability and more agile electronic systems raise new challenges to both design and design automation of such systems. For the past five decades, the primary focus of research track at DAC has been to showcase leading-edge research and practice in tools and methodologies for the design of circuits and systems.

  • 2018 55th ACM/ESDA/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2017 54th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2016 53nd ACM/EDAC/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2015 52nd ACM/EDAC/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2014 51st ACM/EDAC/IEEE Design Automation Conference (DAC)

    DAC Description for TMRF The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading

  • 2013 50th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 session on design methodologies and EDA tool developments, keynotes, panels, plus User Track presentations. A diverse worldwide community representing more than 1,000 organization attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2012 49th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The Design Automation Conference (DAC) is the premier event for the design of electronic circuits and systems, and for EDA and silicon solutions. DAC features a wide array of technical presentations plus over 200 of the leading electronics design suppliers

  • 2011 48th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The Design Automation Conference is the world s leading technical conference and tradeshow on electronic design and design automation. DAC is where the IC Design and EDA ecosystem learns, networks, and does business.

  • 2010 47th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The Design Automation Conference (DAC) is the premier event for the design of electronic circuits and systems, and for EDA and silicon solutions. DAC features a wide array of technical presentations plus over 200 of the leading electronics design suppliers.

  • 2009 46th ACM/EDAC/IEEE Design Automation Conference (DAC)

    DAC is the premier event for the electronic design community. DAC offers the industry s most prestigious technical conference in combination with the biggest exhibition, bringing together design, design automation and manufacturing market influencers.

  • 2008 45th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The Design Automation Conference (DAC) is the premier event for the design of electronic circuits and systems, and for EDA and silicon solutions. DAC features a wide array of technical presentations plus over 250 of the leading electronics design suppliers.

  • 2007 44th ACM/IEEE Design Automation Conference (DAC)

    The Design Automation Conference (DAC) is the premier Electronic Design Automation (EDA) and silicon solution event. DAC features over 50 technical sessions covering the latest in design methodologies and EDA tool developments and an Exhibition and Demo Suite area with over 250 of the leading EDA, silicon and IP Providers.

  • 2006 43rd ACM/IEEE Design Automation Conference (DAC)

  • 2005 42nd ACM/IEEE Design Automation Conference (DAC)

  • 2004 41st ACM/IEEE Design Automation Conference (DAC)

  • 2003 40th ACM/IEEE Design Automation Conference (DAC)

  • 2002 39th ACM/IEEE Design Automation Conference (DAC)

  • 2001 38th ACM/IEEE Design Automation Conference (DAC)

  • 2000 37th ACM/IEEE Design Automation Conference (DAC)

  • 1999 36th ACM/IEEE Design Automation Conference (DAC)

  • 1998 35th ACM/IEEE Design Automation Conference (DAC)

  • 1997 34th ACM/IEEE Design Automation Conference (DAC)

  • 1996 33rd ACM/IEEE Design Automation Conference (DAC)


2020 IEEE International Conference on Robotics and Automation (ICRA)

The International Conference on Robotics and Automation (ICRA) is the IEEE Robotics and Automation Society’s biggest conference and one of the leading international forums for robotics researchers to present their work.


2020 IEEE International Symposium on Circuits and Systems (ISCAS)

The International Symposium on Circuits and Systems (ISCAS) is the flagship conference of the IEEE Circuits and Systems (CAS) Society and the world’s premier networking and exchange forum for researchers in the highly active fields of theory, design and implementation of circuits and systems. ISCAS2020 focuses on the deployment of CASS knowledge towards Society Grand Challenges and highlights the strong foundation in methodology and the integration of multidisciplinary approaches which are the distinctive features of CAS contributions. The worldwide CAS community is exploiting such CASS knowledge to change the way in which devices and circuits are understood, optimized, and leveraged in a variety of systems and applications.


ICASSP 2020 - 2020 IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP)

The ICASSP meeting is the world's largest and most comprehensive technical conference focused on signal processing and its applications. The conference will feature world-class speakers, tutorials, exhibits, and over 50 lecture and poster sessions.


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Periodicals related to Neuromorphics

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Biomedical Circuits and Systems, IEEE Transactions on

The Transactions on Biomedical Circuits and Systems addresses areas at the crossroads of Circuits and Systems and Life Sciences. The main emphasis is on microelectronic issues in a wide range of applications found in life sciences, physical sciences and engineering. The primary goal of the journal is to bridge the unique scientific and technical activities of the Circuits and Systems ...


Biomedical Engineering, IEEE Transactions on

Broad coverage of concepts and methods of the physical and engineering sciences applied in biology and medicine, ranging from formalized mathematical theory through experimental science and technological development to practical clinical applications.


Circuits and Systems I: Regular Papers, IEEE Transactions on

Part I will now contain regular papers focusing on all matters related to fundamental theory, applications, analog and digital signal processing. Part II will report on the latest significant results across all of these topic areas.


Circuits and Systems Magazine, IEEE


Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on

Methods, algorithms, and human-machine interfaces for physical and logical design, including: planning, synthesis, partitioning, modeling, simulation, layout, verification, testing, and documentation of integrated-circuit and systems designs of all complexities. Practical applications of aids resulting in producible analog, digital, optical, or microwave integrated circuits are emphasized.


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Xplore Articles related to Neuromorphics

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Neuromorphic Electronic Circuits for Building Autonomous Cognitive Systems

Proceedings of the IEEE, 2014

Several analog and digital brain-inspired electronic systems have been recently proposed as dedicated solutions for fast simulations of spiking neural networks. While these architectures are useful for exploring the computational properties of large-scale models of the nervous system, the challenge of building low-power compact physical artifacts that can behave intelligently in the real world and exhibit cognitive abilities still remains ...


Prolog to, "Neuromorphic Electronic Circuits for Building Autonomous Cognitive Systems."

Proceedings of the IEEE, 2014

In the last decade, progress has been made in the construction of simple neuromorphic cognitive systems. These types of circuits are described in the paper, and they are compared to existing solutions. The limitations of such circuits are described, as well as design techniques for constructing larger brain-like systems. The technological building blocks are based on dynamic synapse circuits, hardware ...


MWSCAS 2018 Tutorials

2018 IEEE 61st International Midwest Symposium on Circuits and Systems (MWSCAS), 2018

The following topics are dealt with: CMOS integrated circuits; low-power electronics; analogue-digital conversion; integrated circuit design; neural nets; capacitors; feature extraction; field programmable gate arrays; learning (artificial intelligence); logic design.


A Coding Scheme for Write Time Improvement of Phase Change Memory (PCM) Systems

IEEE Transactions on Multi-Scale Computing Systems, 2016

This paper presents new codes (and the related encoder/decoder scheme) to address the significant drawback of a phase change memory (PCM), namely that its write latency is significantly longer than the read latency. The proposed scheme improves over existing schemes by reducing the average write latency and the number of SET operations in a PCM. A new code, referred to ...


Optimization of Conductance Change in Pr<sub>1–<italic>x</italic></sub>Ca<sub><italic>x</italic></sub>MnO<sub>3</sub>-Based Synaptic Devices for Neuromorphic Systems

IEEE Electron Device Letters, 2015

The optimization of conductance change behavior in synaptic devices based on analog resistive memory is studied for the use in neuromorphic systems. Resistive memory based on Pr1-xCaxMnO3(PCMO) is applied to a neural network application (classification of Modified National Institute of Standards and Technology handwritten digits using a multilayer perceptron trained with backpropagation) under a wide variety of simulated conductance change ...


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Educational Resources on Neuromorphics

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IEEE.tv Videos

No IEEE.tv Videos are currently tagged "Neuromorphics"

IEEE-USA E-Books

  • Neuromorphic Electronic Circuits for Building Autonomous Cognitive Systems

    Several analog and digital brain-inspired electronic systems have been recently proposed as dedicated solutions for fast simulations of spiking neural networks. While these architectures are useful for exploring the computational properties of large-scale models of the nervous system, the challenge of building low-power compact physical artifacts that can behave intelligently in the real world and exhibit cognitive abilities still remains open. In this paper, we propose a set of neuromorphic engineering solutions to address this challenge. In particular, we review neuromorphic circuits for emulating neural and synaptic dynamics in real time and discuss the role of biophysically realistic temporal dynamics in hardware neural processing architectures; we review the challenges of realizing spike-based plasticity mechanisms in real physical systems and present examples of analog electronic circuits that implement them;we describe the computational properties of recurrent neural networks and show how neuromorphic winner-take-all circuits can implement working-memory and decision-making mechanisms. We validate the neuromorphic approach proposed with experimental results obtained from our own circuits and systems, and argue how the circuits and networks presented in this work represent a useful set of components for efficiently and elegantly implementing neuromorphic cognition.

  • Prolog to, "Neuromorphic Electronic Circuits for Building Autonomous Cognitive Systems."

    In the last decade, progress has been made in the construction of simple neuromorphic cognitive systems. These types of circuits are described in the paper, and they are compared to existing solutions. The limitations of such circuits are described, as well as design techniques for constructing larger brain-like systems. The technological building blocks are based on dynamic synapse circuits, hardware models of spiking neurons, and spike-based plasticity circuits, which are integrated into multichip spiking recurrent and winner-take-all neural networks, which can serve as models for pattern recognition, working memory, decision making, and state-dependent brain computing.

  • MWSCAS 2018 Tutorials

    The following topics are dealt with: CMOS integrated circuits; low-power electronics; analogue-digital conversion; integrated circuit design; neural nets; capacitors; feature extraction; field programmable gate arrays; learning (artificial intelligence); logic design.

  • A Coding Scheme for Write Time Improvement of Phase Change Memory (PCM) Systems

    This paper presents new codes (and the related encoder/decoder scheme) to address the significant drawback of a phase change memory (PCM), namely that its write latency is significantly longer than the read latency. The proposed scheme improves over existing schemes by reducing the average write latency and the number of SET operations in a PCM. A new code, referred to as the write time speed-up (WTS) code is introduced; WTS improves over existing schemes previously employed for this operation, i.e., the flip-N-write and the write-once-memory (WOM) code. In the proposed WTS code, multiple codewords correspond to every information word; the codewords are selected to reduce the number of SET operations (each requiring a longer time than the RESET operation in a PCM). The proposed scheme targets a reduction in SET operations, by executing them only when required, i.e., so making the SET operations to occur irregularly with the write operations. Simulation results are provided using an embedded benchmark suite; they show that the proposed scheme incurs in a shorter average write time than the flip-N-write scheme as well as the existing scheme with the WOM code when parallel data is provided. Encoding and decoding times for the proposed scheme are significantly shorter than the read and write latencies of a PCM. Moreover, the hardware overhead (in the area for LUT-based implementations) for the encoder and decoder of of WTS code is significantly smaller than the PCM system size, thus making the proposed design viable for implementation.

  • Optimization of Conductance Change in Pr<sub>1–<italic>x</italic></sub>Ca<sub><italic>x</italic></sub>MnO<sub>3</sub>-Based Synaptic Devices for Neuromorphic Systems

    The optimization of conductance change behavior in synaptic devices based on analog resistive memory is studied for the use in neuromorphic systems. Resistive memory based on Pr1-xCaxMnO3(PCMO) is applied to a neural network application (classification of Modified National Institute of Standards and Technology handwritten digits using a multilayer perceptron trained with backpropagation) under a wide variety of simulated conductance change behaviors. Linear and symmetric conductance changes (e.g., self-similar response during both increasing and decreasing device conductance) are shown to offer the highest classification accuracies. Further improvements can be obtained using nonidentical training pulses, at the cost of requiring measurement of individual conductance during training. Such a system can be expected to achieve, with our existing PCMO-based synaptic devices, a generalization accuracy on a previously-unseen test set of 90.55%. These results are promising for hardware demonstration of high neuromorphic accuracies using existing synaptic devices.

  • Practical micro/nano fabrication implementations of memristive devices

    The recent discovery of the memristor has marked a new era for the advancement of neuromorphic applications and particularly the development of neurally- inspired processing architectures in silicon. An adults brain is a highly complex system and is estimated to contain from 10<sup>14</sup> to 5×10<sup>14</sup> synapses. On the other hand, the memristor is a delicate device requiring robust and reproducible fabrication methods. This paper assesses practical ways with which memristive devices can be fabricated, providing an experimental platform for studying systems with inherent neuromorphic responses.

  • Neuromorphic algorithm for retinal implants

    The paper focuses on the input transformation for retinal implants. It describes a novel retina model, based on neurobiological measurements. Our modeling approach is neuromorphic, however the primary motivation is to derive an algorithmic skeleton from the animal retina measurements. The on-line, real-time implementation of the algorithm is given for an off-the-shelf stand- alone system, called Bi-I

  • Improving Analog Switching in HfO<sub><italic>x</italic></sub>-Based Resistive Memory With a Thermal Enhanced Layer

    Analog RRAM with hundreds of resistance levels is an attractive device for neuromorphic computing. However, it is still very challenging to realize good analog behavior in filamentary RRAM cells. In this letter, we developed a novel methodology to improve the analog switching in filamentary RRAM. The impact of local temperature on analog switching behavior is elucidated. The transition from abrupt switching to analog switching is found at higher temperature. Based on this result, a thermal enhanced layer (TEL) is proposed to confine heat in switching layer for realizing analog RRAM. The HfOx/TEL RRAM shows analog switching characteristics with more than ten times window using 50-ns pulses. Finally, a 1-kb analog RRAM array is demonstrated with uniform analog switching, fast speed, excellent resistance window, and excellent retention properties.

  • Memristor circuits and systems for future computing and bio-inspired information processing

    Memristors can be used in mimicking synaptic plasticity of biological neuronal systems. In addition, memristor crossbars can be realized in 3-dimensional architecture like human brain. This possibility of 3-dimensional integration is crucial in implementing the full-scale electronic neuron-synapse system in future. One more thing to note here is that memristor-based neuromorphic systems can be more energy-efficient than the conventional Von Neumann ones in some applications such as bio-inspired pattern processing. This is because they are more suitable to brain-like parallel processing. Based on these advantages of memristor-based neuromorphic systems, this paper reviews the memristor logics, where the computation and memory can be merged together. Then, we introduce neuromorphic memristor crossbars which can mimic the brain's pattern recognition of speech and image. The simulation results of neuromorphic crossbars strongly highlight the future possibility of memristor circuits in brain-mimicking pattern processing. In Cellular Nanoscale Network (CNN), memristors can be used in analog multiplication that is essential to perform CNN pixel calculation with low power consumption and high-area density.

  • Embedded tutorial - Can silicon machines match the efficiency of the human brain?

    Summary form only given. Some recent developments from the field of nanotechnology that lay the stepping stones to deliver on this challenge will be discussed. It has been demonstrated that nanoscale devices made of chalcogenide alloys, Ag2S, TiO2 etc, could be programmed with picojoule level energy consumption to mimic the plasticity properties exhibited by biological synapses. Small prototype circuits based on spike timing plasticity have also been developed, capable of sequence learning, pattern recognition etc from noisy spatio-temporal data. The technology requirements and targets to be met by novel devices in order to fabricate large, energy-efficient, bio-mimetic computational systems will also be discussed



Standards related to Neuromorphics

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