Conferences related to Neural microtechnology

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2020 42nd Annual International Conference of the IEEE Engineering in Medicine & Biology Society (EMBC)

The conference program will consist of plenary lectures, symposia, workshops and invitedsessions of the latest significant findings and developments in all the major fields of biomedical engineering.Submitted papers will be peer reviewed. Accepted high quality papers will be presented in oral and postersessions, will appear in the Conference Proceedings and will be indexed in PubMed/MEDLINE


2020 IEEE 70th Electronic Components and Technology Conference (ECTC)

ECTC is the premier international conference sponsored by the IEEE Components, Packaging and Manufacturing Society. ECTC paper comprise a wide spectrum of topics, including 3D packaging, electronic components, materials, assembly, interconnections, device and system packaging, optoelectronics, reliability, and simulation.


2020 IEEE International Reliability Physics Symposium (IRPS)

Meeting of academia and research professionals to discuss reliability challenges


2020 IEEE International Symposium on Circuits and Systems (ISCAS)

The International Symposium on Circuits and Systems (ISCAS) is the flagship conference of the IEEE Circuits and Systems (CAS) Society and the world’s premier networking and exchange forum for researchers in the highly active fields of theory, design and implementation of circuits and systems. ISCAS2020 focuses on the deployment of CASS knowledge towards Society Grand Challenges and highlights the strong foundation in methodology and the integration of multidisciplinary approaches which are the distinctive features of CAS contributions. The worldwide CAS community is exploiting such CASS knowledge to change the way in which devices and circuits are understood, optimized, and leveraged in a variety of systems and applications.


ICASSP 2020 - 2020 IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP)

The ICASSP meeting is the world's largest and most comprehensive technical conference focused on signal processing and its applications. The conference will feature world-class speakers, tutorials, exhibits, and over 50 lecture and poster sessions.


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Periodicals related to Neural microtechnology

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Advanced Packaging, IEEE Transactions on

The IEEE Transactions on Advanced Packaging has its focus on the modeling, design, and analysis of advanced electronic, photonic, sensors, and MEMS packaging.


Biomedical Circuits and Systems, IEEE Transactions on

The Transactions on Biomedical Circuits and Systems addresses areas at the crossroads of Circuits and Systems and Life Sciences. The main emphasis is on microelectronic issues in a wide range of applications found in life sciences, physical sciences and engineering. The primary goal of the journal is to bridge the unique scientific and technical activities of the Circuits and Systems ...


Biomedical Engineering, IEEE Reviews in

The IEEE Reviews in Biomedical Engineering will review the state-of-the-art and trends in the emerging field of biomedical engineering. This includes scholarly works, ranging from historic and modern development in biomedical engineering to the life sciences and medicine enabled by technologies covered by the various IEEE societies.


Biomedical Engineering, IEEE Transactions on

Broad coverage of concepts and methods of the physical and engineering sciences applied in biology and medicine, ranging from formalized mathematical theory through experimental science and technological development to practical clinical applications.


Circuits and Systems II: Express Briefs, IEEE Transactions on

Part I will now contain regular papers focusing on all matters related to fundamental theory, applications, analog and digital signal processing. Part II will report on the latest significant results across all of these topic areas.


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Most published Xplore authors for Neural microtechnology

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Xplore Articles related to Neural microtechnology

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A low-power area-efficient 8 bit SAR ADC using dual capacitor arrays for neural microsystems

2009 Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2009

We report an area-efficient 8 bit SAR ADC using dual capacitor array banks for brain signal interface microsystems. The proposed ADC consumes 680 nW and the total chip area is 0.035 mm<sup>2</sup>. We reduced the area and power by a factor of eight when compared with conventional approaches. If we increase the resolution, the area and power reduction factor exponentially ...


Ultra-Compact Integration for Fully-Implantable Neural Microsystems

2009 IEEE 22nd International Conference on Micro Electro Mechanical Systems, 2009

A new approach to microsystem integration to replace conventional area- consuming platform architectures with an overlay integration cable is presented. A parylene cable carrying interconnect lines is used to integrate a 3-D array of silicon microelectrodes with a custom-designed signal conditioning chip to realize a neural recording microsystem in its most compact form. This low-profile integrated front-end was implanted in ...


Integrated optoelectronics for neural stimulation and recording in freely moving animals

CLEO/QELS: 2010 Laser Science to Photonic Applications, 2010

Specific classes of neural cells in the mammalian brain can be rendered visible light sensitive by genetic means. We combine the new `optogenetics' neural stimulation with simultaneous electrical recording from neural microcircuits in freely moving rats in an integrated cortically implanted optoelectronic microarray device. This enables both `write-in' and `read-out' of neural information in behaving animals.


Multicore asynchronous simulation of spiking neural networks on the grid

2013 11th RoEduNet International Conference, 2013

Dynamics analysis studies of spiking neural network behavior entails the computation of a large number of simulation scenarios. Moreover, when the simulated neural micro-circuits are fairly large, the use of multiple cores in a simulation tends to be beneficial. In this paper we focus on the parallelization of an asynchronous simulation strategy with OpenMP threads and on the management of ...


FPGA Simulation Engine for Customized Construction of Neural Microcircuit

2013 IEEE 21st Annual International Symposium on Field-Programmable Custom Computing Machines, 2013

In this poster we describe a platform-based approach for rapid construction of FPGA-based simulation of neural microcircuits composed from integrate-and-fire (IAF) neurons. Our approach exploits high-level synthesis to bypass the high design complexity of RTL coding, and enables automatic optimization and design space exploration. We demonstrate the benefits of this approach by simulating a neural microcircuit that performs oscillatory path ...


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Educational Resources on Neural microtechnology

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IEEE.tv Videos

Development of Neural Interfaces for Robotic Prosthetic Limbs
ICASSP 2010 - Advances in Neural Engineering
Auditory Neural Pathway Simulation - IEEE Rebooting Computing 2017
Towards On-Chip Optical FFTs for Convolutional Neural Networks - IEEE Rebooting Computing 2017
Achieving Swarm Intelligence with Spiking Neural Oscillators - IEEE Rebooting Computing 2017
20 Years of Neural Networks: A Promising Start, A brilliant Future- Video contents
On the Physical Underpinnings of the Unusual Effectiveness of Probabilistic and Neural Computation - IEEE Rebooting Computing 2017
Emergent Neural Network in reinforcement learning
Improved Deep Neural Network Hardware Accelerators Based on Non-Volatile-Memory: the Local Gains Technique: IEEE Rebooting Computing 2017
Lizhong Zheng's Globecom 2019 Keynote
Large-scale Neural Systems for Vision and Cognition
Spike Timing, Rhythms, and the Effective Use of Neural Hardware
Artificial Neural Networks, Intro
High Throughput Neural Network based Embedded Streaming Multicore Processors - Tarek Taha: 2016 International Conference on Rebooting Computing
Deep Learning and the Representation of Natural Data
Behind Artificial Neural Networks
Overcoming the Static Learning Bottleneck - the Need for Adaptive Neural Learning - Craig Vineyard: 2016 International Conference on Rebooting Computing
Q&A with Kip Ludwig: IEEE Brain Podcast, Episode 7
Uncovering the Neural Code of Learning Control - Jennie Si - WCCI 2012 invited lecture
Neural Processor Design Enabled by Memristor Technology - Hai Li: 2016 International Conference on Rebooting Computing

IEEE-USA E-Books

  • A low-power area-efficient 8 bit SAR ADC using dual capacitor arrays for neural microsystems

    We report an area-efficient 8 bit SAR ADC using dual capacitor array banks for brain signal interface microsystems. The proposed ADC consumes 680 nW and the total chip area is 0.035 mm<sup>2</sup>. We reduced the area and power by a factor of eight when compared with conventional approaches. If we increase the resolution, the area and power reduction factor exponentially increases in our architecture (e.g., a factor of 16 for 10 bit resolution). The measured SNDR, SFDR, THD, and ENOB are 42.82 plusmn 0.47 dB, 57.90 plusmn 2.82 dB, -53.58 plusmn 2.15 dB, and 6.65 plusmn 0.07 bits, respectively.

  • Ultra-Compact Integration for Fully-Implantable Neural Microsystems

    A new approach to microsystem integration to replace conventional area- consuming platform architectures with an overlay integration cable is presented. A parylene cable carrying interconnect lines is used to integrate a 3-D array of silicon microelectrodes with a custom-designed signal conditioning chip to realize a neural recording microsystem in its most compact form. This low-profile integrated front-end was implanted in a guinea pig and used to obtain discriminable neural activity.

  • Integrated optoelectronics for neural stimulation and recording in freely moving animals

    Specific classes of neural cells in the mammalian brain can be rendered visible light sensitive by genetic means. We combine the new `optogenetics' neural stimulation with simultaneous electrical recording from neural microcircuits in freely moving rats in an integrated cortically implanted optoelectronic microarray device. This enables both `write-in' and `read-out' of neural information in behaving animals.

  • Multicore asynchronous simulation of spiking neural networks on the grid

    Dynamics analysis studies of spiking neural network behavior entails the computation of a large number of simulation scenarios. Moreover, when the simulated neural micro-circuits are fairly large, the use of multiple cores in a simulation tends to be beneficial. In this paper we focus on the parallelization of an asynchronous simulation strategy with OpenMP threads and on the management of the neural simulations on compute grids. The first results show a parallel efficiency in the ranges of 0.31-0.98, with hyper- threading disabled or enabled, resp. By using the grid as underlying middleware for performing the simulations, we could generate and manage hundreds of simulation scenarios in an easy way.

  • FPGA Simulation Engine for Customized Construction of Neural Microcircuit

    In this poster we describe a platform-based approach for rapid construction of FPGA-based simulation of neural microcircuits composed from integrate-and-fire (IAF) neurons. Our approach exploits high-level synthesis to bypass the high design complexity of RTL coding, and enables automatic optimization and design space exploration. We demonstrate the benefits of this approach by simulating a neural microcircuit that performs oscillatory path integration, which evidence suggests may be a critical building block of the navigation system inside a rodent's brain. Experiments show that our FPGA simulation engine can achieve up to 23x speedup and 450x energy reduction compared to commodity CPU. The methodology described in this paper should be broadly applicable for creating FPGA simulations over a wide range neural microcircuit architectures.

  • 3D Multichannel Active Neural Microelectrode with Single-Supply Integrate Signal Processing Circuitry

    In this paper, we present a 3-Dimension microsensor based on microelectro- mechanical technology and integrate circuitry. This 32-channel microsensor incorporates two active neural probes with signal detection and control ASIC for amplification, site selection and multiplexing. The method of determining the dimensional parameters of the probe shank is also discussed based on the structure and fabrication process of it. The ASIC based on 0.35 um fabrication is integrated with multiplexing and powered by single-supply (3.3 V) to reduce leads number and the complexity of power supply. The ASIC works in recording or stimulating mode, depending on the mode_select signal.

  • Fabrication and degradation characteristic of sputtered iridium oxide neural microelectrodes for FES application

    This paper shows the fabrication process of the reactively sputtered iridium oxide film (SIROF) microelectrodes under different oxygen flows and characters the electrochemical performances of the iridium oxide neural microelectrodes which are suffered from stimulus-evoked degradation. The SIROF microelectrodes prepared under 25 sccm oxygen flow shows the least degradation from continuous electrical stimulation (two million phases). That the charge storage capacity is only decreased by 9.6 % and the 1 kHz impedance is only increased by 4.23 %. Hence, the 25 sccm one can be an ideal microelectrode modification material for electrical stimulation with the least degradation.

  • Hydrophilic modification of multi-walled carbon nanotubes based neural microelectrode array

    This paper reports an improved method for reducing the impedance of microelectrode array (MEA). The impedance reduction is generally required by increasing the effective surface area of electrode. We have fabricated and treated the multi-walled carbon nanotubes (MWCNTs) based MEA for neuroscience application. The effect of plasma treatment on the surface wettability of MWCNTs was examined and characterized. The H<sub>2</sub>O plasma treatment was utilized to modify the surface of MWCNTs from superhydrophobic to superhydrophilic. The treated recipe of power under 25 W for 10 sec could improve the electro-chemical and biological properties efficiently.

  • Design Method of 3-D Active Silicon Neural Microelectrode Biosensor Based on MEMS Technology

    This paper discussed the design method of a 3D 32 sites active silicon microelectrode biosensor. Base on the MEMS technology, a new microstructure of active neural recording arrays system is presented, where two 2D probes, two integrated circuits as well as two spacers are microassambled on a 5times7 mm<sup>2</sup> silicon platform. A theoretical measurement model for measuring the neural signal by the silicon microelectrode was proposed based on the structure and fabrication process of a single-shank probe. The on-chip unity- gain bandpass amplifier has an overall gain of 42dB over a bandwidth from 60Hz to 10 kHz; the dc-baseline stability circuit with high input resistance above 30MOmega to guarantee a cutoff frequency below 100 Hz. The circuit works in two models: stimulating or recording. The conversion of the models depends on the outside stimulating control signal. The method of determining the dimensional parameters values of the probe shank is discussed in the following three aspects: the structure of pallium, efficient, coupled interconnects noise and strength characteristic of neural probe. The design criterion is to minimize the size of the neural probe when the probe has enough stiffness to pierce the endocranium

  • A Bluetooth Low Energy (BLE)-enabled Wireless Link for Bidirectional Communications with a Neural Microsystem

    This paper reports on the design and implementation of a Bluetooth low energy (BLE)-enabled wireless link for bidirectional communications between a user base station (UBS) and a neural microsystem. The microsystem comprises a previously developed application-specific integrated circuit (ASIC) for activity-dependent intracortical microstimulation (ICMS), and the BLE link is dedicated to remote programming of the ICMS ASIC as well as to remote monitoring of several parameters such as the average stimulus rate, electrode site impedance, or power supply level. A prototype system is developed that incorporates the ICMS ASIC, SAMB11 BLE module, and peripheral electronics for supply management and ASIC monitoring, as well as a BLE user interface custom developed in C#. The end-to-end functionality of the BLE-enabled wireless link is experimentally demonstrated in representative benchtop tests in which several ASIC parameters are successfully programmed from the UBS over a distance of > 3.5m. The prototype system consumes ~6181μW from a 3.6V, 1.6Ah, lithium-ion battery and is estimated to feature a lifetime of> 8 months for continuous operation, making it suitable for longitudinal studies with the ICMS ASIC in a non-human primate model.



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