Conferences related to Minimization methods

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2020 42nd Annual International Conference of the IEEE Engineering in Medicine & Biology Society (EMBC)

The conference program will consist of plenary lectures, symposia, workshops and invitedsessions of the latest significant findings and developments in all the major fields of biomedical engineering.Submitted papers will be peer reviewed. Accepted high quality papers will be presented in oral and postersessions, will appear in the Conference Proceedings and will be indexed in PubMed/MEDLINE


2020 IEEE International Conference on Image Processing (ICIP)

The International Conference on Image Processing (ICIP), sponsored by the IEEE SignalProcessing Society, is the premier forum for the presentation of technological advances andresearch results in the fields of theoretical, experimental, and applied image and videoprocessing. ICIP 2020, the 27th in the series that has been held annually since 1994, bringstogether leading engineers and scientists in image and video processing from around the world.


2020 IEEE International Conference on Multimedia and Expo (ICME)

Multimedia technologies, systems and applications for both research and development of communications, circuits and systems, computer, and signal processing communities.

  • 2019 IEEE International Conference on Multimedia and Expo (ICME)

    speech, audio, image, video, text and new sensor signal processingsignal processing for media integration3D imaging, visualization and animationvirtual reality and augmented realitymulti-modal multimedia computing systems and human-machine interactionmultimedia communications and networkingmedia content analysis and searchmultimedia quality assessmentmultimedia security and content protectionmultimedia applications and servicesmultimedia standards and related issues

  • 2018 IEEE International Conference on Multimedia and Expo (ICME)

    The IEEE International Conference on Multimedia & Expo (ICME) has been the flagship multimedia conference sponsored by four IEEE societies since 2000. It serves as a forum to promote the exchange of the latest advances in multimedia technologies, systems, and applications from both the research and development perspectives of the circuits and systems, communications, computer, and signal processing communities. ICME also features an Exposition of multimedia products and prototypes.

  • 2017 IEEE International Conference on Multimedia and Expo (ICME)

    Topics of interest include, but are not limited to: – Speech, audio, image, video, text and new sensor signal processing – Signal processing for media integration – 3D visualization and animation – 3D imaging and 3DTV – Virtual reality and augmented reality – Multi-modal multimedia computing systems and human-machine interaction – Multimedia communications and networking – Media content analysis – Multimedia quality assessment – Multimedia security and content protection – Multimedia databases and digital libraries – Multimedia applications and services – Multimedia standards and related issues

  • 2016 IEEE International Conference on Multimedia and Expo (ICME)

    Topics of interest include, but are not limited to:- Speech, audio, image, video, text and new sensor signal processing- Signal processing for media integration- 3D visualization and animation- 3D imaging and 3DTV- Virtual reality and augmented reality- Multi-modal multimedia computing systems and human-machine interaction- Multimedia communications and networking- Media content analysis- Multimedia quality assessment- Multimedia security and content protection- Multimedia databases and digital libraries- Multimedia applications and services- Multimedia standards and related issues

  • 2015 IEEE International Conference on Multimedia and Expo (ICME)

    With around 1000 submissions and 500 participants each year, the IEEE International Conference on Multimedia & Expo (ICME) has been the flagship multimedia conference sponsored by four IEEE societies since 2000. It serves as a forum to promote the exchange of the latest advances in multimedia technologies, systems, and applications from both the research and development perspectives of the circuits and systems, communications, computer, and signal processing communities.

  • 2014 IEEE International Conference on Multimedia and Expo (ICME)

    The IEEE International Conference on Multimedia & Expo (ICME) has been the flagship multimedia conference sponsored by four IEEE societies since 2000. It serves as a forum to promote the exchange of the latest advances in multimedia technologies, systems, and applications. In 2014, an Exposition of multimedia products, prototypes and animations will be held in conjunction with the conference.Topics of interest include, but are not limited to:

  • 2013 IEEE International Conference on Multimedia and Expo (ICME)

    To promote the exchange of the latest advances in multimedia technologies, systems, and applications from both the research and development perspectives of the circuits and systems, communications, computer, and signal processing communities.

  • 2012 IEEE International Conference on Multimedia and Expo (ICME)

    IEEE International Conference on Multimedia & Expo (ICME) has been the flagship multimedia conference sponsored by four IEEE Societies. It exchanges the latest advances in multimedia technologies, systems, and applications from both the research and development perspectives of the circuits and systems, communications, computer, and signal processing communities.

  • 2011 IEEE International Conference on Multimedia and Expo (ICME)

    Speech, audio, image, video, text processing Signal processing for media integration 3D visualization, animation and virtual reality Multi-modal multimedia computing systems and human-machine interaction Multimedia communications and networking Multimedia security and privacy Multimedia databases and digital libraries Multimedia applications and services Media content analysis and search Hardware and software for multimedia systems Multimedia standards and related issues Multimedia qu

  • 2010 IEEE International Conference on Multimedia and Expo (ICME)

    A flagship multimedia conference sponsored by four IEEE societies, ICME serves as a forum to promote the exchange of the latest advances in multimedia technologies, systems, and applications from both the research and development perspectives of the circuits and systems, communications, computer, and signal processing communities.

  • 2009 IEEE International Conference on Multimedia and Expo (ICME)

    IEEE International Conference on Multimedia & Expo is a major annual international conference with the objective of bringing together researchers, developers, and practitioners from academia and industry working in all areas of multimedia. ICME serves as a forum for the dissemination of state-of-the-art research, development, and implementations of multimedia systems, technologies and applications.

  • 2008 IEEE International Conference on Multimedia and Expo (ICME)

    IEEE International Conference on Multimedia & Expo is a major annual international conference with the objective of bringing together researchers, developers, and practitioners from academia and industry working in all areas of multimedia. ICME serves as a forum for the dissemination of state-of-the-art research, development, and implementations of multimedia systems, technologies and applications.

  • 2007 IEEE International Conference on Multimedia and Expo (ICME)

  • 2006 IEEE International Conference on Multimedia and Expo (ICME)

  • 2005 IEEE International Conference on Multimedia and Expo (ICME)

  • 2004 IEEE International Conference on Multimedia and Expo (ICME)

  • 2003 IEEE International Conference on Multimedia and Expo (ICME)

  • 2002 IEEE International Conference on Multimedia and Expo (ICME)

  • 2001 IEEE International Conference on Multimedia and Expo (ICME)

  • 2000 IEEE International Conference on Multimedia and Expo (ICME)


2020 IEEE International Symposium on Circuits and Systems (ISCAS)

The International Symposium on Circuits and Systems (ISCAS) is the flagship conference of the IEEE Circuits and Systems (CAS) Society and the world’s premier networking and exchange forum for researchers in the highly active fields of theory, design and implementation of circuits and systems. ISCAS2020 focuses on the deployment of CASS knowledge towards Society Grand Challenges and highlights the strong foundation in methodology and the integration of multidisciplinary approaches which are the distinctive features of CAS contributions. The worldwide CAS community is exploiting such CASS knowledge to change the way in which devices and circuits are understood, optimized, and leveraged in a variety of systems and applications.


2020 IEEE Nuclear Science Symposium and Medical Imaging Conference (NSS/MIC)

All areas of ionizing radiation detection - detectors, signal processing, analysis of results, PET development, PET results, medical imaging using ionizing radiation


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Periodicals related to Minimization methods

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Advanced Packaging, IEEE Transactions on

The IEEE Transactions on Advanced Packaging has its focus on the modeling, design, and analysis of advanced electronic, photonic, sensors, and MEMS packaging.


Antennas and Propagation, IEEE Transactions on

Experimental and theoretical advances in antennas including design and development, and in the propagation of electromagnetic waves including scattering, diffraction and interaction with continuous media; and applications pertinent to antennas and propagation, such as remote sensing, applied optics, and millimeter and submillimeter wave techniques.


Audio, Speech, and Language Processing, IEEE Transactions on

Speech analysis, synthesis, coding speech recognition, speaker recognition, language modeling, speech production and perception, speech enhancement. In audio, transducers, room acoustics, active sound control, human audition, analysis/synthesis/coding of music, and consumer audio. (8) (IEEE Guide for Authors) The scope for the proposed transactions includes SPEECH PROCESSING - Transmission and storage of Speech signals; speech coding; speech enhancement and noise reduction; ...


Automatic Control, IEEE Transactions on

The theory, design and application of Control Systems. It shall encompass components, and the integration of these components, as are necessary for the construction of such systems. The word `systems' as used herein shall be interpreted to include physical, biological, organizational and other entities and combinations thereof, which can be represented through a mathematical symbolism. The Field of Interest: shall ...


Biomedical Engineering, IEEE Transactions on

Broad coverage of concepts and methods of the physical and engineering sciences applied in biology and medicine, ranging from formalized mathematical theory through experimental science and technological development to practical clinical applications.


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Most published Xplore authors for Minimization methods

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Xplore Articles related to Minimization methods

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IEEE Transactions on Neural Networks, 1997

None


Time-domain inverse scattering of a chiral slab

1999 Asia Pacific Microwave Conference. APMC'99. Microwaves Enter the 21st Century. Conference Proceedings (Cat. No.99TH8473), 1999

This paper investigates an inverse scattering problem for the reconstruction of constitutive parameters of a dispersive chiral slab in time domain. Time responses of the transmitted and reflected electric fields are simulated by using the FDTD method. Applying the Levenberg-Marquardt-Morrison method to the minimization of a cost functional, which is defined as a norm of discrepancy between the measured and ...


GA Based Congestion Aware Algorithm for Application in NoC

2009 International Conference on Computational Intelligence and Software Engineering, 2009

Efficient application assignment algorithm is important for high performance and low power consumption in NoC architecture. In this paper, we apply novel algorithm based on GA (genetic algorithm) and maximal free matrix constraint, which aim at using confliction avoidance and minimization between router communications in order to provide less network contentions during several running applications and get global optimization in ...


Low Power Synthesis of XOR-XNOR Intensive Combinational Logic

2007 Canadian Conference on Electrical and Computer Engineering, 2007

In the domain of combinational logic synthesis, simplification of functions based on AND-OR logic is a well studied area. However, since many real-life combinational functions are XOR dominated, efficient AND-XOR decomposition can lead to more compact realization of such circuits [1], Amongst the AND-XOR logic expressions, although there are several classes [1] viz. RM, PPRM, FPRM, KRO, PSDKRO, GRM and ...


Synthesis of asynchronous circuits for stuck-at and robust path delay fault testability

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1997

In this paper, we present methods for synthesizing multilevel asynchronous circuits to be both hazard free and completely testable. Making an asynchronous two-level circuit hazard free usually requires the introduction of either redundant or nonprime cubes or both. This adversely affects the circuit's testability. However, using extra inputs, which is seldom necessary, and a synthesis-for-testability method, we convert the two-level ...


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Educational Resources on Minimization methods

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IEEE.tv Videos

Formal Methods in Robotics
IMS 2012 Microapps - Panel Session: Device Characterization Methods and Advanced RF/ Microwave Design
IMS 2011 Microapps - Practical Methods for Estimating the Q of Spiral Inductors Using EM Planar Simulators
Learning with Kernels for Streams of Structured Data
Micro-Apps 2013: Alternative Methods and Optimization Techniques for Vector Modulation
Soft, Printable, and Small: An Overview of Manufacturing Methods for Novel Robots at Harvard
Computational Intelligence in (e)Healthcare - Challenges and Opportunites
Surgical Robotics: Robotics methods for navigating untethered agents through the vascular network
MicroApps: Different Methods for Capacitor Modelling in High-Frequency PCB-Based Diplexers (National Instruments)
IMS 2011 Microapps - Transient FEM Solver and Hybrid FE-IE Method; New Technologies in HFSS 13.0
Cooperative Localization in Sensor Networks
Signal Processing on Manifolds
Optimization Algorithms for Signal Processing
Imaging Human Brain Function with Simultaneous EEG-fMRI - IEEE Brain Workshop
Quantization Without Fine-Tuning - Tijimen Blankevoort - LPIRC 2018
Collaborative Filtering II
Innovative Transmission Line Measurement and Characterization Reduce Time to Repair for Complex Communication Systems: MicroApps 2015 - Keysight Technologies
Fuzzy Sets and Social Research - Charles C. Ragin - WCCI 2016
Playing Games with Computational Intelligence
Towards Higher Scalability of Quantum Hardware Emulation - Naveed Mahmud - ICRC 2018

IEEE-USA E-Books

  • Author's reply

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  • Time-domain inverse scattering of a chiral slab

    This paper investigates an inverse scattering problem for the reconstruction of constitutive parameters of a dispersive chiral slab in time domain. Time responses of the transmitted and reflected electric fields are simulated by using the FDTD method. Applying the Levenberg-Marquardt-Morrison method to the minimization of a cost functional, which is defined as a norm of discrepancy between the measured and computed responses, we can obtain an iterative algorithm of estimating the constitutive parameters. It is seen from the numerical results that the reconstructed results show good agreement with the true profiles.

  • GA Based Congestion Aware Algorithm for Application in NoC

    Efficient application assignment algorithm is important for high performance and low power consumption in NoC architecture. In this paper, we apply novel algorithm based on GA (genetic algorithm) and maximal free matrix constraint, which aim at using confliction avoidance and minimization between router communications in order to provide less network contentions during several running applications and get global optimization in a given NoC platform (16 × 16 cores). After applying our GA based congestion-aware placement algorithm, we observe dramatic reduction of congestion and improvement of performance compared to random selection results.

  • Low Power Synthesis of XOR-XNOR Intensive Combinational Logic

    In the domain of combinational logic synthesis, simplification of functions based on AND-OR logic is a well studied area. However, since many real-life combinational functions are XOR dominated, efficient AND-XOR decomposition can lead to more compact realization of such circuits [1], Amongst the AND-XOR logic expressions, although there are several classes [1] viz. RM, PPRM, FPRM, KRO, PSDKRO, GRM and ESOP, ESOPs are the most general Reed-Muller forms with interesting properties. Practically speaking, they have numerous applications in synthesis and design-for-test [3]. This work extends the originally proposed method of [1] [4], addressing the problem of ESOP minimization, by adding simple algebraic factorization operations. Besides, with new binary matrices of order '2 times n', we illustrate how to simplify even irreducible ESOP forms. We make it clear that XOR (XNOR) intensive combinational logic could effectively be implemented using five types of logic gates, namely XOR XNOR, NAND, NOR and NOT, in comparison with some of the solutions obtained in [10] [11]. The proposed synthesis solution is quantitatively evaluated on the basis of power consumption metric, after technology-mapping based on static CMOS logic style, with a 0.35 micron TSMC process technology.

  • Synthesis of asynchronous circuits for stuck-at and robust path delay fault testability

    In this paper, we present methods for synthesizing multilevel asynchronous circuits to be both hazard free and completely testable. Making an asynchronous two-level circuit hazard free usually requires the introduction of either redundant or nonprime cubes or both. This adversely affects the circuit's testability. However, using extra inputs, which is seldom necessary, and a synthesis-for-testability method, we convert the two-level circuit into a multilevel circuit that is completely testable. To avoid the addition of extra inputs as much as possible, we introduce new exact minimization algorithms for hazard-free two-level logic where we first minimize the number of redundant cubes and then minimize the number of nonprime cubes. We target both the stuck-at and robust path delay fault models using similar methods. However, the area overhead for the latter may be slightly higher than for the former.

  • Low power spread spectrum code generator based on parallel shift register implementation

    This paper describes a very low-power Gold code generator based on a parallel implementation of linear feedback shift registers. The parallel architecture dissipates less power than the conventional serial architecture and also allows a higher throughput rate. The parallel architecture and its associated switch minimization algorithm are explained and the architecture of the code generator is described. The Gold code generator designed in a 2 micron CMOS technology consumes less than 1000 microwatts when clocked at 50 MHz.

  • Modeling Mixed Continuous and Discrete Corridor Problems with Multimodal Choices

    In order to investigate commuters' multimodal choice behavior on a linear travel corridor, a mixed continuous and discrete user equilibrium model is proposed in this paper. The travel corridor is assumed to connect a continuum of residential locations to the workplace. Along it, a continuum highway and a rail line with finite stations compete for traffic. In such the transportation system, commuters have four alternatives for their travel, i.e., walk, auto, walk & rail and auto & rail. The proposed model is formulated as an equivalent minimization problem, which discrete approximation version can be solved by conventional solution algorithms. Numerical results on an example corridor show that as the number of discretized sections for the corridor increases, the flow volumes gradually stabilize and hence the solution quality is improved. The proposed model can be used to explore the effect of policy changes on commuters' multimodal spatial patterns at a macroscopic level.

  • Application of information theory to switching function minimisation

    The paper applies the information theoretic approach the authors have developed for the construction of efficient decision trees to the two-level switching function minimisation problem.<<ETX>>

  • Disparity estimation using color coherence and stochastic diffusion

    This paper deals with disparity estimation based on Markov random field (MRF) models and color coherence. The disparity and line fields are explicitly modeled as MRFs, and are estimated by the stochastic diffusion. The potential functions are defined from the novel stochastic models between disparity and line fields. The color information is also utilized to model the textureless regions where the disparity estimation generally fails. And, the derived potential functions are minimized by the novel energy minimization method called stochastic diffusion. The stochastic diffusion diffuses the potential space using the probability distribution of neighboring fields, and searches for the optimal fields in the converged potential space. Some experiments show good performances of disparity estimation, which are compared with the other methods in a Webpage.

  • A novel VLSI concurrent dual multiplier-dual adder architecture for image and video coding applications

    In this paper, an efficient algorithm for concurrent computation of two real multiplications and/or two real additions usually required for high-throughput image and video coding applications is described. The proposed algorithm is mapped onto a novel concurrent dual multiplier-dual adder cell based on carry- save 4:2 compressors. A detailed performance analysis of the the proposed cell shows reductions ranging from 15% to 60% in the computation time and area when compared with the conventional processing elements making it highly attractive for VLSI implementation.



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