Conferences related to MOS integrated circuits

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2020 57th ACM/ESDA/IEEE Design Automation Conference (DAC)

The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2022 59th ACM/ESDA/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2021 58th ACM/ESDA/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2019 56th ACM/ESDA/IEEE Design Automation Conference (DAC)

    EDA (Electronics Design Automation) is becoming ever more important with the continuous scaling of semiconductor devices and the growing complexities of their use in circuits and systems. Demands for lower-power, higher-reliability and more agile electronic systems raise new challenges to both design and design automation of such systems. For the past five decades, the primary focus of research track at DAC has been to showcase leading-edge research and practice in tools and methodologies for the design of circuits and systems.

  • 2018 55th ACM/ESDA/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2017 54th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2016 53nd ACM/EDAC/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2015 52nd ACM/EDAC/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2014 51st ACM/EDAC/IEEE Design Automation Conference (DAC)

    DAC Description for TMRF The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading

  • 2013 50th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 session on design methodologies and EDA tool developments, keynotes, panels, plus User Track presentations. A diverse worldwide community representing more than 1,000 organization attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2012 49th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The Design Automation Conference (DAC) is the premier event for the design of electronic circuits and systems, and for EDA and silicon solutions. DAC features a wide array of technical presentations plus over 200 of the leading electronics design suppliers

  • 2011 48th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The Design Automation Conference is the world s leading technical conference and tradeshow on electronic design and design automation. DAC is where the IC Design and EDA ecosystem learns, networks, and does business.

  • 2010 47th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The Design Automation Conference (DAC) is the premier event for the design of electronic circuits and systems, and for EDA and silicon solutions. DAC features a wide array of technical presentations plus over 200 of the leading electronics design suppliers.

  • 2009 46th ACM/EDAC/IEEE Design Automation Conference (DAC)

    DAC is the premier event for the electronic design community. DAC offers the industry s most prestigious technical conference in combination with the biggest exhibition, bringing together design, design automation and manufacturing market influencers.

  • 2008 45th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The Design Automation Conference (DAC) is the premier event for the design of electronic circuits and systems, and for EDA and silicon solutions. DAC features a wide array of technical presentations plus over 250 of the leading electronics design suppliers.

  • 2007 44th ACM/IEEE Design Automation Conference (DAC)

    The Design Automation Conference (DAC) is the premier Electronic Design Automation (EDA) and silicon solution event. DAC features over 50 technical sessions covering the latest in design methodologies and EDA tool developments and an Exhibition and Demo Suite area with over 250 of the leading EDA, silicon and IP Providers.

  • 2006 43rd ACM/IEEE Design Automation Conference (DAC)

  • 2005 42nd ACM/IEEE Design Automation Conference (DAC)

  • 2004 41st ACM/IEEE Design Automation Conference (DAC)

  • 2003 40th ACM/IEEE Design Automation Conference (DAC)

  • 2002 39th ACM/IEEE Design Automation Conference (DAC)

  • 2001 38th ACM/IEEE Design Automation Conference (DAC)

  • 2000 37th ACM/IEEE Design Automation Conference (DAC)

  • 1999 36th ACM/IEEE Design Automation Conference (DAC)

  • 1998 35th ACM/IEEE Design Automation Conference (DAC)

  • 1997 34th ACM/IEEE Design Automation Conference (DAC)

  • 1996 33rd ACM/IEEE Design Automation Conference (DAC)


2020 IEEE International Electron Devices Meeting (IEDM)

the IEEE/IEDM has been the world's main forum for reporting breakthroughs in technology, design, manufacturing, physics and the modeling of semiconductors and other electronic devices. Topics range from deep submicron CMOS transistors and memories to novel displays and imagers, from compound semiconductor materials to nanotechnology devices and architectures, from micromachined devices to smart -power technologies, etc.


2020 IEEE International Magnetic Conference (INTERMAG)

INTERMAG is the premier conference on all aspects of applied magnetism and provides a range of oral and poster presentations, invited talks and symposia, a tutorial session, and exhibits reviewing the latest developments in magnetism.


2020 IEEE International Solid- State Circuits Conference - (ISSCC)

ISSCC is the foremost global forum for solid-state circuits and systems-on-a-chip. The Conference offers 5 days of technical papers and educational events related to integrated circuits, including analog, digital, data converters, memory, RF, communications, imagers, medical and MEMS ICs.


2020 IEEE International Symposium on Circuits and Systems (ISCAS)

The International Symposium on Circuits and Systems (ISCAS) is the flagship conference of the IEEE Circuits and Systems (CAS) Society and the world’s premier networking and exchange forum for researchers in the highly active fields of theory, design and implementation of circuits and systems. ISCAS2020 focuses on the deployment of CASS knowledge towards Society Grand Challenges and highlights the strong foundation in methodology and the integration of multidisciplinary approaches which are the distinctive features of CAS contributions. The worldwide CAS community is exploiting such CASS knowledge to change the way in which devices and circuits are understood, optimized, and leveraged in a variety of systems and applications.


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Periodicals related to MOS integrated circuits

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Biomedical Circuits and Systems, IEEE Transactions on

The Transactions on Biomedical Circuits and Systems addresses areas at the crossroads of Circuits and Systems and Life Sciences. The main emphasis is on microelectronic issues in a wide range of applications found in life sciences, physical sciences and engineering. The primary goal of the journal is to bridge the unique scientific and technical activities of the Circuits and Systems ...


Circuits and Systems I: Regular Papers, IEEE Transactions on

Part I will now contain regular papers focusing on all matters related to fundamental theory, applications, analog and digital signal processing. Part II will report on the latest significant results across all of these topic areas.


Circuits and Systems II: Express Briefs, IEEE Transactions on

Part I will now contain regular papers focusing on all matters related to fundamental theory, applications, analog and digital signal processing. Part II will report on the latest significant results across all of these topic areas.


Communications, IEEE Transactions on

Telephone, telegraphy, facsimile, and point-to-point television, by electromagnetic propagation, including radio; wire; aerial, underground, coaxial, and submarine cables; waveguides, communication satellites, and lasers; in marine, aeronautical, space and fixed station services; repeaters, radio relaying, signal storage, and regeneration; telecommunication error detection and correction; multiplexing and carrier techniques; communication switching systems; data communications; and communication theory. In addition to the above, ...


Computer

Computer, the flagship publication of the IEEE Computer Society, publishes peer-reviewed technical content that covers all aspects of computer science, computer engineering, technology, and applications. Computer is a resource that practitioners, researchers, and managers can rely on to provide timely information about current research developments, trends, best practices, and changes in the profession.


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Most published Xplore authors for MOS integrated circuits

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No authors for "MOS integrated circuits"


Xplore Articles related to MOS integrated circuits

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IEE Colloquium on 'Advanced MOS and Bi-Polar Devices' (Digest No.1995/033)

IEE Colloquium on Advanced MOS and Bi-Polar Devices, 1995

None


IEE Colloquium on 'Sub-Micron VLSI Reliability' (Digest No.002)

IEE Colloquium on Sub-Micron VLSI Reliability, 1992

None


Cross-talk suppression Faraday cage structure in silicon-on-insulator

2002 IEEE International SOI Conference, 2002

Substrate crosstalk presents a fundamental limitation to further increases in integration of mixed signal RF telecommunication ICs. In this work, results of cross-talk suppression in ground plane SOI (GPSOI) are presented where the buried metal ground planes are combined with vertical metal-filled trenches to form a complete Faraday cage structure around the transmitter and receiver. Measurements indicate that cross-talk suppression ...


Very high precision analog trimming using floating gate MOSFETS

1989 European Conference on Circuit Theory and Design, 1989

The addition of a floating gate MOS transistor option to basic CMOS or BiMOS processes is becoming recognized as a viable option with improvements in thin gate technology and the practical acceptance of increased process complexity. The use of the devices as infinite resolution nonvolatile storage devices and as precision analog trim elements are discussed. Experimental results focusing on the ...


Field programmable analogue array based on MOSFET transconductors

Electronics Letters, 1992

An area efficient and parasitic insensitive technique for the implementation of a field programmable analogue array is proposed. The connections between configurable analogue blocks are realised using MOSFET transconductors. The conductance is controlled by varying the gate voltages defined by a multivalued memory system or external/internal signals.<<ETX>>


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Educational Resources on MOS integrated circuits

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IEEE-USA E-Books

  • IEE Colloquium on 'Advanced MOS and Bi-Polar Devices' (Digest No.1995/033)

    None

  • IEE Colloquium on 'Sub-Micron VLSI Reliability' (Digest No.002)

    None

  • Cross-talk suppression Faraday cage structure in silicon-on-insulator

    Substrate crosstalk presents a fundamental limitation to further increases in integration of mixed signal RF telecommunication ICs. In this work, results of cross-talk suppression in ground plane SOI (GPSOI) are presented where the buried metal ground planes are combined with vertical metal-filled trenches to form a complete Faraday cage structure around the transmitter and receiver. Measurements indicate that cross-talk suppression is enhanced by 70 dB at 1 GHz.

  • Very high precision analog trimming using floating gate MOSFETS

    The addition of a floating gate MOS transistor option to basic CMOS or BiMOS processes is becoming recognized as a viable option with improvements in thin gate technology and the practical acceptance of increased process complexity. The use of the devices as infinite resolution nonvolatile storage devices and as precision analog trim elements are discussed. Experimental results focusing on the programming resolution and time-stability of the charge retention are presented.<<ETX>>

  • Field programmable analogue array based on MOSFET transconductors

    An area efficient and parasitic insensitive technique for the implementation of a field programmable analogue array is proposed. The connections between configurable analogue blocks are realised using MOSFET transconductors. The conductance is controlled by varying the gate voltages defined by a multivalued memory system or external/internal signals.<<ETX>>

  • Novel silicon-on-insulator MOSFET for high-voltage integrated circuits

    A novel silicon-on-insulator MOSFET for high-voltage ICs is presented. Computer simulations are given to prove the high-voltage capability of the device structure. Also given is a practical implementation procedure.<<ETX>>

  • 75A/250V/75KHz intelligent half bridge power module

    Class D switching power amplifiers for driving electrodynamic shake tables must offer low distortion, good efficiency and reduced Radio Frequency Interference. Low distortion implies high switching frequencies, with turn on and turn off delay times as short as possible. Paralleling MOSFET chips contributes to decreased conduction losses through reduced Rdson. It Is Imperative to inhibit the MOSFET body diodes by adopting both series and fast recovery "soft" antiparallel FRED's. With such a complex structure it makes eminent sense to integrate all these components as a complete half bridge inside a single power module. In this way, interconnection parasitics are minimized. resulting in less environmental disturbance and improved reliability. Reliability is further enhanced by integrating driver power supplies undervoltage lockout, short-circuit protection and temperature monitoring all with associated fault output flags. The drivers themselves are galvanically isolated via high frequency transformers. Power Compact, in collaboration with LDS, has developed an intelligent half bridge power module satisfying all these criteria; this module, described in this paper, is featured in LDS' latest switch-mode power amplifiers.<<ETX>>

  • CIRCOR-an expert system for fault correction of digital NMOS circuits

    In this paper the CIRcuit CORrection rule-based expert system (CIRCOR) for the repair oriented diagnosis of NMOS and CMOS digital circuits is presented. Its objective is, in spite of testing, to reduce or eliminate the need for human analysis of tester-generated failure messages. The program can handle all types of physical failures than can occur in integrated circuits, that is: shorts, opens, extra transistors, missing transistors terminals within the range of primitive building blocks specified by the user. CIRCOR offers the possibility of diagnosing circuits only on the basis of an extracted transistor level description.<<ETX>>

  • Realistic fault model for external shorts in MOS technologies

    The authors focus on the fault modelling of external shorts in H-, C- and BiC- MOS digital circuits. In the context of functional testing, it is demonstrated that eight different electrical configurations may appear depending on the topological and technological parameters of the fault. Therefore, eight new logical models are defined showing that the wired-OR and wired-AND models, classically used for test pattern generation, fault simulation and defect coverage evaluation are not sufficient.<<ETX>>

  • CIRCOR-an efficient circuit correction expert system

    The circuit correction rule-based expert system (CIRCOR) for the repair oriented diagnosis of NMOS and CMOS digital circuits is presented. Its objective is, in spite of testing, to reduce or eliminate the need for human analysis of tester-generated failure messages. The program can handle all types of physical failures that can occur in integrated circuits, that is: shorts, opens, extra transistors, missing transistors terminals within the range of primitive building blocks specified by the user. In the verification systems described by Lob (1985), Apfelbaum (1986) or Papaspyridis (1988) the transistor level description of the circuit is checked against its specification, which was entered for example textually in a language. CIRCOR offers the possibility to diagnose circuits only on the basis of extracted transistor level description.<<ETX>>



Standards related to MOS integrated circuits

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Jobs related to MOS integrated circuits

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