Conferences related to JFET integrated circuits

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2020 22nd European Conference on Power Electronics and Applications (EPE'20 ECCE Europe)

Energy conversion and conditioning technologies, power electronics, adjustable speed drives and their applications, power electronics for smarter grid, energy efficiency,technologies for sustainable energy systems, converters and power supplies


2020 IEEE 29th International Symposium on Industrial Electronics (ISIE)

ISIE focuses on advancements in knowledge, new methods, and technologies relevant to industrial electronics, along with their applications and future developments.


2020 IEEE Applied Power Electronics Conference and Exposition (APEC)

APEC focuses on the practical and applied aspects of the power electronics business. Not just a power designer’s conference, APEC has something of interest for anyone involved in power electronics including:- Equipment OEMs that use power supplies and converters in their equipment- Designers of power supplies, dc-dc converters, motor drives, uninterruptable power supplies, inverters and any other power electronic circuits, equipments and systems- Manufacturers and suppliers of components and assemblies used in power electronics- Manufacturing, quality and test engineers involved with power electronics equipment- Marketing, sales and anyone involved in the business of power electronic- Compliance engineers testing and qualifying power electronics equipment or equipment that uses power electronics


2020 IEEE Nuclear Science Symposium and Medical Imaging Conference (NSS/MIC)

All areas of ionizing radiation detection - detectors, signal processing, analysis of results, PET development, PET results, medical imaging using ionizing radiation


2020 Joint Conference of the IEEE International Frequency Control Symposium and International Symposium on Applications of Ferroelectrics (IFCS-ISAF)

Ferroelectric materials and applications


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Periodicals related to JFET integrated circuits

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Biomedical Engineering, IEEE Transactions on

Broad coverage of concepts and methods of the physical and engineering sciences applied in biology and medicine, ranging from formalized mathematical theory through experimental science and technological development to practical clinical applications.


Circuits and Systems I: Regular Papers, IEEE Transactions on

Part I will now contain regular papers focusing on all matters related to fundamental theory, applications, analog and digital signal processing. Part II will report on the latest significant results across all of these topic areas.


Circuits and Systems II: Express Briefs, IEEE Transactions on

Part I will now contain regular papers focusing on all matters related to fundamental theory, applications, analog and digital signal processing. Part II will report on the latest significant results across all of these topic areas.


Computer

Computer, the flagship publication of the IEEE Computer Society, publishes peer-reviewed technical content that covers all aspects of computer science, computer engineering, technology, and applications. Computer is a resource that practitioners, researchers, and managers can rely on to provide timely information about current research developments, trends, best practices, and changes in the profession.


Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on

Methods, algorithms, and human-machine interfaces for physical and logical design, including: planning, synthesis, partitioning, modeling, simulation, layout, verification, testing, and documentation of integrated-circuit and systems designs of all complexities. Practical applications of aids resulting in producible analog, digital, optical, or microwave integrated circuits are emphasized.


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Most published Xplore authors for JFET integrated circuits

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Xplore Articles related to JFET integrated circuits

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GaAs JFET front-end MMICs for L-band personal communications

IEEE 1993 Microwave and Millimeter-Wave Monolithic Circuits Symposium Digest of Papers, 1993

The development of GaAs JFET (junction field-effect transistor) low noise and low distortion amplifier and mixer MMICs (monolithic microwave integrated circuits) for front-end use in L-band personal communications is discussed. These MMICs can be operated by a 3.0-V single biasing supply with a very low current dissipation of 4.0 mA. In order to achieve excellent low intermodulation distortion, a current-mirror ...


Ion implanted GaAs enhancement mode JFET's

1975 International Electron Devices Meeting, 1975

The objective of this investigation was to fabricate various types of enhancement mode GaAs junction field-effect transistors (JFET) utilising ion implantation and to explore their electrical characteristics. A promising application of enhancement mode GaAs JFET's to high speed, low power, radiation hardened integrated circuits has been established (1). Although the present ion implanted devices are not optimised with respect to ...


P-JFET on SIMOX for rad-hard analog devices

1990 IEEE SOS/SOI Technology Conference. Proceedings, 1990

Development of a fully CMOS and bipolar compatible JFET process on SIMOX is reported. The main characteristics obtained on a two-junction-type JFET realized in 1- mu m silicon epitaxy on SOI material are presented. A mesa- structure has been chosen for lateral isolation. A deep junction is arsenic implanted before epitaxy at 1000 degrees C; the channel and drain/source doping ...


High speed, low power GaAs JFET integrated circuits

1975 International Electron Devices Meeting, 1975

Enhancement mode GaAs junction field-effect transistors have been explored in their application to digital and linear integrated circuit design. A 3-input NAND-gate and a one stage differential amplifier have been fabricated in integrated form on a 30 × 30 mil2chip. The electrical performance characteristics will be described. With a 4 micron gate length the monolithically integrated 3- input NAND-gate has ...


A fast 1024-bit bipolar RAM using JFET load devices

1977 IEEE International Solid-State Circuits Conference. Digest of Technical Papers, 1977

None


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Educational Resources on JFET integrated circuits

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IEEE.tv Videos

IEEE Custom Integrated Circuits Conference
Multi-Level Optical Weights in Integrated Circuits - IEEE Rebooting Computing 2017
Education for Analog ICs
IEEE Photonics Conference 2017 Recap
ASC-2014 SQUIDs 50th Anniversary: 1 of 6 Arnold Silver
Multi-Level Optimization for Large Fan-In Optical Logic Circuits - Takumi Egawa - ICRC 2018
R. Jacob Baker - SSCS Chip Chat Podcast, Episode 4
IMS 2014:Active 600GHz Frequency Multiplier-by-Six S-MMICs for Submillimeter-Wave Generation
"Towards Monolithic Quantum Computing Processors In Production FDSOI CMOS Technology"
Interview with Takao Nishitani - IEEE Donald O. Pederson Award in Solid-State Circuits Co-Recipient 2017
2011 IEEE Medal of Honor: Morris Chang
Pt. 2: Electronic & Photonic (Co)Packaging Technologies - Bill Bottoms - Industry Panel 2, IEEE Globecom, 2019
BSIM Spice Model Enables FinFET and UTB IC Design
Robust Qubit Manipulation with Integrated Circuits: Optical Computing - Pérola Milman at INC 2019
A Low-Power Fully Integrated 76-81GHz ADPLL for Automotive Applications - Ahmed R. Fridi - RFIC 2019 Showcase
Towards Logic-in-Memory circuits using 3D-integrated Nanomagnetic Logic - Fabrizio Riente: 2016 International Conference on Rebooting Computing
ON-CHIP VOLTAGE AND TIMING DIAGNOSTIC CIRCUITS
Pt. 2: Limits & Prospects of Mixed-Signal Electronics - Tomislav Drenski - Industry Panel 2, IEEE Globecom, 2019
Going Beyond Moore's Law: IEEE at SXSW 2017
26th Annual MTT-AP Symposium and Mini Show - Dr. AnhVu Pham

IEEE-USA E-Books

  • GaAs JFET front-end MMICs for L-band personal communications

    The development of GaAs JFET (junction field-effect transistor) low noise and low distortion amplifier and mixer MMICs (monolithic microwave integrated circuits) for front-end use in L-band personal communications is discussed. These MMICs can be operated by a 3.0-V single biasing supply with a very low current dissipation of 4.0 mA. In order to achieve excellent low intermodulation distortion, a current-mirror active biasing circuit using enhancement-mode JFETs and a resistive mixing configuration have been realized.<<ETX>>

  • Ion implanted GaAs enhancement mode JFET's

    The objective of this investigation was to fabricate various types of enhancement mode GaAs junction field-effect transistors (JFET) utilising ion implantation and to explore their electrical characteristics. A promising application of enhancement mode GaAs JFET's to high speed, low power, radiation hardened integrated circuits has been established (1). Although the present ion implanted devices are not optimised with respect to electrical performance, it is demonstrated that ion implantation can replace epitaxy and diffusion of the standard fabrication technique. Inherent to ion implantation is precise control of impurity concentration, depth and profile, thus leading to integrated circuit fabrication with improved yield figures over large wafer areas.

  • P-JFET on SIMOX for rad-hard analog devices

    Development of a fully CMOS and bipolar compatible JFET process on SIMOX is reported. The main characteristics obtained on a two-junction-type JFET realized in 1- mu m silicon epitaxy on SOI material are presented. A mesa- structure has been chosen for lateral isolation. A deep junction is arsenic implanted before epitaxy at 1000 degrees C; the channel and drain/source doping levels are controlled by ion implantation; the upper junction is diffused from polysilicon. Radiation dose, neutron fluence, and photocurrent effects are described.<<ETX>>

  • High speed, low power GaAs JFET integrated circuits

    Enhancement mode GaAs junction field-effect transistors have been explored in their application to digital and linear integrated circuit design. A 3-input NAND-gate and a one stage differential amplifier have been fabricated in integrated form on a 30 × 30 mil2chip. The electrical performance characteristics will be described. With a 4 micron gate length the monolithically integrated 3- input NAND-gate has a propagation delay time of 1 ns with a power dissipation of 2mW per gate, i.e., speed-power product of 2 pJ. The differential amplifier has a response time of 2 ns and flat frequency response to about 150 MHz. GaAs enhancement (normally-off) JFET integrated circuits offer better speed-power products than CMOS or Schottky-clamped bipolar ones at operating frequencies of 1 MHz and above. Optimized devices are capable of operating with a speed-power product of 1-2 pJ in the subnano- second switching range. The temperature range from 2°K to 650°K (or 380°C) for GaAs JFET's encompasses applications which are not possible with silicon devices GaAs JFET's and IC's are superior to Si devices and IC's in gamma and neutron environments and offer a potential design in radiation hardened integrated electronics.

  • A fast 1024-bit bipolar RAM using JFET load devices

    None

  • A planar InGaAs PIN/JFET fiber-optic detector

    A planar structure monolithic optoelectronic integrated circuit (OEIC), comprising an InGaAs PIN photodiode and an InGaAs junction field effect transistor (JFET), has been developed. A cutoff frequency of 1.3 GHz has been successfully obtained. A low dark-current characteristic has also been obtained by polyimide passivation. Design principle, fabrication procedures, and operation characteristics of the PIN/JFET are described.

  • Errata

    None

  • Complementary JFET negative-resistance devices

    A new type of negative-resistance device utilizing a simple combination of complementary JFET's, which is suitable not only for discrete use but for use as a unit cell in bipolar integrated circuits (IC's) is proposed. The basic structure and the essential fabrication technology are described, and varieties of unitary negative-resistance devices using the integrated complementary JFET structure are proposed. The principle of operation is discussed with numerical and experimental analysis. Empirical formulas for practical design have been established with satisfactory agreements with experimental results.

  • Absolute-value circuit using junction field-effect transistors

    A novel configuration for an absolute-value circuit (full-wave rectifier with zero threshold) using two matched junction field-effect transistors is proposed and experimentally demonstrated. The zero-threshold rectification is accompanied by a scaling of the input signal by a theoretical factor of 1//spl radic/2, and is achieved by mathematically exploiting the nonlinear characteristics of the transistors. The circuit operates with complementary input signals and requires a dc bias voltage for the transistor gates. Negative or positive output voltages can be obtained by using either n- or p-channel devices.

  • 1000-V 9.1-<formula formulatype="inline"><tex>$\hbox{m}\Omega \cdot \hbox{cm}^{2}$</tex></formula> Normally Off 4H-SiC Lateral RESURF JFET for Power Integrated Circuit Applications

    A 4H-SiC normally off vertical channel lateral reduced-surface electric-field (RESURF) junction field-effect transistor (JFET) with a blocking voltage Vbr of 1028 V and a specific on-resistance R on-sp of 9.1 mOmegamiddotcm2 has been experimentally demonstrated. The device has a Vbr 2/Ron-sp figure-of-merit of 116 MW/cm2, which is the highest value achieved to date on a 4H-SiC lateral power transistor. Also reported is a larger JFET that is capable of handling over 0.5-A current on an active area of 4.01times10-3 cm2. The fabricated double-RESURF devices have a vertical channel length of 1.8 mum, created by tilted aluminum (Al) implantation on the sidewalls of deep trenches, and a lateral drift-region length of 7.5 mum. In addition, low-voltage logic- inverter circuits based on the same lateral JFET process have been monolithically integrated on the same chip. Proper logic-inverter function has also been demonstrated



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