Conferences related to Digital signal processors

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2020 22nd European Conference on Power Electronics and Applications (EPE'20 ECCE Europe)

Energy conversion and conditioning technologies, power electronics, adjustable speed drives and their applications, power electronics for smarter grid, energy efficiency,technologies for sustainable energy systems, converters and power supplies


2020 42nd Annual International Conference of the IEEE Engineering in Medicine & Biology Society (EMBC)

The conference program will consist of plenary lectures, symposia, workshops and invitedsessions of the latest significant findings and developments in all the major fields of biomedical engineering.Submitted papers will be peer reviewed. Accepted high quality papers will be presented in oral and postersessions, will appear in the Conference Proceedings and will be indexed in PubMed/MEDLINE


2020 IEEE International Symposium on Circuits and Systems (ISCAS)

The International Symposium on Circuits and Systems (ISCAS) is the flagship conference of the IEEE Circuits and Systems (CAS) Society and the world’s premier networking and exchange forum for researchers in the highly active fields of theory, design and implementation of circuits and systems. ISCAS2020 focuses on the deployment of CASS knowledge towards Society Grand Challenges and highlights the strong foundation in methodology and the integration of multidisciplinary approaches which are the distinctive features of CAS contributions. The worldwide CAS community is exploiting such CASS knowledge to change the way in which devices and circuits are understood, optimized, and leveraged in a variety of systems and applications.


2020 IEEE Nuclear Science Symposium and Medical Imaging Conference (NSS/MIC)

All areas of ionizing radiation detection - detectors, signal processing, analysis of results, PET development, PET results, medical imaging using ionizing radiation


GLOBECOM 2020 - 2020 IEEE Global Communications Conference

IEEE Global Communications Conference (GLOBECOM) is one of the IEEE Communications Society’s two flagship conferences dedicated to driving innovation in nearly every aspect of communications. Each year, more than 2,900 scientific researchers and their management submit proposals for program sessions to be held at the annual conference. After extensive peer review, the best of the proposals are selected for the conference program, which includes technical papers, tutorials, workshops and industry sessions designed specifically to advance technologies, systems and infrastructure that are continuing to reshape the world and provide all users with access to an unprecedented spectrum of high-speed, seamless and cost-effective global telecommunications services.


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Periodicals related to Digital signal processors

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Applied Superconductivity, IEEE Transactions on

Contains articles on the applications and other relevant technology. Electronic applications include analog and digital circuits employing thin films and active devices such as Josephson junctions. Power applications include magnet design as well asmotors, generators, and power transmission


Automatic Control, IEEE Transactions on

The theory, design and application of Control Systems. It shall encompass components, and the integration of these components, as are necessary for the construction of such systems. The word `systems' as used herein shall be interpreted to include physical, biological, organizational and other entities and combinations thereof, which can be represented through a mathematical symbolism. The Field of Interest: shall ...


Biomedical Circuits and Systems, IEEE Transactions on

The Transactions on Biomedical Circuits and Systems addresses areas at the crossroads of Circuits and Systems and Life Sciences. The main emphasis is on microelectronic issues in a wide range of applications found in life sciences, physical sciences and engineering. The primary goal of the journal is to bridge the unique scientific and technical activities of the Circuits and Systems ...


Biomedical Engineering, IEEE Transactions on

Broad coverage of concepts and methods of the physical and engineering sciences applied in biology and medicine, ranging from formalized mathematical theory through experimental science and technological development to practical clinical applications.


Circuits and Systems II: Express Briefs, IEEE Transactions on

Part I will now contain regular papers focusing on all matters related to fundamental theory, applications, analog and digital signal processing. Part II will report on the latest significant results across all of these topic areas.


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Most published Xplore authors for Digital signal processors

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Xplore Articles related to Digital signal processors

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An NMOS digital signal processor with multiprocessing capability

1985 IEEE International Solid-State Circuits Conference. Digest of Technical Papers, 1985

This paper will describe a second generation 8-13MIP multi-tasking DSP with a 544×16b RAM and single cycle multiply/accumulation instructions. The chip is implemented with 2.4μ NMOS technology.


Future Trends in Digital Signal Processors

1991 Symposium on VLSI Circuits, 1991

Summary form only given. Discusses future trends in the development and applications supported by digital signal processing.


A Low-cost Implementation Of AC-2 Audio Decoder

IEEE 1992 International Conference on Consumer Electronics Digest of Technical Papers, 1992

None


The Advantages Of Digital Signal Processors In Cordless Telephony

IEEE 1992 International Conference on Consumer Electronics Digest of Technical Papers, 1992

None


Pipeline Design for Quasi-Orthogonal Dsp's

The Sixteenth Conference of Electrical and Electronics Engineers in Israel,, 1989

We have observed in current single-chip DSP's the same pipeline design problem which occurs in Long Instruction Word processors. The problem is simplified by the shorter microinstruction, but is complicated by the assumed off-chip peripherals. One is forced to deal with these external sources of non- orthogonality. Based on a multi-layered representation of pipeline entities, each with a definite flow ...


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Educational Resources on Digital signal processors

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IEEE.tv Videos

2017 IEEE Donald O. Pederson Award in Solid-State Circuits: Takao Nishitani and John S. Thompson
2011 IEEE/RSE Wolfson James Clerk Maxwell Award - Marcian E. Hoff
High Throughput Neural Network based Embedded Streaming Multicore Processors - Tarek Taha: 2016 International Conference on Rebooting Computing
Digital Signal Processing for Envelope Tracking Systems
ICASSP 2010 - New Signal Processing Application Areas
"Towards Monolithic Quantum Computing Processors In Production FDSOI CMOS Technology"
Quantum Annealing: Current Status and Future Directions - Applied Superconductivity Conference 2018
IEEE Jack S. Kilby Signal Processing Medal - Bede Liu - 2018 IEEE Honors Ceremony
Micro-Apps Keynote 2013: Modern RF Measurements and How They Drive Spectrum Analyzer Digital IF Processor Design
Martin Vetterli accepts the IEEE Jack S. Kilby Signal Processing Medal - Honors Ceremony 2017
Co-design of Power Amplifier and Dynamic Power Supplies for Radar and Communications Transmitters
Noise-Shaped Active SAR Analog-to-Digital Converter - IEEE Circuits and Systems Society (CAS) Distinguished Lecture
ASC-2014 SQUIDs 50th Anniversary: 1 of 6 Arnold Silver
What's New in Digital Predistortion
Interview with Takao Nishitani - IEEE Donald O. Pederson Award in Solid-State Circuits Co-Recipient 2017
Optical Stealth Communication based on Amplified Spontaneous Emission Noise - Ben Wu - IEEE Sarnoff Symposium, 2019
NXP
IEEE PELS Webinar Series-Galvanic Isolation for Power Supply Applications
H. Vincent Poor accepts the IEEE Alexander Graham Bell Medal - Honors Ceremony 2017
Micro-Apps 2013: Understanding Probability of Intercept for Intermittent Signals

IEEE-USA E-Books

  • An NMOS digital signal processor with multiprocessing capability

    This paper will describe a second generation 8-13MIP multi-tasking DSP with a 544×16b RAM and single cycle multiply/accumulation instructions. The chip is implemented with 2.4μ NMOS technology.

  • Future Trends in Digital Signal Processors

    Summary form only given. Discusses future trends in the development and applications supported by digital signal processing.

  • A Low-cost Implementation Of AC-2 Audio Decoder

    None

  • The Advantages Of Digital Signal Processors In Cordless Telephony

    None

  • Pipeline Design for Quasi-Orthogonal Dsp's

    We have observed in current single-chip DSP's the same pipeline design problem which occurs in Long Instruction Word processors. The problem is simplified by the shorter microinstruction, but is complicated by the assumed off-chip peripherals. One is forced to deal with these external sources of non- orthogonality. Based on a multi-layered representation of pipeline entities, each with a definite flow role, we substitute an obscure 'virtual pipeline invisibility' by a neat 'quasi-orthogonality': one should abstract the actual processor into those entities, pushing non-orthogonality to the lowest possible layer of the representation. The abstraction gives the application designer an explicit view of the available resources and their limitations, As shown for a concrete example, viz. off-chip memory extensions, one is provided with the necessary pieces of information to achieve pipeline efficiency.

  • Implementation of Adaptive FIR Filter Based on TMS320VC5402

    The article introduced the design and implementation of the adaptive FIR filter based on DSP (digital signal processor). Firstly, simulate experiment of the adaptive FIR filter structure and algorithm is carried out by MATLAB, and adaptive filtering of the input signal added Gauss noise is performed. Simulation waves are given, and the reference data for the DSP designing is provided. On this foundation, TMS320VC5402 DSP chip is selected as the center processor to design and implement the adaptive FIR filter. The hardware system design module, the software system design flow chart and the related assembly code are given. The uniformity of simulation results and measurement results and the filter effect is satisfied.

  • A single-chip mixed analog/digital signal processor for voiceband applications

    A single-chip signal processor for high-speed voiceband applications is described. The chip integrates a high-performance analog front-end containing a 16-b sigma-delta ADC, a 10-b DAC ,and programmable switched-capacitor filters with a custom digital signal processor using 1.0- mu m CMOS technology. This processor consumes 375 mW from a single 5-V supply, and occupies 81 mm/sup 2/ with an 8K instruction ROM.<<ETX>>

  • FPGA based ASM implementation for CCD camera controller

    A general purpose CCD controller that can address any CCD, has been developed at the Indian Institute of Astrophysics. It is based on a Digital Signal Processor (DSP) chip, Motorola DSP 56002 for implementing essential operations such as read-out of the CCD, interfacing with the host and correlated double sampling for reset noise elimination. In order to reduce the chip count and size of the controller with a view to adopt it for building a space borne application of the camera, a need has been felt to implement the design with the use of a Field Programmable Gate Array (FPGA) approach. Such an approach would not only be efficient but would also be able to enhance the image processing strategies. After examining the functionality of the DSP board, Bias and Clock board, Host Interface and Data Acquisition functions, an Algorithmic State Machine (ASM) is derived from the DSP code. In this paper we report the ASM design that has been used to design the system using the Hardware Description Language (HDL). Verilog HDL is used to create the code, which can be tested and debugged using Xlinx ISE software package. This paper also reports the timing generator that has been implemented on Xlinx chip. It is proposed to implement the serial and parallel communication with fibre optics link in this approach.

  • A programmable radar signal processor architecture

    A programmable radar signal processor architecture is described. It is designed to handle up to a 10-MHz analog/digital sample rate. The architecture consists of a front-end composed of a parallel array of programmable digital signal processing (DSP) devices, which performs the high-speed signal processing functions such as pulse compression, moving target indication, constant false alarm rate processing, etc., and outputs contact reports, to a back-end processor consisting of transputer microprocessors to perform post- detection processing. The processor is being developed to support the Point Defence Demonstration Radar.<<ETX>>

  • Retargeting of compiled simulators for digital signal processors using a machine description language

    This paper presents a methodology to retarget the technique of compiled simulation for digital signal processors (DSPs) using the modeling language LISA. In the past, the principle of compiled simulation as means for speeding up simulators has only been implemented for specific DSP architectures. The new approach presented here discusses methods of integrating compiled simulation techniques to retargetable simulation tools. The principle and the implementation are discussed in this paper and results for the TI TMS320C6201 DSP are presented.



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