Conferences related to Design optimization

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2021 IEEE Photovoltaic Specialists Conference (PVSC)

Photovoltaic materials, devices, systems and related science and technology


2020 IEEE International Symposium on Antennas and Propagation and North American Radio Science Meeting

The joint meeting is intended to provide an international forum for the exchange of information on state of the art research in the area of antennas and propagation, electromagnetic engineering and radio science


2020 42nd Annual International Conference of the IEEE Engineering in Medicine & Biology Society (EMBC)

The conference program will consist of plenary lectures, symposia, workshops and invitedsessions of the latest significant findings and developments in all the major fields of biomedical engineering.Submitted papers will be peer reviewed. Accepted high quality papers will be presented in oral and postersessions, will appear in the Conference Proceedings and will be indexed in PubMed/MEDLINE


2020 57th ACM/ESDA/IEEE Design Automation Conference (DAC)

The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2022 59th ACM/ESDA/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2021 58th ACM/ESDA/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2019 56th ACM/ESDA/IEEE Design Automation Conference (DAC)

    EDA (Electronics Design Automation) is becoming ever more important with the continuous scaling of semiconductor devices and the growing complexities of their use in circuits and systems. Demands for lower-power, higher-reliability and more agile electronic systems raise new challenges to both design and design automation of such systems. For the past five decades, the primary focus of research track at DAC has been to showcase leading-edge research and practice in tools and methodologies for the design of circuits and systems.

  • 2018 55th ACM/ESDA/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2017 54th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2016 53nd ACM/EDAC/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2015 52nd ACM/EDAC/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2014 51st ACM/EDAC/IEEE Design Automation Conference (DAC)

    DAC Description for TMRF The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading

  • 2013 50th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 session on design methodologies and EDA tool developments, keynotes, panels, plus User Track presentations. A diverse worldwide community representing more than 1,000 organization attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2012 49th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The Design Automation Conference (DAC) is the premier event for the design of electronic circuits and systems, and for EDA and silicon solutions. DAC features a wide array of technical presentations plus over 200 of the leading electronics design suppliers

  • 2011 48th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The Design Automation Conference is the world s leading technical conference and tradeshow on electronic design and design automation. DAC is where the IC Design and EDA ecosystem learns, networks, and does business.

  • 2010 47th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The Design Automation Conference (DAC) is the premier event for the design of electronic circuits and systems, and for EDA and silicon solutions. DAC features a wide array of technical presentations plus over 200 of the leading electronics design suppliers.

  • 2009 46th ACM/EDAC/IEEE Design Automation Conference (DAC)

    DAC is the premier event for the electronic design community. DAC offers the industry s most prestigious technical conference in combination with the biggest exhibition, bringing together design, design automation and manufacturing market influencers.

  • 2008 45th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The Design Automation Conference (DAC) is the premier event for the design of electronic circuits and systems, and for EDA and silicon solutions. DAC features a wide array of technical presentations plus over 250 of the leading electronics design suppliers.

  • 2007 44th ACM/IEEE Design Automation Conference (DAC)

    The Design Automation Conference (DAC) is the premier Electronic Design Automation (EDA) and silicon solution event. DAC features over 50 technical sessions covering the latest in design methodologies and EDA tool developments and an Exhibition and Demo Suite area with over 250 of the leading EDA, silicon and IP Providers.

  • 2006 43rd ACM/IEEE Design Automation Conference (DAC)

  • 2005 42nd ACM/IEEE Design Automation Conference (DAC)

  • 2004 41st ACM/IEEE Design Automation Conference (DAC)

  • 2003 40th ACM/IEEE Design Automation Conference (DAC)

  • 2002 39th ACM/IEEE Design Automation Conference (DAC)

  • 2001 38th ACM/IEEE Design Automation Conference (DAC)

  • 2000 37th ACM/IEEE Design Automation Conference (DAC)

  • 1999 36th ACM/IEEE Design Automation Conference (DAC)

  • 1998 35th ACM/IEEE Design Automation Conference (DAC)

  • 1997 34th ACM/IEEE Design Automation Conference (DAC)

  • 1996 33rd ACM/IEEE Design Automation Conference (DAC)


2020 59th IEEE Conference on Decision and Control (CDC)

The CDC is the premier conference dedicated to the advancement of the theory and practice of systems and control. The CDC annually brings together an international community of researchers and practitioners in the field of automatic control to discuss new research results, perspectives on future developments, and innovative applications relevant to decision making, automatic control, and related areas.


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Periodicals related to Design optimization

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Advanced Packaging, IEEE Transactions on

The IEEE Transactions on Advanced Packaging has its focus on the modeling, design, and analysis of advanced electronic, photonic, sensors, and MEMS packaging.


Automatic Control, IEEE Transactions on

The theory, design and application of Control Systems. It shall encompass components, and the integration of these components, as are necessary for the construction of such systems. The word `systems' as used herein shall be interpreted to include physical, biological, organizational and other entities and combinations thereof, which can be represented through a mathematical symbolism. The Field of Interest: shall ...


Biomedical Circuits and Systems, IEEE Transactions on

The Transactions on Biomedical Circuits and Systems addresses areas at the crossroads of Circuits and Systems and Life Sciences. The main emphasis is on microelectronic issues in a wide range of applications found in life sciences, physical sciences and engineering. The primary goal of the journal is to bridge the unique scientific and technical activities of the Circuits and Systems ...


Biomedical Engineering, IEEE Transactions on

Broad coverage of concepts and methods of the physical and engineering sciences applied in biology and medicine, ranging from formalized mathematical theory through experimental science and technological development to practical clinical applications.


Circuits and Systems II: Express Briefs, IEEE Transactions on

Part I will now contain regular papers focusing on all matters related to fundamental theory, applications, analog and digital signal processing. Part II will report on the latest significant results across all of these topic areas.


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Most published Xplore authors for Design optimization

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Xplore Articles related to Design optimization

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Three-dimensional high-frequency distribution networks. I. Optimization of CPW discontinuities

IEEE Transactions on Microwave Theory and Techniques, 2000

This paper describes a systematic study of coplanar waveguide discontinuities that are requisite components of high-frequency distribution networks. The specific geometries addressed are air bridges, right-angle bends, tee junctions, and Wilkinson dividers. Relative to typical monolithic-microwave integrated-circuit designs, the components studied herein are electrically large in order to minimize signal attenuation. The large size leads to pronounced parasitic effects, and ...


Adaptive simulated annealing used in the synthesis of switched capacitor filters

1988., IEEE International Symposium on Circuits and Systems, 1988

The authors present a computer program called MASFIL for the synthesis of switched-capacitor (SC) filters. MASFIL allows the user to synthesize filters with classic and nonclassic transfer functions. The program handles the nonclassic cases with an adaptive simulated annealing algorithm. The algorithm optimizes the transfer functions to satisfy the user-given frequency response and group delay specifications. MASFIL runs on an ...


Efficient approach for Monte Carlo simulation experiments and its applications to circuit systems design

Proceedings. 34th Annual Simulation Symposium, 2001

This paper presents an efficient method for managing Monte Carlo simulation experiments to select the optimal circuit design from a set of candidates. Simulation is a useful tool for evaluating and comparing circuit designs since it measures the impact of component variability. However, its use in circuit design has traditionally been limited to problems with a small number of design ...


CCD memory arrays with fast access by on-chip decoding

1974 IEEE International Solid-State Circuits Conference. Digest of Technical Papers, 1974

None


Optimization of a quad-band IFA main antenna to improve the efficiency and isolation with a ceramic GPS antenna in handset antenna designs

2007 IEEE Antennas and Propagation Society International Symposium, 2007

None


More Xplore Articles

Educational Resources on Design optimization

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IEEE.tv Videos

Advances on Many-objective Evolutionary Optimization - IEEE WCCI 2012
How to Optimize the Performance of Your RF Layout: MicroApps 2015 - Keysight Technologies
Compact 75GHz PA with 26.3% PAE & 24GHz Bandwidth - Stephen Callender - RFIC Showcase 2018
Co-Design of Algorithms & Hardware for DNNs - Vivienne Sze - LPIRC 2019
Asynchronous Design for New Device Development - Laurent Fesquet at INC 2019
How to Build a Superconducting Opto-Electronic Neuromorphic Computer - Sonia Buckley - ICRC 2018
Robot Motion Optimization
Optimal Design of NPC and Active-NPC Transformerless PV Inverters
High Frequency Magnetic Circuit Design for Power Electronics
SOC DESIGN METHODOLOGY FOR IMPROVED ROBUSTNESS
Micro-Apps 2013: Optimizing Chip, Module, Board Transitions Using Integrated EM and Circuit Design Simulation Software
Designing Efficient On-Device AI - Aakanksha Chowdhery - LPIRC 2019
A 28nm, 475mW, 0.4-to-1.7GHz Embedded Transceiver Front-End Enabling High-Speed Data Streaming Within Home Cable Networks: RFIC Industry Showcase
Micro-Apps 2013: EM Simulation Tools in Evolution within Circuit Design
Adaptive Learning and Optimization for MI: From the Foundations to Complex Systems - Haibo He - WCCI 2016
Optimization for Robust Motion Planning and Control
Challenging the stigma surrounding the role of women in technology, a journey from combinatorial optimization to IBM
CIRCUIT DESIGN USING FINFETS
Micro-Apps 2013: Frequency Planning Synthesis for Wireless Systems Design
Multi-Level Optimization for Large Fan-In Optical Logic Circuits - Takumi Egawa - ICRC 2018

IEEE-USA E-Books

  • Three-dimensional high-frequency distribution networks. I. Optimization of CPW discontinuities

    This paper describes a systematic study of coplanar waveguide discontinuities that are requisite components of high-frequency distribution networks. The specific geometries addressed are air bridges, right-angle bends, tee junctions, and Wilkinson dividers. Relative to typical monolithic-microwave integrated-circuit designs, the components studied herein are electrically large in order to minimize signal attenuation. The large size leads to pronounced parasitic effects, and the emphasis of this study was to optimize the electrical performance using simple compensation techniques. The optimization methods are developed using full-wave simulation and equivalent- circuit modeling, and are verified experimentally up to 60 GHz. Part II of this paper describes the implementation and packaging of the components to realize a three-dimensional W-band distribution network.

  • Adaptive simulated annealing used in the synthesis of switched capacitor filters

    The authors present a computer program called MASFIL for the synthesis of switched-capacitor (SC) filters. MASFIL allows the user to synthesize filters with classic and nonclassic transfer functions. The program handles the nonclassic cases with an adaptive simulated annealing algorithm. The algorithm optimizes the transfer functions to satisfy the user-given frequency response and group delay specifications. MASFIL runs on an IBM/PC/AT and gives as output a hierarchical schematic and a netlist file. The main advantages of using MASFIL have been the drastic reduction in design time (from weeks to hours) and a more effective usage of silicon area because of the capability of implementing multirate switched capacitor filters with nonclassic transfer functions.<<ETX>>

  • Efficient approach for Monte Carlo simulation experiments and its applications to circuit systems design

    This paper presents an efficient method for managing Monte Carlo simulation experiments to select the optimal circuit design from a set of candidates. Simulation is a useful tool for evaluating and comparing circuit designs since it measures the impact of component variability. However, its use in circuit design has traditionally been limited to problems with a small number of design candidates due to its large computational requirements. We outline a solution method that has been successfully used in other contexts to improve the efficiency of simulation-based optimization. The method works in an iterative fashion to intelligently allocate a limited computing budget across multiple design alternatives in order to maximize the probability of correct selection. We illustrate the method's potential benefits for circuit design problems through two simple examples. The examples confirm that the method yields significant savings in computational time, making simulation-based experiments a feasible option for larger circuit design problems.

  • CCD memory arrays with fast access by on-chip decoding

    None

  • Optimization of a quad-band IFA main antenna to improve the efficiency and isolation with a ceramic GPS antenna in handset antenna designs

    None

  • Session 8B - Timing and power optimization

    None

  • Handling don't-care conditions in high-level synthesis and application for reducing initialized registers

    Don't-care conditions provide additional flexibility in logic synthesis and optimization. However, most work only focuses on the gate level because it is difficult to handle such conditions accurately at the behavior and register transfer levels, which is problematic since the trend is to move toward high- level synthesis. In this work we propose innovative methods to handle such conditions accurately at high-level designs. In addition, we propose two novel algorithms based on our new methods to minimize the number of registers that need to be initialized at the architecture level, which can reduce the routing resources used by the reset signals and alleviate the routing problem. Our results show that we can identify 53% of the registers that can be uninitialized in a 5-stage pipelined processor within 5 minutes, demonstrating the effectiveness of our approach.

  • Towards a global optimization of electromechanical energy converters via exploitation of convex characteristics

    As the design requirements of electromechanical energy converters become increasingly complex, reliable and efficient optimization is seen as an important tool in the design process. However, general, comprehensive statements about the optimization of electromechanical energy converters, notably in regards to the verification of optimality and the best problem formulation are still missing at large. This concerns notably the issue of locally versus globally optimal solutions when using one of the many available codes for optimization of arbitrary nonlinear functions. The paper presents the mathematical reformulation of different problems of a magnetic circuit by exploitation of convex characteristics. This structure exploitation allows application of convex optimization that has proven to be not only a very efficient, but also a highly reliable optimization method. This step is considered as a key element for further optimization of a large variety of electromechanical energy converters

  • Optimization design of filter banks for wavelet denoising

    We present a new optimization based method for designing orthonormal filter banks in wavelet denoising. We formulate the design problem as a nonlinear optimization problem whose objective is to minimize the mean squared error (MSE) between the original and the denoised signal. In contrast to previous methods that design filter banks separately from the other operations in noise suppression, our formulation allows us to search for the filters in the context of a denoising algorithm to minimize the MSE. Due to the nonlinear nature of the performance metric, the optimization problem is solved by using the simulated annealing global-search method. We apply the optimization method to find good filter banks for different training signals corrupted by impulsive noise and select the one that performs best across all training signals to be the final solution. In experimental results, we show that the filter bank designed by our method reduces the MSE of the best existing filter bank on sixteen benchmark signals contaminated by either impulsive or Gaussian noise.

  • Logic Transformations by Multiple Wire Network Addition

    This paper presents an important improvement in the current capabilities of existing redundancy addition and removal (RAR) techniques for digital circuits logic optimization. In this work we present a new efficient way of finding all the possible logic addition transformations that allow the removal of a given selected wire in the circuit. All the possible points in the circuit where the addition can be performed and all the possible transformations, involving multiple wires, in each of those points are identified. We prove the necessary and sufficient conditions for the existence of such transformations. RAR algorithms use these possible sets of transformations for different optimizations, like area or timing, which have been shown to be very effective in previous works. Improving the core of these algorithms is the key to improve the RAR optimization methods themselves.



Standards related to Design optimization

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No standards are currently tagged "Design optimization"