Conferences related to Design for disassembly

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2020 57th ACM/ESDA/IEEE Design Automation Conference (DAC)

The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2022 59th ACM/ESDA/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2021 58th ACM/ESDA/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2019 56th ACM/ESDA/IEEE Design Automation Conference (DAC)

    EDA (Electronics Design Automation) is becoming ever more important with the continuous scaling of semiconductor devices and the growing complexities of their use in circuits and systems. Demands for lower-power, higher-reliability and more agile electronic systems raise new challenges to both design and design automation of such systems. For the past five decades, the primary focus of research track at DAC has been to showcase leading-edge research and practice in tools and methodologies for the design of circuits and systems.

  • 2018 55th ACM/ESDA/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2017 54th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2016 53nd ACM/EDAC/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2015 52nd ACM/EDAC/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2014 51st ACM/EDAC/IEEE Design Automation Conference (DAC)

    DAC Description for TMRF The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading

  • 2013 50th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 session on design methodologies and EDA tool developments, keynotes, panels, plus User Track presentations. A diverse worldwide community representing more than 1,000 organization attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2012 49th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The Design Automation Conference (DAC) is the premier event for the design of electronic circuits and systems, and for EDA and silicon solutions. DAC features a wide array of technical presentations plus over 200 of the leading electronics design suppliers

  • 2011 48th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The Design Automation Conference is the world s leading technical conference and tradeshow on electronic design and design automation. DAC is where the IC Design and EDA ecosystem learns, networks, and does business.

  • 2010 47th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The Design Automation Conference (DAC) is the premier event for the design of electronic circuits and systems, and for EDA and silicon solutions. DAC features a wide array of technical presentations plus over 200 of the leading electronics design suppliers.

  • 2009 46th ACM/EDAC/IEEE Design Automation Conference (DAC)

    DAC is the premier event for the electronic design community. DAC offers the industry s most prestigious technical conference in combination with the biggest exhibition, bringing together design, design automation and manufacturing market influencers.

  • 2008 45th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The Design Automation Conference (DAC) is the premier event for the design of electronic circuits and systems, and for EDA and silicon solutions. DAC features a wide array of technical presentations plus over 250 of the leading electronics design suppliers.

  • 2007 44th ACM/IEEE Design Automation Conference (DAC)

    The Design Automation Conference (DAC) is the premier Electronic Design Automation (EDA) and silicon solution event. DAC features over 50 technical sessions covering the latest in design methodologies and EDA tool developments and an Exhibition and Demo Suite area with over 250 of the leading EDA, silicon and IP Providers.

  • 2006 43rd ACM/IEEE Design Automation Conference (DAC)

  • 2005 42nd ACM/IEEE Design Automation Conference (DAC)

  • 2004 41st ACM/IEEE Design Automation Conference (DAC)

  • 2003 40th ACM/IEEE Design Automation Conference (DAC)

  • 2002 39th ACM/IEEE Design Automation Conference (DAC)

  • 2001 38th ACM/IEEE Design Automation Conference (DAC)

  • 2000 37th ACM/IEEE Design Automation Conference (DAC)

  • 1999 36th ACM/IEEE Design Automation Conference (DAC)

  • 1998 35th ACM/IEEE Design Automation Conference (DAC)

  • 1997 34th ACM/IEEE Design Automation Conference (DAC)

  • 1996 33rd ACM/IEEE Design Automation Conference (DAC)


2020 IEEE 29th International Symposium on Industrial Electronics (ISIE)

ISIE focuses on advancements in knowledge, new methods, and technologies relevant to industrial electronics, along with their applications and future developments.


2020 IEEE Frontiers in Education Conference (FIE)

The Frontiers in Education (FIE) Conference is a major international conference focusing on educational innovations and research in engineering and computing education. FIE 2019 continues a long tradition of disseminating results in engineering and computing education. It is an ideal forum for sharing ideas, learning about developments and interacting with colleagues inthese fields.


2020 IEEE International Conference on Image Processing (ICIP)

The International Conference on Image Processing (ICIP), sponsored by the IEEE SignalProcessing Society, is the premier forum for the presentation of technological advances andresearch results in the fields of theoretical, experimental, and applied image and videoprocessing. ICIP 2020, the 27th in the series that has been held annually since 1994, bringstogether leading engineers and scientists in image and video processing from around the world.


2020 IEEE International Conference on Industrial Engineering and Engineering Management (IEEM)

All topics related to engineering and technology management, including applicable analytical methods and economical/social/human issues to be considered in making engineering decisions.


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Periodicals related to Design for disassembly

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Antennas and Wireless Propagation Letters, IEEE

IEEE Antennas and Wireless Propagation Letters (AWP Letters) will be devoted to the rapid electronic publication of short manuscripts in the technical areas of Antennas and Wireless Propagation.


Applied Superconductivity, IEEE Transactions on

Contains articles on the applications and other relevant technology. Electronic applications include analog and digital circuits employing thin films and active devices such as Josephson junctions. Power applications include magnet design as well asmotors, generators, and power transmission


Automation Science and Engineering, IEEE Transactions on

The IEEE Transactions on Automation Sciences and Engineering (T-ASE) publishes fundamental papers on Automation, emphasizing scientific results that advance efficiency, quality, productivity, and reliability. T-ASE encourages interdisciplinary approaches from computer science, control systems, electrical engineering, mathematics, mechanical engineering, operations research, and other fields. We welcome results relevant to industries such as agriculture, biotechnology, healthcare, home automation, maintenance, manufacturing, pharmaceuticals, retail, ...


Circuits and Systems for Video Technology, IEEE Transactions on

Video A/D and D/A, display technology, image analysis and processing, video signal characterization and representation, video compression techniques and signal processing, multidimensional filters and transforms, analog video signal processing, neural networks for video applications, nonlinear video signal processing, video storage and retrieval, computer vision, packet video, high-speed real-time circuits, VLSI architecture and implementation for video technology, multiprocessor systems--hardware and software-- ...


Circuits and Systems II: Express Briefs, IEEE Transactions on

Part I will now contain regular papers focusing on all matters related to fundamental theory, applications, analog and digital signal processing. Part II will report on the latest significant results across all of these topic areas.


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Most published Xplore authors for Design for disassembly

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Xplore Articles related to Design for disassembly

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An Interview With Andries Van Dam

IEEE Annals of the History of Computing, 1998

None


Diagnosis in modem design to volume the tip of the iceberg

International Test Conference, 2003. Proceedings. ITC 2003., 2003

None


Are our design for testability features fault secure?

Proceedings Design, Automation and Test in Europe Conference and Exhibition, 2004

We analyze the risks associated with faults affecting some common design for testability (DFT) features employed within digital products. We will show that some DFT structures may become useless, with consequent dramatic impact on test effectiveness and product quality. We borrow the fault secure property and we will show that it guarantees that no escapes or false acceptance of faulty ...


Multi-TAP connection architectures for application specific integrated circuits

2008 Canadian Conference on Electrical and Computer Engineering, 2008

In the last decade, the rapid emergence and popularity of reusable core-based designs, poses new challenges to the test-dedicated circuitry, specifically IEEE 1149.1 test access port (TAP) standard. The modern cores tend to have a build-in TAP to facilitate both on-chip design for test (DFT) and design for debug (DFD) implementation and reuse. That has triggered development of numerous multi-TAP ...


Filters with monotonic amplitude-frequency response

1998 Midwest Symposium on Circuits and Systems (Cat. No. 98CB36268), 1998

The polynomial low-pass filters monotonic in the pass-band amplitude-frequency responses are proposed. The characteristics are intermediate between the Butterworth and Papoulis filters (with these two classes as limiting), and can be obtained starting from the filters of fifth order. The number of the intermediate characteristics increases with the filter order. Decreasing the pass-band flatness degree one can obtain additional attenuation ...


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Educational Resources on Design for disassembly

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IEEE-USA E-Books

  • An Interview With Andries Van Dam

    None

  • Diagnosis in modem design to volume the tip of the iceberg

    None

  • Are our design for testability features fault secure?

    We analyze the risks associated with faults affecting some common design for testability (DFT) features employed within digital products. We will show that some DFT structures may become useless, with consequent dramatic impact on test effectiveness and product quality. We borrow the fault secure property and we will show that it guarantees that no escapes or false acceptance of faulty products may occur because of faults within the DFT structures.

  • Multi-TAP connection architectures for application specific integrated circuits

    In the last decade, the rapid emergence and popularity of reusable core-based designs, poses new challenges to the test-dedicated circuitry, specifically IEEE 1149.1 test access port (TAP) standard. The modern cores tend to have a build-in TAP to facilitate both on-chip design for test (DFT) and design for debug (DFD) implementation and reuse. That has triggered development of numerous multi-TAP architectures. Selecting the correct architecture is considered a key point in reduction of testing and debugging efforts, decreasing test time, as well as allowing effortless architectural reuse across different platforms and integrated circuits (ICs). This paper makes an attempt to fill the gap in presenting a thorough analysis of existing multi- tap architectures yielding the resulting classification, comparison and summary of all the major multi-TAP architectures. Several modifications to the existing architectures are proposed and analyzed in detail.

  • Filters with monotonic amplitude-frequency response

    The polynomial low-pass filters monotonic in the pass-band amplitude-frequency responses are proposed. The characteristics are intermediate between the Butterworth and Papoulis filters (with these two classes as limiting), and can be obtained starting from the filters of fifth order. The number of the intermediate characteristics increases with the filter order. Decreasing the pass-band flatness degree one can obtain additional attenuation in the stop- band.

  • The Problem Frames Approach to Software Engineering

    Software-intensive systems are those in which the computer executing the software is only one of the parts of the system. Problem frames offer a conceptual structure for the development of such systems: that is, a coherent way of analysing the problem to be solved, identifying the concerns and difficulties that it poses, and working towards a solution. This tutorial present the basic ideas of problem frames, illustrating them in the context of a small software-intensive system. The basic ideas of the approach are: 1. to attend both to the hardware/software machine, which is to be developed, and to the other system parts, which constitute the problem world; 2. to distinguish the given properties of the problem world from the requirements, which are the properties that the machine must establish and maintain in the world; 3. to pay careful attention to the phenomena of the problem world; 4. to structure the development problem as a set of subproblems, and to consider each subproblem in isolation before considering the composition of the subproblems and their solutions; 5. so far as possible, to recognise each subproblem as a member of a recognised class for which a solution method is known and whose most important concerns have been identified. Problem frames are not a notation or a calculus or a formalism; nor are they a development method or a process. They can fit with, into, or around specific techniques (such as agile or RUP) and specific notations (such as UML, Petri nets, or DFDs). Problem frames do not promise a prescription for every problem; nor do they promise a complete prescription for any problem. They remind you of things you know already, but may not always pay enough attention to.

  • Modeling and coding of DFD using dense motion fields in video compression

    We presents a method for encoding the displaced frame difference (DFD) that rounds out our continuing study on video compression using dense motion fields. The main idea of the DFD coding strategy is to utilize the more dense and thus accurate motion field to predict where the sparse but significant DFD energy is located. This leads to a more efficient DFD encoder compared to applying traditional still-image coding techniques. Furthermore, the dense motion field framework allows us to refine and tailor the motion estimation process such that the resulting DFD frame is easier to encode. Simulations demonstrate superior performance against standard block-based coders, with greater advantages for sequences with more complex motion.

  • A Hybrid Video Coder Based on H.264 with Matching Pursuits

    We present a novel video coding system based on the motion compensation and estimation model of H.264 and a hybrid wavelet/matching pursuits image coder for residual frames. After wavelet pretransformation, a high performance matching pursuits codebook is used to find a series of atoms which are coded by the MERGE coder. The combination of these two techniques produces a highly embedded data stream that can be easily truncated at any desired point. Optimum settings of some key parameters are investigated and a series of experiments are performed. The system works very efficiently and can outperform H.264 at low and medium bit rates

  • Content-Based Mesh Design and Occlusion Adaptive GOP Structure

    2D mesh-based motion compensation can effectively eliminate blocking artifacts that are common in block matching. However, the main difficulty of the scheme is nodal trajectory in occlusion regions. Besides, mesh design is also important because it is related to the efficiency of motion compensation. This work firstly presents a more efficient and delicate algorithm to generate content-based Delaunay triangular mesh (DTM) which is adaptive to temporal activities in a video sequence. Moreover, a mesh-based nodal forward tracking scheme is proposed, in which local mesh structure is locally altered according to occlusion regions. Furthermore, in terms of trajectories of nodes the deformation of the mesh, the change of the content of the video can be perceived, which facilitates the adaptive assignment of GOP structure. The intra-frame of GOB can be assigned at the moment when there is an abrupt change in contents of pictures, e.g. an occluded object (objects) entering picture. The experimental results demonstrate the efficiency of the motion compensation and node tracking and adaptive GOP structure.

  • New approach to distribute application components to client-server system

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Standards related to Design for disassembly

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