Convolution

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In mathematics and, in particular, functional analysis, convolution is a mathematical operation on two functions f and g, producing a third function that is typically viewed as a modified version of one of the original functions. (Wikipedia.org)






Conferences related to Convolution

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2020 IEEE International Instrumentation and Measurement Technology Conference (I2MTC)

The Conference focuses on all aspects of instrumentation and measurement science andtechnology research development and applications. The list of program topics includes but isnot limited to: Measurement Science & Education, Measurement Systems, Measurement DataAcquisition, Measurements of Physical Quantities, and Measurement Applications.


Oceans 2020 MTS/IEEE GULF COAST

To promote awareness, understanding, advancement and application of ocean engineering and marine technology. This includes all aspects of science, engineering, and technology that address research, development, and operations pertaining to all bodies of water. This includes the creation of new capabilities and technologies from concept design through prototypes, testing, and operational systems to sense, explore, understand, develop, use, and responsibly manage natural resources.

  • OCEANS 2018 MTS/IEEE Charleston

    Ocean, coastal, and atmospheric science and technology advances and applications

  • OCEANS 2017 - Anchorage

    Papers on ocean technology, exhibits from ocean equipment and service suppliers, student posters and student poster competition, tutorials on ocean technology, workshops and town meetings on policy and governmental process.

  • OCEANS 2016

    The Marine Technology Scociety and the Oceanic Engineering Society of the IEEE cosponor a joint annual conference and exposition on ocean science, engineering, and policy. The OCEANS conference covers four days. One day for tutorials and three for approx. 500 technical papers and 150 -200 exhibits.

  • OCEANS 2015

    The Marine Technology Scociety and the Oceanic Engineering Society of the IEEE cosponor a joint annual conference and exposition on ocean science, engineering, and policy. The OCEANS conference covers four days. One day for tutorials and three for approx. 450 technical papers and 150-200 exhibits.

  • OCEANS 2014

    The OCEANS conference covers four days. One day for tutorials and three for approx. 450 technical papers and 150-200 exhibits.

  • OCEANS 2013

    Three days of 8-10 tracks of technical sessions (400-450 papers) and concurent exhibition (150-250 exhibitors)

  • OCEANS 2012

    Ocean related technology. Tutorials and three days of technical sessions and exhibits. 8-12 parallel technical tracks.

  • OCEANS 2011

    The Marine Technology Society and the Oceanic Engineering Scociety of the IEEE cosponsor a joint annual conference and exposition on ocean science engineering, and policy.

  • OCEANS 2010

    The Marine Technology Society and the Oceanic Engineering Scociety of the IEEE cosponsor a joint annual conference and exposition on ocean science engineering, and policy.

  • OCEANS 2009

  • OCEANS 2008

    The Marine Technology Society (MTS) and the Oceanic Engineering Society (OES) of the Institute of Electrical and Electronic Engineers (IEEE) cosponsor a joint conference and exposition on ocean science, engineering, education, and policy. Held annually in the fall, it has become a focal point for the ocean and marine community to meet, learn, and exhibit products and services. The conference includes technical sessions, workshops, student poster sessions, job fairs, tutorials and a large exhibit.

  • OCEANS 2007

  • OCEANS 2006

  • OCEANS 2005

  • OCEANS 2004

  • OCEANS 2003

  • OCEANS 2002

  • OCEANS 2001

  • OCEANS 2000

  • OCEANS '99

  • OCEANS '98

  • OCEANS '97

  • OCEANS '96


2019 41st Annual International Conference of the IEEE Engineering in Medicine & Biology Society (EMBC)

The conference program will consist of plenary lectures, symposia, workshops andinvitedsessions of the latest significant findings and developments in all the major fields ofbiomedical engineering.Submitted papers will be peer reviewed. Accepted high quality paperswill be presented in oral and postersessions, will appear in the Conference Proceedings and willbe indexed in PubMed/MEDLINE & IEEE Xplore


2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)

This Symposium explores emerging trends and novel ideas and concepts in the area of VLSI. The Symposium covers a range of topics: from VLSI circuits, systems and design methods to system level design and system-on-chip issues, to bringing VLSI experience to new areas and technologies. Future design methodologies as well as new CAD tools to support them will also be the key topics. ISVLSI 2019 highlights a special theme of Neuromoprhic Computing. Over almost two decades the Symposium has been a unique forum promoting multidisciplinary research and new visionary approaches in the area of VLSI.

  • 2018 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)

    This Symposium explores emerging trends and novel ideas and concepts in the area of VLSI. The Symposium covers a range of topics: from VLSI circuits, systems and design methods to system level design and system-on-chip issues, to bringing VLSI experience to new areas and technologies. Future design methodologies as well as new CAD tools to support them will also be the key topics. ISVLSI 2018 highlights a special theme of Internet of Things. Over almost two decades the Symposium has been a unique forum promoting multidisciplinary research and new visionary approaches in the area of VLSI.

  • 2017 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)

    ISVLSI explores emerging trends and novel ideas and concepts in the area of VLSI. TheSymposium covers a range of topics: from VLSI circuits, systems and design methods tosystem level design and system-on-chip issues, to bringing VLSI experience to new areas andtechnologies like nano- and molecular devices, MEMS, and quantum computing. Future designmethodologies will also be one of the key topics at the workshop, as well as new CAD tools tosupport these technologies. Forthe past two decades, the conference has been a unique forum for promoting visionaryapproaches to VLSI design process and has been an esteemed venue for presentingmultidisciplinary research. The Symposium and researchers from academia and industry.

  • 2016 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)

    This Symposium explores emerging trends and novel ideas and concepts in the area of VLSI. The Symposium covers a range of topics: from VLSI circuits, systems and design methods to system level design and system-on-chip issues, to bringing VLSI experience to new areas and technologies. Future design methodologies as well as new CAD tools to support them will also be the key topics.

  • 2015 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)

    The scope of ISVLSI 2015 includes emerging trends and novel ideas and concepts in the area of VLSI. The ISVLSI 2015 will cover a range of topics: from VLSI circuits, systems and design methods to system-level design and system-on-chip issues, to bringing VLSI experience to new areas and technologies like nanotechnology device, molecular devices, MEMS, and quantum computing. ISVLSI 2015 will consider future design methodologies and new CAD tools to support them. Over almost two decades the symposium has been a unique forum promoting multidisciplinary research and new visionary approaches in the area of VLSI. The Symposium brings together leading scientists and researchers from academia and industry.

  • 2014 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)

    ISVLSI explores emerging trends and novel ideas and concepts in the area of VLSI. The Symposium covers a range of topics: from VLSI circuits, systems and design methods to system level design and system-on-chip issues, to bringing VLSI experience to new areas and technologies like nano- and molecular devices, MEMS, and quantum computing. Future design methodologies will also be one of the key topics at the workshop, as well as new CAD tools to support these technologies. For the past two decades, the conference has been a unique forum for promoting visionary approaches to VLSI design process and has been an esteemed venue for presenting multidisciplinary research. The Symposium and researchers from academia and industry.

  • 2013 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)

    This Symposium explores emerging trends and novel ideas and concepts in the area of VLSI. The Symposium covers a range of topics: from VLSI circuits, systems and design methods to system level design and system-on-chip issues, to bringing VLSI experience to new areas and technologies like nano- and molecular devices, MEMS, and quantum computing. Future design methodologies will also be one of the key topics at the workshop, as well as new CAD tools to support them. Over almost two decades the symposium has been an unique forum promoting multidisciplinary research and new visionary approaches in the area of VLSI. The Symposium is bringing together leading scientists and researchers from academia and industry. The papers from this symposium have been published as the special issues of top archival journals. This fact indicates a very high quality of the symposium papers, and we are determined to keep a strong emphasis on this critical aspect of any conference.

  • 2012 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)

    ISVLSI explores emerging trends and novel ideas and concepts in the area of VLSI. The Symposium covers a range of topics: from VLSI circuits, systems and design methods to system level design and system-on-chip issues, to bringing VLSI experience to new areas and technologies like nano- and molecular devices, MEMS, and quantum computing.

  • 2011 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)

    This Symposium explores emerging trends and novel ideas and concepts in the area of VLSI. The Symposium covers a range of topics: from VLSI circuits, systems and design methods to system level design and system-on-chip issues, to bringing VLSI experience to new areas and technologies like nano- and molecular devices, MEMS, and quantum computing.

  • 2010 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)

    This Symposium explores emerging trends and novel ideas and concepts in the area of VLSI. The Symposium covers a range of topics: from VLSI circuits, systems and design methods to system level design and system-on-chip issues, to bringing VLSI experience to new areas and technologies like nano- and molecular devices, MEMS, and quantum computing. Future design methodologies will also be one of the key topics at the workshop, as well as new CAD tools to support them. Over almost two decades the symposium has

  • 2009 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)

    This Symposium explores emerging trends and novel ideas and concepts in the area of VLSI. The Symposium covers a range of topics: from VLSI circuits, systems and design methods to system level design and system-on-chip issues, to bringing VLSI experience to new areas and technologies like nano- and molecular devices, MEMS, and quantum computing. Future design methodologies will also be one of the key topics at the workshop, as well as new CAD tools to support them.

  • 2008 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)

    - Emerging Trends in VLSI, Nanoelectronics Molecular, Biological and Quantum - Computing, MEMS, VLSI Circuits and Systems, System Level Design, - Field-programmable & Reconfigurable Systems System-on-a-Chip Design, - Application-Specific Low Power VLSI System Design,System Issues in Complexity, - Low Power, Heat Dissipation, Power Awareness in VLSI Design Test and Verification, - Mixed-Signal Design and Analysis, Electrical/Packaging Co-Design, Physical Design, - Intellectual property creating and sha

  • 2007 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)

  • 2006 IEEE Annual Symposium on VLSI (ISVLSI)

  • 2005 IEEE Annual Symposium on VLSI (ISVLSI)

  • 2004 IEEE Annual Symposium on VLSI (ISVLSI)

  • 2003 IEEE Annual Symposium on VLSI (ISVLSI)

  • 2002 IEEE Workshop on VLSI (WVLSI)

  • 2001 IEEE Workshop on VLSI (WVLSI)

  • 2000 IEEE Workshop on VLSI (WVLSI)

  • 1999 IEEE Workshop on VLSI (WVLSI)

  • 1998 IEEE Workshop on VLSI

  • 1996 IEEE Workshop on VLSI


2019 IEEE International Conference on Image Processing (ICIP)

The International Conference on Image Processing (ICIP), sponsored by the IEEE SignalProcessing Society, is the premier forum for the presentation of technological advances andresearch results in the fields of theoretical, experimental, and applied image and videoprocessing. ICIP 2019, the 26th in the series that has been held annually since 1994, bringstogether leading engineers and scientists in image and video processing from around the world.


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Periodicals related to Convolution

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Aerospace and Electronic Systems Magazine, IEEE

The IEEE Aerospace and Electronic Systems Magazine publishes articles concerned with the various aspects of systems for space, air, ocean, or ground environments.


Antennas and Propagation, IEEE Transactions on

Experimental and theoretical advances in antennas including design and development, and in the propagation of electromagnetic waves including scattering, diffraction and interaction with continuous media; and applications pertinent to antennas and propagation, such as remote sensing, applied optics, and millimeter and submillimeter wave techniques.


Audio, Speech, and Language Processing, IEEE Transactions on

Speech analysis, synthesis, coding speech recognition, speaker recognition, language modeling, speech production and perception, speech enhancement. In audio, transducers, room acoustics, active sound control, human audition, analysis/synthesis/coding of music, and consumer audio. (8) (IEEE Guide for Authors) The scope for the proposed transactions includes SPEECH PROCESSING - Transmission and storage of Speech signals; speech coding; speech enhancement and noise reduction; ...


Automatic Control, IEEE Transactions on

The theory, design and application of Control Systems. It shall encompass components, and the integration of these components, as are necessary for the construction of such systems. The word `systems' as used herein shall be interpreted to include physical, biological, organizational and other entities and combinations thereof, which can be represented through a mathematical symbolism. The Field of Interest: shall ...


Biomedical Engineering, IEEE Transactions on

Broad coverage of concepts and methods of the physical and engineering sciences applied in biology and medicine, ranging from formalized mathematical theory through experimental science and technological development to practical clinical applications.


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Most published Xplore authors for Convolution

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Xplore Articles related to Convolution

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An Efficient Method for DPM Code Localization Based on Depthwise Separable Convolution

IEEE Access, None

With the popular application of direct part mark (DPM) technology, DPM code inspection has been a hot issue in the machine vision. It mainly consists of two steps, namely, localization and decoding. DPM code localization is a key and complex step in the DPM code inspection. However, the traditional localization methods suffer from complex imaging environment, involving various imaging background, ...


High speed convolution and deconvolution algorithm (Based on Ancient Indian Vedic Mathematics)

2014 11th International Conference on Electrical Engineering/Electronics, Computer, Telecommunications and Information Technology (ECTI-CON), 2014

In Digital Signal Processing, the convolution and deconvolution with a very long sequence is ubiquitous in many application areas. The basic blocks in convolution and de-convolution implementation are multiplier and divider. They consume much of time. This paper presents a direct method of computing the discrete linear convolution, circular convolution and deconvolution. The approach is easy to learn because of ...


Mask Convolution for Filtering on Irregular-Shaped Image

2018 17th International Symposium on Distributed Computing and Applications for Business Engineering and Science (DCABES), 2018

In this paper, we proposed the concept of mask convolution, which operates on irregular shaped foreground, and could gain improvement on the margin of the object. In particular, we prove that this operation could be done in an efficient way. The extra calculation than normal convolution only lies on mask image convolution, and one time elements-wise multiply and division. To ...


Simple Trapezoidal Recursive Convolution Technique for the Frequency-Dependent FDTD Analysis of a Drude–Lorentz Model

IEEE Photonics Technology Letters, 2009

A concise formulation of the frequency-dependent finite-difference time-domain (FDTD) method is presented using the trapezoidal recursive convolution (TRC) technique for the analysis of a Drude-Lorentz model. The TRC technique requires single convolution integral in the formulation as in the recursive convolution (RC) technique, while maintaining the accuracy comparable to the piecewise linear RC (PLRC) technique with two convolution integrals. The ...


Hardware-Efficient Systolization of DA-Based Calculation of Finite Digital Convolution

IEEE Transactions on Circuits and Systems II: Express Briefs, 2006

Novel one- and two-dimensional systolic structures are designed for computation of circular convolution using distributed arithmetic (DA). The proposed structures involve significantly less memory and less area-delay complexity compared with the existing DA-based structures for circular convolution. Besides, it is shown that the proposed systolic designs for circular convolution can be used for computation of linear convolution as well


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Educational Resources on Convolution

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IEEE-USA E-Books

  • An Efficient Method for DPM Code Localization Based on Depthwise Separable Convolution

    With the popular application of direct part mark (DPM) technology, DPM code inspection has been a hot issue in the machine vision. It mainly consists of two steps, namely, localization and decoding. DPM code localization is a key and complex step in the DPM code inspection. However, the traditional localization methods suffer from complex imaging environment, involving various imaging background, illumination, imaging distance, and exposures. Furthermore, the target itself, i.e., the DPM code, could be severely polluted or worn. Aiming at improving the performance and robustness of DPM code localization, an efficient method with depthwise separable convolution is proposed in this paper. The optimized network model has the advantages of few parameters, high computational efficiency, high precision localization, and good generalization ability. Meanwhile, the precision of DPM code region is improved with the help of multi-scale prediction. The experiments on our DPM code localization database demonstrate the effectiveness and flexibility of the proposed method in comparison with the YOLOv3 network and the Tiny_YOLO network. Furthermore, the proposed method can estimate the exposure level of the DPM code region, which is benefiting to the DPM code recognition and enables the adaptive ability.

  • High speed convolution and deconvolution algorithm (Based on Ancient Indian Vedic Mathematics)

    In Digital Signal Processing, the convolution and deconvolution with a very long sequence is ubiquitous in many application areas. The basic blocks in convolution and de-convolution implementation are multiplier and divider. They consume much of time. This paper presents a direct method of computing the discrete linear convolution, circular convolution and deconvolution. The approach is easy to learn because of the similarities to computing the multiplication of two numbers. The most significant aspect of the proposed method is the development of a multiplier and divider architecture based on Ancient Indian Vedic Mathematics sutras Urdhvatriyagbhyam and Nikhilam algorithm. The results show that the implementation of linear convolution and circular convolution using vedic mathematics is efficient in terms of area and speed compared to their implementation using conventional multiplier & divider architectures. The coding is done in VHDL. Simulation and Synthesis are performed using Xilinx ISE design suit 14.2. Simulated results for proposed 4×4 bit Vedic convolution circuit shows a reduction in delay of 88% than the conventional method and 41% than the OLA method.

  • Mask Convolution for Filtering on Irregular-Shaped Image

    In this paper, we proposed the concept of mask convolution, which operates on irregular shaped foreground, and could gain improvement on the margin of the object. In particular, we prove that this operation could be done in an efficient way. The extra calculation than normal convolution only lies on mask image convolution, and one time elements-wise multiply and division. To verify the necessity of mask convolution, we use mean filtering on retina images to eliminate spots. Compared to normal convolution, the proposed method could obtain clearer image on the margin of foreground, which is beneficial for subsequent CNN-based vessel segmentation model. We also proved that this method can be extended to other convolution kernels such as Gaussian and sharpen filters.

  • Simple Trapezoidal Recursive Convolution Technique for the Frequency-Dependent FDTD Analysis of a Drude–Lorentz Model

    A concise formulation of the frequency-dependent finite-difference time-domain (FDTD) method is presented using the trapezoidal recursive convolution (TRC) technique for the analysis of a Drude-Lorentz model. The TRC technique requires single convolution integral in the formulation as in the recursive convolution (RC) technique, while maintaining the accuracy comparable to the piecewise linear RC (PLRC) technique with two convolution integrals. The TRC technique is introduced not only to the traditional explicit FDTD, but also to the unconditionally stable implicit FDTD based on the locally one-dimensional (LOD) scheme. Through the analysis of a surface plasmon waveguide, the effectiveness of the TRC technique is investigated for both explicit FDTD and LOD-FDTD, along with the existing RC and PLRC techniques.

  • Hardware-Efficient Systolization of DA-Based Calculation of Finite Digital Convolution

    Novel one- and two-dimensional systolic structures are designed for computation of circular convolution using distributed arithmetic (DA). The proposed structures involve significantly less memory and less area-delay complexity compared with the existing DA-based structures for circular convolution. Besides, it is shown that the proposed systolic designs for circular convolution can be used for computation of linear convolution as well

  • An efficient VLSI architecture for 2-D convolution with quadrant symmetric kernels

    A high performance digital architecture for computing 2D convolution utilizing the quadrant symmetry of the kernels is proposed in this paper. Pixels in the four quadrants of the kernel region with respect to an image pixel are considered simultaneously for computing the partial products of the convolution sum. A novel data handling strategy to identify the pixels to be fed to different processing elements helps reducing the data storage requirements in the circuitry. The new design results in 75% reduction in multipliers and 50% reduction in adders when compared with the conventional systolic architecture. The proposed architecture design is capable of performing convolution operations with 14/spl times/14 kernel at a rate of 57 1024/spl times/1024 frames per second in a Xilinx 's Virtex 2v2000ff896-4 FPGA.

  • On the dual-Kernel, matric convolution integral in Discrete/Continuous control theory; exact, explicit, closed-form expressions for some simple cases

    In the generalized-version of modern, MIMO discrete-time control, known as Discrete/Continuous (D/C) Control Theory, the traditional matric convolution integral B in the traditional, exact, discrete-time state-model: x((k +1)T) = Ax(kT)+ Bu(kT) is replaced by a more general convolution-matrix BH that has two independent kernels, which evolve in counterflow directions. The numerical-evaluation of the generalized matric convolution-integral BH is essential in practical applications of D/C-type discrete-time control, but the dual-kernel, counterflow nature of the matric convolution integral BH complicates the application of traditional numerical methods for evaluating convolution integrals. In this paper, symbolic software (MAPLE) is used to develop the exact, closed-form, explicit analytical expressions for the matric convolution-integral BH(T) for a family of simple, time- invariant, low-order examples. Those explicit, closed-form analytical results provide much needed "truth-models" against which numerical-evaluations of BH , using various alternative numerical-integration schemes, can be confidently compared.

  • Power efficient modulo convolution

    In signal processing systems, the fundamental computation is nothing but convolution which is found in many application areas. The main building blocks are the multipliers to calculate convolution. But multipliers are the main power consuming elements. In recent years power is an important constraint. Now days, linear convolution has been implemented using distinct types of multipliers to decrease power dissipation. In this paper, modulo linear convolution have been proposed using modulo multipliers based on Radix-8 booth encoding algorithm for bits n=8, 16, 32 and 64. The modulo design is coded in Verilog HDL, Xilinx 14.7 has been used to perform Simulation and Synthesis. The proposed technique efficiently speeds up the computation which in turn decreases power dissipation, hardware resources and area significantly.

  • A hybrid wavelet convolution network with sparse-coding for image super-resolution

    This paper proposes a hybrid wavelet convolution network (HWCN) which is composed of a scattering convolution component and a convolution neural component. The hierarchical end-to-end network implements sparse-coding and high-dimensional reconstruction for inverse problem through cascade convolutions. With the pre-defined scattering convolutions from nonlinear operators, the network can be tailored in accordance with the frequency property to provide sparse code candidates, and the convolution neural component could automatically select and weight these candidates for sparse coding. Given a tiny dataset, HWCN could train complex deep network with better generalization by regularization from scattering convolutions, and thereby is a competitive alternative to convolutional neural networks (CNN). Moreover, we further demonstrate that HWCN is a superior selection of sparse- coding based image super-resolution and achieves state-of-the-art performance.

  • Modified Discrete Fourier Transforms for fast convolution and adaptive filtering

    Recently the previously reported Modified Fermat Number Transform (MFNT) based on Right Circular Convolution (RCC) was extended to form a Quadratic MFNT (QMFNT) by introducing Left-angle Circular Convolution (LCC) and interpreting the combined result as a quadratic representation of the resulting convolution output. This paper introduces a new Modified Discrete Fourier Transform (MDFT) that relies on a similar combination of RCC and LCC. The MDFT enables overlap- add FFT block processing to be implemented without zero padding, resulting in reduced computational complexity and potentially reduced power requirements in nanoscale VLSI implementations.



Standards related to Convolution

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No standards are currently tagged "Convolution"