Beak

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The beak, bill or rostrum is an external anatomical structure of birds which is used for eating and for grooming, manipulating objects, killing prey, probing for food, courtship and feeding young. The term beak is also used to refer to a similar mouthpart in some Ornithischian dinosaurs, monotremes, cephalopods, cetaceans, pufferfishes, turtles, Anuran tadpoles and sirens. (Wikipedia.org)






Conferences related to Beak

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2021 IEEE Pulsed Power Conference (PPC)

The Pulsed Power Conference is held on a biannual basis and serves as the principal forum forthe exchange of information on pulsed power technology and engineering.


2020 IEEE International Conference on Consumer Electronics (ICCE)

The International Conference on Consumer Electronics (ICCE) is soliciting technical papersfor oral and poster presentation at ICCE 2018. ICCE has a strong conference history coupledwith a tradition of attracting leading authors and delegates from around the world.Papers reporting new developments in all areas of consumer electronics are invited. Topics around the major theme will be the content ofspecial sessions and tutorials.


2020 IEEE International Conference on Image Processing (ICIP)

The International Conference on Image Processing (ICIP), sponsored by the IEEE SignalProcessing Society, is the premier forum for the presentation of technological advances andresearch results in the fields of theoretical, experimental, and applied image and videoprocessing. ICIP 2020, the 27th in the series that has been held annually since 1994, bringstogether leading engineers and scientists in image and video processing from around the world.


2020 IEEE International Conference on Plasma Science (ICOPS)

IEEE International Conference on Plasma Science (ICOPS) is an annual conference coordinated by the Plasma Science and Application Committee (PSAC) of the IEEE Nuclear & Plasma Sciences Society.


2020 IEEE International Electron Devices Meeting (IEDM)

the IEEE/IEDM has been the world's main forum for reporting breakthroughs in technology, design, manufacturing, physics and the modeling of semiconductors and other electronic devices. Topics range from deep submicron CMOS transistors and memories to novel displays and imagers, from compound semiconductor materials to nanotechnology devices and architectures, from micromachined devices to smart -power technologies, etc.


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Periodicals related to Beak

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Applied Superconductivity, IEEE Transactions on

Contains articles on the applications and other relevant technology. Electronic applications include analog and digital circuits employing thin films and active devices such as Josephson junctions. Power applications include magnet design as well asmotors, generators, and power transmission


Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on

Methods, algorithms, and human-machine interfaces for physical and logical design, including: planning, synthesis, partitioning, modeling, simulation, layout, verification, testing, and documentation of integrated-circuit and systems designs of all complexities. Practical applications of aids resulting in producible analog, digital, optical, or microwave integrated circuits are emphasized.


Consumer Electronics, IEEE Transactions on

The design and manufacture of consumer electronics products, components, and related activities, particularly those used for entertainment, leisure, and educational purposes


Device and Materials Reliability, IEEE Transactions on

Provides leading edge information that is critical to the creation of reliable electronic devices and materials, and a focus for interdisciplinary communication in the state of the art of reliability of electronic devices, and the materials used in their manufacture. It focuses on the reliability of electronic, optical, and magnetic devices, and microsystems; the materials and processes used in the ...


Dielectrics and Electrical Insulation, IEEE Transactions on

Electrical insulation common to the design and construction of components and equipment for use in electric and electronic circuits and distribution systems at all frequencies.


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Xplore Articles related to Beak

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Advanced One Micron BICMOS Technology for High Speed 256K SRAMS

1987 Symposium on VLSI Technology. Digest of Technical Papers, 1987

One micron BiCMOS technology for high speed 256K SRAM is developed. Advanced lithography and processing techniques support high density CMOS design with ECL performance. This technology is also extended to logic applications.


Interactive genetic algorithm for font generation system

2010 World Automation Congress, 2010

We suggest the font generation system consists of font definition phase and font creation phase. For font definition phase, the tool to export font element parameters represented by XML format has implemented. For font creation phase, the font creation application PALETTE (Personal Adapted LETTEr) has designed to emerge various fonts based on user's Kansei without hand drawing and developed as ...


Junction charge-coupled devices

1979 International Electron Devices Meeting, 1979

Junction Charge-Coupled Devices, JCCD's, offer attractive advantages over MOS- CCD's, such as a high light sensitivity, good antiblooming properties in line sensors, the absence of fatal breakdown and complete compatibility with the fabrication of good bipolar transistors. Overlapping gates are not possible, and previously published potential calculations show that in order to obtain a smooth channel potential, a phosphorus implant ...


The time-dependent dynamics of depolymerization and autorepairing processes of DNA macromolecules at separate of combine, short-time or long-time action of pulsed or stationary ionizing radiation to biological systems

Digest of Technical Papers. 12th IEEE International Pulsed Power Conference. (Cat. No.99CH36358), 1999

The time-dependent dynamics of formation, relaxation and auto-reparation of double DNA breaks by the combined irradiation action and nontraditional processes of degradation were considered. The auto-repairing of double DNA breaks is connected with the peculiarities of long-range interaction of nucleotide charges, atoms and molecules in the intracellular milieu. The properties of intracellular liquid and the characteristics of force interaction between ...


Impact of Hf concentration on performance and reliability for HfSiON-CMOSFET

IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004., 2004

65 nm gate length HfSiON-CMOSFET was fabricated with various Hf concentrations and gate spacers in view of device performance and reliability. The negative charges are generated in HfSiON/Si-substrate interface at the gate edge region for HfSiON with high Hf concentration. SiN offset spacer suppresses the charge generation and the degradation of drive current. Even so, HfSiON with low Hf concentration ...


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IEEE.tv Videos

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IEEE-USA E-Books

  • Advanced One Micron BICMOS Technology for High Speed 256K SRAMS

    One micron BiCMOS technology for high speed 256K SRAM is developed. Advanced lithography and processing techniques support high density CMOS design with ECL performance. This technology is also extended to logic applications.

  • Interactive genetic algorithm for font generation system

    We suggest the font generation system consists of font definition phase and font creation phase. For font definition phase, the tool to export font element parameters represented by XML format has implemented. For font creation phase, the font creation application PALETTE (Personal Adapted LETTEr) has designed to emerge various fonts based on user's Kansei without hand drawing and developed as Adobe AIR application. It enables to generate a new font by selecting user's favorite fonts from displayed candidates, save font as an image according to users input text, and reuse stored font to the next font creation. To design PALETTE, we focused on Interactive Genetic Algorithm (IGA) technique to take user's subjective desire on font shape into the system. IGA is well known as a method to use user's subjective evaluation interactively. PALETTE has the following modules; (i) create new font candidates base on general font, or stored font characteristics with Kansei label, (ii) generate new fonts using genetic algorithm which can modify each element of the selected candidates, and (iii) export font image and save font characteristics. In this paper, we explain the font generation system and show the experimental results.

  • Junction charge-coupled devices

    Junction Charge-Coupled Devices, JCCD's, offer attractive advantages over MOS- CCD's, such as a high light sensitivity, good antiblooming properties in line sensors, the absence of fatal breakdown and complete compatibility with the fabrication of good bipolar transistors. Overlapping gates are not possible, and previously published potential calculations show that in order to obtain a smooth channel potential, a phosphorus implant under the steering p-type gates must be made with a mask opening slightly larger than the mask opening for the boron deposition. This difference in mask opening was obtained in a self- aligned manner by using the bird's beaks of the LOCOS process. JCCD's, containing 54 three-phase cells of 54 &#181;m length each, were fabricated according to the potential calculations. The process consisted of five masking steps. Transfer inefficiencies down to 2 &#215; 10<sup>-5</sup>were measured, while the average dark current was 10 nA.cm<sup>-2</sup>. The charge handling capability was 3 &#215; 10<sup>11</sup>el.cm<sup>-2</sup>. Further improvement, especially in charge handling capability, seems possible.

  • The time-dependent dynamics of depolymerization and autorepairing processes of DNA macromolecules at separate of combine, short-time or long-time action of pulsed or stationary ionizing radiation to biological systems

    The time-dependent dynamics of formation, relaxation and auto-reparation of double DNA breaks by the combined irradiation action and nontraditional processes of degradation were considered. The auto-repairing of double DNA breaks is connected with the peculiarities of long-range interaction of nucleotide charges, atoms and molecules in the intracellular milieu. The properties of intracellular liquid and the characteristics of force interaction between the end pairs of nucleotides in the area of DNA break in response to radiation are changed. Each kind of radiation is characterized by the certain effectiveness of double DNA beaks formation but simultaneously one creates the conditions for their liquidation. On the basis of the analysis and correlation of these processes, time-dependent theory for DNA degradation was created, including hormesis phenomenon, radiation antagonism, the validity of anomaly influence of low and large doses at sharp and chronic radiation and others effects. The qualitative and quantitative correspondence of the theory and experimental results of radiation biology was obtained.

  • Impact of Hf concentration on performance and reliability for HfSiON-CMOSFET

    65 nm gate length HfSiON-CMOSFET was fabricated with various Hf concentrations and gate spacers in view of device performance and reliability. The negative charges are generated in HfSiON/Si-substrate interface at the gate edge region for HfSiON with high Hf concentration. SiN offset spacer suppresses the charge generation and the degradation of drive current. Even so, HfSiON with low Hf concentration is higher at performance and reliability than that with high one. Moreover, the optimized HfSiON shows scalability of up to hp45 nm low standby power (LSTP).

  • Layout based Monte-Carlo simulation (LBMCS) for complex back end of line (BEOL) design rule study

    While BEOL process/integration stride to explore new technologies to support scaling needs, BEOL design rules are hindering design scaling due to the increasing process complexity. A design rule calculation tool that can consider all relevant process variation and calculate certain failure rate under the combination of these variation is in great need. In this paper, we introduce a Layout Based Monte Carlo Simulation (LBMCS) tool for this purpose and demonstrate three use cases. The first case is the “bird beak” fail where sharp angle may form when via is placed near metal above inner vertex due to Self-Aligned Via process. LBMCS can help to predict the fail rate considering all variations while analytical prediction is almost impossible. The second case is via contact size failure that involves 5 process steps. While the complex calculation can be easily handled, we show that the LBMCS outputs can help to analyze and determine the most sensitive Process Assumption (PA), which can help to improve the yield and Design for Manufacturing (DfM) optimization. The third case is to help resolving competing rules in a design arc. We propose a new design check-off flow based on LBMCS that goes beyond design rules.

  • Study on Poly-Buffered LOCOS isolation for BCD application

    In Complementary Metal Oxide Semiconductor (CMOS) process, isolation is the key and it has got more influence on the device performance. The most advanced process is using Shallow trench isolation (STI) technology, but for small geometry processes using STI technology will be very difficult because of severe HCI (Hot Carrier Injection) problem and need to have new advanced equipment for using STI technology. So many factories still using Local Oxidation of Silicon (LOCOS) isolation for small geometry applications like nano-devices. LOCOS isolation has a problem because of its bird's beak will occupy big area and causes leakage path. Using Poly-Buffer in the LOCOS isolation will reduce the bird's beak around 40% and hence CMOS integration process improves product yield and performance will be drastically improved. Feature of the model using Poly-Buffered LOCOS (PBLOCOS) is very similar and very easy than using basic LOCOS process. Sometime PBLOCOS Isolation will be more useable than STI technology.

  • Control of RIE-induced Surface Damage and Junction Leakage Current in Field Isolation Process

    Surface damage induced by reactive ion etching (RIE) of SiN/SiO/sub 2/ stack used in the field isolation process was investigated in terms of its depth distribution and its correlation with junction leakage current. High leakage current is observed when oxidation induced stacking faults (OSF) are generated near bird's beaks in active regions from the Carbon-rich surface damage induced by so called stop-on-Si RIE prior to the field oxidation process. Control of both OSF and the junction leakage current at lower levels is made possible if the C-rich surface damage is eliminated either by chemical dry etching (CDE) treatment of the surface or by use of RIE conditions with lower ion energies.

  • Shaping as a method for accelerating reinforcement learning

    Learning complex control behavior by building some initial control knowledge into the learning controller through shaping is addressed. The principle underlying shaping is that learning to solve complex problems can be facilitated by first learning to solve related simpler problems. The authors present experimental results illustrating the utility of shaping in training controllers by means of reinforcement learning methods. Shaping a reinforcement learning controller's behavior over time by gradually increasing the complexity of the control task as the controller learns makes it possible to scale reinforcement learning methods to more complex tasks. This is illustrated by an example.<<ETX>>

  • A high density, high performance 1T DRAM cell

    This paper describes the structure and technology of a conventional two layer poly one transistor DRAM cell with special device enhancements to optimize its density, speed, and SER for 256K and low cost 64K DRAM products. The cell storage capacitance is enhanced by using a thin dielectric of 150Å equivalent oxide thickness and a double-field oxidation process to reduce the storage capacitor bird beak (<0.2µm). A P-well on P-substrate is used to provide a reflecting barrier to charge generated by incident alpha particles. Low metal wordline capacitance and short highly doped diffused bitline enhance the cell access time. Cell areas of 53 to 77µm2have been fabricated and tested. The technology uses parallel plate plasma etching on all layers and wafer stepper lithography on critical mask layers. This cell structure was used for the design of a 64K memory chip of 154 mils □ die area, 70 nsec access time, and <.001%/1KHr SER.



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