BiCMOS integrated circuits
4,887 resources related to BiCMOS integrated circuits
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The IEEE International Microwave Symposium (IMS) is the world s foremost conference covering the UHF, RF, wireless, microwave, millimeter-wave, terahertz, and optical frequencies; encompassing everything from basic technologies to components to systems including the latest RFIC, MIC, MEMS and filter technologies, advances in CAD, modeling, EM simulation and more. The IMS includes technical and interactive sessions, exhibits, student competitions, panels, workshops, tutorials, and networking events.
Conference with technical sessions, educational sessions, panel discussions and forums.
This is a set of five conferences with a focus on wireless components, applications and systems that affect both now and our future lifestyle. The main niche of these conferences is to bring together technologists, circuit designers, system designers and entrepreneurs at a single event. It was and is the place where these worlds meet, where new processes and systems can be benchmarked against the needs of circuit designers at the bleeding edge of RF systems. This is also an area where today's design compromises can trigger tomorrow's advanced technologies, where dreams can become a reality.
This is a conference with a focus on wireless components, applications, and systems that impact both our current and future life style. The conference's main niche is to bring together technologists, circuit designers, system designers, and entrepreneurs at a single event. It was and is the place where these worlds meet, where new processes and systems can be benchmarked against the needs of circuit designers at the bleeding edge of RF systems, where today's design compromises can trigger tomorrow's advanced technologies. Where dreams can become a reality. RWS is the cornerstone conference for Radio Wireless Week.
Computer in Technical Systems, Intelligent Systems, Distributed Computing and VisualizationSystems, Communication Systems, Information Systems Security, Digital Economy, Computersin Education, Microelectronics, Electronic Technology, Education
The IEEE Transactions on Advanced Packaging has its focus on the modeling, design, and analysis of advanced electronic, photonic, sensors, and MEMS packaging.
Experimental and theoretical advances in antennas including design and development, and in the propagation of electromagnetic waves including scattering, diffraction and interaction with continuous media; and applications pertinent to antennas and propagation, such as remote sensing, applied optics, and millimeter and submillimeter wave techniques.
Contains articles on the applications and other relevant technology. Electronic applications include analog and digital circuits employing thin films and active devices such as Josephson junctions. Power applications include magnet design as well asmotors, generators, and power transmission
Part I will now contain regular papers focusing on all matters related to fundamental theory, applications, analog and digital signal processing. Part II will report on the latest significant results across all of these topic areas.
IEEE Communications Magazine was the number three most-cited journal in telecommunications and the number eighteen cited journal in electrical and electronics engineering in 2004, according to the annual Journal Citation Report (2004 edition) published by the Institute for Scientific Information. Read more at http://www.ieee.org/products/citations.html. This magazine covers all areas of communications such as lightwave telecommunications, high-speed data communications, personal communications ...
IEEE 1992 International Conference on Consumer Electronics Digest of Technical Papers, 1992
IEE Colloquium on Linear Analogue Circuits and Systems, 1992
IEE Colloquium on Advanced MOS and Bi-Polar Devices, 1995
2000 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.00CH37056), 2000
As IS-95 gains worldwide acceptance, higher levels of integration is desirable to reduce cost, board space, and power. Previous baseband signal processors for digital cellular communications integrate only the digital functions, while the baseband data conversion functions reside in a dedicated analog CMOS IC or are merged with the IF functions in a BiCMOS IC. However, analog processes typically have ...
1991., IEEE International Sympoisum on Circuits and Systems, 1991
STAIC is an interactive design tool that synthesizes CMOS and BiCMOS analog integrated circuits which conform to specified performance constraints. STAIC features an input modeling language for entering hierarchical circuit descriptions and a symbolic/numeric solver unit for dynamic integration of analytical model equations across hierarchical boundaries. All model descriptions include physical layout so that important net parasitics may be fully ...
Multi-Level Optical Weights in Integrated Circuits - IEEE Rebooting Computing 2017
A Fully Integrated 75-83GHz FMCW Synthesizer for Automotive Radar Applications with -97dBc/Hz Phase Noise at 1MHz Offset and 100GHz/mSec Maximal Chirp Rate: RFIC Industry Showcase 2017
A 40GHz PLL with -92.5dBc/Hz In-Band Phase Noise and 104fs-RMS-Jitter: RFIC Interactive Forum 2017
Education for Analog ICs
IEEE Photonics Conference 2017 Recap
Multi-Level Optimization for Large Fan-In Optical Logic Circuits - Takumi Egawa - ICRC 2018
ASC-2014 SQUIDs 50th Anniversary: 1 of 6 Arnold Silver
IMS 2014:Active 600GHz Frequency Multiplier-by-Six S-MMICs for Submillimeter-Wave Generation
Interview with Takao Nishitani - IEEE Donald O. Pederson Award in Solid-State Circuits Co-Recipient 2017
The Evolution and Future of RF Silicon Technologies for THz Applications
Shahriar Shahramian - RFIC Industry Showcase - IMS 2020
R. Jacob Baker - SSCS Chip Chat Podcast, Episode 4
"Towards Monolithic Quantum Computing Processors In Production FDSOI CMOS Technology"
A 28GHz SiGe BiCMOS Phase Invariant VGA: RFIC Industry Showcase
2011 IEEE Medal of Honor: Morris Chang
Pt. 2: Electronic & Photonic (Co)Packaging Technologies - Bill Bottoms - Industry Panel 2, IEEE Globecom, 2019
BSIM Spice Model Enables FinFET and UTB IC Design
An 8-10GHz Upconversion Mixer, with a Low-Frequency Calibration Loop Resulting in Better Than -73dBc In-Band Spurs: RFIC Interactive Forum
Robust Qubit Manipulation with Integrated Circuits: Optical Computing - Pérola Milman at INC 2019
As IS-95 gains worldwide acceptance, higher levels of integration is desirable to reduce cost, board space, and power. Previous baseband signal processors for digital cellular communications integrate only the digital functions, while the baseband data conversion functions reside in a dedicated analog CMOS IC or are merged with the IF functions in a BiCMOS IC. However, analog processes typically have feature sizes that are generations behind digital CMOS. Since even data conversion functions need a variety of digital circuits such as digital filters for voiceband processing, /spl Delta//spl Sigma/ decimation, and various random logic for decoding and register file control, the use of older analog processes leads to larger area and power in addition to the extra package cost. Moreover, chip-to-chip communication consumes power and creates unnecessary board noise. Thus, it is desirable to integrate the analog functions with the digital signal-processing elements to take advantage of the rapid advances in digital CMOS and the integrated form factor. Due to the difficulty of mixed-signal integration, there is no previous report of successful integrated mixed-signal baseband processors that have gained type- approval and gone into high-volume production. The authors report on the design of a 3 V mixed-signal baseband processor IC implemented in CMOS technology for IS-95 applications.
STAIC is an interactive design tool that synthesizes CMOS and BiCMOS analog integrated circuits which conform to specified performance constraints. STAIC features an input modeling language for entering hierarchical circuit descriptions and a symbolic/numeric solver unit for dynamic integration of analytical model equations across hierarchical boundaries. All model descriptions include physical layout so that important net parasitics may be fully accounted for during design evaluation. Synthesis proceeds via successive solution refinement. Multilevel models of increasing sophistication are used by scan and optimization modules to home-in on a global optimal solution. Design experiments have shown that STAIC can produce satisfactory results.<<ETX>>
In this paper, a novel three-dimensional (3-D) BiCMOS technology is proposed and demonstrated. In this technology, the NMOS transistor is fabricated on the bulk substrate (bottom layer) and the PMOS transistor is fabricated on the single-crystal top layer obtained using the selective epitaxy growth (SEG) and lateral solid phase epitaxy (LSPE). In addition, the BJT is fabricated in the SEG region. The mobility of the PMOS transistors fabricated on the top layer is only approximately 5% lower than that of the PMOS fabricated on SOI, and the BJTs also have high performance with a peak f/sub T/ of 17 GHz and f/sub max/ of 14 GHz at V/sub ce/=3 V. This 3-D BiCMOS technology is very promising for low power, high speed, and high frequency integrated circuit applications.
A new low cost ghost cancellation system is being developed for the consumer market that uses the high energy US reference signal to provide excellent cancellation of ghosts. The complete system consists of 3 ICs. This paper describes how these ICs work together to cancel ghosts without the need for micro-controllers, DSPs, or external control systems.<<ETX>>
A 2.0 mu m BiCMOS process incorporating 30 V bipolar, 5-50 V CMOS, precision analog elements, and 45 V power DMOS transistors with 2.0 m Omega cm/sup 2/ R/sub DSON/ area is presented. The process is compatible with a mature mixed- signal application-specific integrated circuit (ASIC) cell library and offers fully isolated CMOS devices, providing an effective solution for intelligent analog/digital/power applications with inductive loads. This technology has been applied to the design of a 2.5 A H-bridge with supporting logic and analog control circuitry.<<ETX>>
For the DECT telephone system, a zero-IF front-end Integrated Circuit (UAA2078) has been designed in Philips' high speed QUBIC BiCMOS process. This IC contains all RF circuits required to directly down-convert the RF signal to the IF frequency around zero. At these high frequencies (1.8 GHz), it is advantageous to use flip-chip as mounting technique. Wide-band measurements of the input impedance showed that the residual parasitics associated with the eutectic solder bumps are negligible compared with the parameters of the internal IC components. To accomodate the residual stresses from differences in CTE, the gap between the IC and the substrate is underfilled. This underfill material does not affect chip behaviour too much at frequencies up to a few GHz. To study its mechanical behaviour, cumulative failure distributions have been investigated. The effect of the underfilling is studied by temperature shock-testing. From testing different types of underfill, it appears that the adhesion properties and flow characteristics of the underfill material are the dominating factors for the number of cycles to failure.