Conferences related to Buffer layers

Back to Top

GLOBECOM 2020 - 2020 IEEE Global Communications Conference

IEEE Global Communications Conference (GLOBECOM) is one of the IEEE Communications Society’s two flagship conferences dedicated to driving innovation in nearly every aspect of communications. Each year, more than 2,900 scientific researchers and their management submit proposals for program sessions to be held at the annual conference. After extensive peer review, the best of the proposals are selected for the conference program, which includes technical papers, tutorials, workshops and industry sessions designed specifically to advance technologies, systems and infrastructure that are continuing to reshape the world and provide all users with access to an unprecedented spectrum of high-speed, seamless and cost-effective global telecommunications services.


2020 Joint Conference of the IEEE International Frequency Control Symposium and International Symposium on Applications of Ferroelectrics (IFCS-ISAF)

Ferroelectric materials and applications


2020 IEEE Power & Energy Society General Meeting (PESGM)

The Annual IEEE PES General Meeting will bring together over 2900 attendees for technical sessions, administrative sessions, super sessions, poster sessions, student programs, awards ceremonies, committee meetings, tutorials and more


2020 IEEE 70th Electronic Components and Technology Conference (ECTC)

ECTC is the premier international conference sponsored by the IEEE Components, Packaging and Manufacturing Society. ECTC paper comprise a wide spectrum of topics, including 3D packaging, electronic components, materials, assembly, interconnections, device and system packaging, optoelectronics, reliability, and simulation.


2020 IEEE International Electron Devices Meeting (IEDM)

the IEEE/IEDM has been the world's main forum for reporting breakthroughs in technology, design, manufacturing, physics and the modeling of semiconductors and other electronic devices. Topics range from deep submicron CMOS transistors and memories to novel displays and imagers, from compound semiconductor materials to nanotechnology devices and architectures, from micromachined devices to smart -power technologies, etc.



Periodicals related to Buffer layers

Back to Top

Applied Superconductivity, IEEE Transactions on

Contains articles on the applications and other relevant technology. Electronic applications include analog and digital circuits employing thin films and active devices such as Josephson junctions. Power applications include magnet design as well asmotors, generators, and power transmission


Components and Packaging Technologies, IEEE Transactions on

Component parts, hybrid microelectronics, materials, packaging techniques, and manufacturing technology.


Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on

Methods, algorithms, and human-machine interfaces for physical and logical design, including: planning, synthesis, partitioning, modeling, simulation, layout, verification, testing, and documentation of integrated-circuit and systems designs of all complexities. Practical applications of aids resulting in producible analog, digital, optical, or microwave integrated circuits are emphasized.


Consumer Electronics, IEEE Transactions on

The design and manufacture of consumer electronics products, components, and related activities, particularly those used for entertainment, leisure, and educational purposes


Device and Materials Reliability, IEEE Transactions on

Provides leading edge information that is critical to the creation of reliable electronic devices and materials, and a focus for interdisciplinary communication in the state of the art of reliability of electronic devices, and the materials used in their manufacture. It focuses on the reliability of electronic, optical, and magnetic devices, and microsystems; the materials and processes used in the ...



Most published Xplore authors for Buffer layers

Back to Top

Xplore Articles related to Buffer layers

Back to Top

Trench Isolation Technology for 0.35/spl mu/m Device by Bias ECR CVD

1991 Symposium on VLSI Technology, 1991

None


Integration of Poly Buffered Locos and Gate Processing for Submicron Isolation Technique

[1991] 49th Annual Device Research Conference Digest, 1991

None


Errata

IEEE Electron Device Letters, 1985

None


An investigation of turn-off performance of planar and trench gate IGBTs under soft and hard switching

Conference Record of the 2000 IEEE Industry Applications Conference. Thirty-Fifth IAS Annual Meeting and World Conference on Industrial Applications of Electrical Energy (Cat. No.00CH37129), 2000

This paper presents the results of an investigation into the turn-off performance of planar and trench gate IGBTs under conditions of soft and hard switching topologies. Voltage and current waveforms, power losses, electric field distributions, and carrier behaviors inside the chips are studied through simulation and experiment. It is noted that the trench gate IGBT has advantage over the planar ...


Ultralow leakage In/sub 0.53/Ga/sub 0.47/As p-i-n photodetector grown on linearly graded metamorphic In/sub x/Ga/sub 1-x/P buffered GaAs substrate

IEEE Journal of Quantum Electronics, 2005

A novel top-illuminated In/sub 0.53/Ga/sub 0.47/As p-i-n photodiodes (MM- PINPD) grown on GaAs substrate by using linearly graded metamorphic In/sub x/Ga/sub 1-x/P (x graded from 0.49 to 1) buffer layer is reported. The dark current, optical responsivities, noise equivalent power, and operational bandwidth of the MM-PINPD with aperture diameter of 60 /spl mu/m are 13 pA, 0.6 A/W, 3.4/spl times/10/sup ...



Educational Resources on Buffer layers

Back to Top

IEEE-USA E-Books

  • Trench Isolation Technology for 0.35/spl mu/m Device by Bias ECR CVD

    None

  • Integration of Poly Buffered Locos and Gate Processing for Submicron Isolation Technique

    None

  • Errata

    None

  • An investigation of turn-off performance of planar and trench gate IGBTs under soft and hard switching

    This paper presents the results of an investigation into the turn-off performance of planar and trench gate IGBTs under conditions of soft and hard switching topologies. Voltage and current waveforms, power losses, electric field distributions, and carrier behaviors inside the chips are studied through simulation and experiment. It is noted that the trench gate IGBT has advantage over the planar gate IGBT for hard switching application. On the other hand, the turn-off loss of the planar gate IGBT under soft switching application is slightly lower than that of the trench gate IGBT.

  • Ultralow leakage In/sub 0.53/Ga/sub 0.47/As p-i-n photodetector grown on linearly graded metamorphic In/sub x/Ga/sub 1-x/P buffered GaAs substrate

    A novel top-illuminated In/sub 0.53/Ga/sub 0.47/As p-i-n photodiodes (MM- PINPD) grown on GaAs substrate by using linearly graded metamorphic In/sub x/Ga/sub 1-x/P (x graded from 0.49 to 1) buffer layer is reported. The dark current, optical responsivities, noise equivalent power, and operational bandwidth of the MM-PINPD with aperture diameter of 60 /spl mu/m are 13 pA, 0.6 A/W, 3.4/spl times/10/sup -15/ W/Hz/sup 1/2/, and 7.5 GHz, respectively, at 1550 nm. The performances of the MM-PINPD on GaAs are demonstrated to be comparable to those of a similar device made on InGaAs-InP substrate.

  • High GMR Effect and Perfect Microstructure in CoFe/Cu Multilayers

    CoFe-/Cu-based multilayers with two different types of a buffer layer, NiFeCr, and Ta/NiFeCr have been produced by magnetron sputtering. The crystal structure of the superlattice layers has been studied. A correlation between the features of the microstructure and the magnitude of the magnetoresistance has been found. Superlattices with giant magnetoresistive effect reaching up to 83% have been fabricated.

  • Large area pulsed laser deposition of YBCO thin films

    A special PLD-setup for large area deposition of homogeneous YBa/sub 2/Cu/sub 3/O/sub 7-x/ (YBCO) thin films and buffer layers as large as 7 cm/spl times/20 cm is presented. A new concept for homogeneous large area substrate heating and the influence of the deposition rate on the film properties is discussed. YBCO is deposited on r-plane sapphire substrates (10 cm/spl times/10 cm) as well as on smaller (2 inch O, 1 cm/spl times/1 cm) SrTiO/sub 3/, MgO, LaAlO/sub 3/, and on yttria stabilized ZrO/sub 2/ substrates distributed over the deposition area. The homogeneity of the deposited YBCO films concerning structural and electrical properties is investigated by XRD, RBS/channeling, and spatially resolved inductive measurements of T/sub c/ and J/sub c/. The variation of J/sub c/ on a 2 inch MgO wafer is less than /spl plusmn/9%, the mean c-axis length is 11.681 /spl Aring/, the FWHMs of the [005] rocking curves are 0.40 and the channeling minimum yield /spl chi//sub min/ varies between 3.7% and 4.9% over the 2 inch wafer. The J/sub c/ values of YBCO on 7 cm x 20 cm in situ buffered sapphire substrates are (2.0/spl plusmn/0.4 MA/cm/sup 2/) at T=77 K and B=0 T.

  • Epitaxial Growth of InGaSb Layers on GaAs Substrates for Fabrication of InGaSb-based THz-QCLs

    We propose InGaSb-well-based THz-QCLs for higher temperature operation. For the preparation of the MBE growth of the InGaSb-well-based QCLs, we optimize growth conditions of InGaSb layers on a GaAs substrate with introducing an InxGar1-xSb graded buffer layer.

  • Functional oxide as an extreme high-k dielectric towards 4H-SiC MOSFET incorporation

    MOS Capacitors are demonstrated on 4H-SiC using an octahedral ABO3ferroic thin-film as a dielectric prepared on several buffer layers. Five samples were prepared: ABO3on SiC, ABO3on SiC with a SiO2buffer (10 nm and 40 nm) and ABO3on SiC with an Al2O3buffer (10nm and 40 nm). Depending on the buffer material the oxide forms in either the pyrochlore or perovskite phase. A better lattice match with the Al2O3buffer yields a perovskite phase with internal switchable dipoles. Hysteresis polarization-voltage loops show an oxide capacitance of ~ 0.2 μF/cm2in the accumulation region indicating a dielectric constant of ~120.

  • Growth and properties III–V films and multilayered structures on fianite substrates and buffer layers

    The opportunity of the use Si and GaAs with single and double buffer layers and YSZ substrates for III-V(GaAs, InAs, GaSb, InGaAs, AlGaAs, GaN, AlN) epitaxy by a MOCVD method is investigated. The technology of single YSZ and double (YSZ on porous material) buffer layers preparation on Si and GaAs substrates is developed. By using porous substrate, we improved structure and morphology of YSZ buffer layers. It is shown, that III-V films received on YSZ substrates and buffer layers have single crystalline structure, good morphology and high electrophysical and photoluminescent properties. The use of the two-layer buffer in comparison with the single YSZ buffer improves adhesion of III-V films and raises its structural and electric homogeneity.



Standards related to Buffer layers

Back to Top

No standards are currently tagged "Buffer layers"