Conferences related to CMOS process

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2020 22nd European Conference on Power Electronics and Applications (EPE'20 ECCE Europe)

Energy conversion and conditioning technologies, power electronics, adjustable speed drives and their applications, power electronics for smarter grid, energy efficiency,technologies for sustainable energy systems, converters and power supplies


2020 IEEE 70th Electronic Components and Technology Conference (ECTC)

ECTC is the premier international conference sponsored by the IEEE Components, Packaging and Manufacturing Society. ECTC paper comprise a wide spectrum of topics, including 3D packaging, electronic components, materials, assembly, interconnections, device and system packaging, optoelectronics, reliability, and simulation.


2020 IEEE International Instrumentation and Measurement Technology Conference (I2MTC)

The Conference focuses on all aspects of instrumentation and measurement science andtechnology research development and applications. The list of program topics includes but isnot limited to: Measurement Science & Education, Measurement Systems, Measurement DataAcquisition, Measurements of Physical Quantities, and Measurement Applications.


2020 IEEE International Symposium on Circuits and Systems (ISCAS)

The International Symposium on Circuits and Systems (ISCAS) is the flagship conference of the IEEE Circuits and Systems (CAS) Society and the world’s premier networking and exchange forum for researchers in the highly active fields of theory, design and implementation of circuits and systems. ISCAS2020 focuses on the deployment of CASS knowledge towards Society Grand Challenges and highlights the strong foundation in methodology and the integration of multidisciplinary approaches which are the distinctive features of CAS contributions. The worldwide CAS community is exploiting such CASS knowledge to change the way in which devices and circuits are understood, optimized, and leveraged in a variety of systems and applications.


2020 IEEE International Symposium on Electromagnetic Compatibility & Signal/Power Integrity (EMCSI)

This symposium pertains to the field of electromagnetic compatibility.


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Periodicals related to CMOS process

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Applied Superconductivity, IEEE Transactions on

Contains articles on the applications and other relevant technology. Electronic applications include analog and digital circuits employing thin films and active devices such as Josephson junctions. Power applications include magnet design as well asmotors, generators, and power transmission


Biomedical Circuits and Systems, IEEE Transactions on

The Transactions on Biomedical Circuits and Systems addresses areas at the crossroads of Circuits and Systems and Life Sciences. The main emphasis is on microelectronic issues in a wide range of applications found in life sciences, physical sciences and engineering. The primary goal of the journal is to bridge the unique scientific and technical activities of the Circuits and Systems ...


Circuits and Systems II: Express Briefs, IEEE Transactions on

Part I will now contain regular papers focusing on all matters related to fundamental theory, applications, analog and digital signal processing. Part II will report on the latest significant results across all of these topic areas.


Communications Magazine, IEEE

IEEE Communications Magazine was the number three most-cited journal in telecommunications and the number eighteen cited journal in electrical and electronics engineering in 2004, according to the annual Journal Citation Report (2004 edition) published by the Institute for Scientific Information. Read more at http://www.ieee.org/products/citations.html. This magazine covers all areas of communications such as lightwave telecommunications, high-speed data communications, personal communications ...


Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on

Methods, algorithms, and human-machine interfaces for physical and logical design, including: planning, synthesis, partitioning, modeling, simulation, layout, verification, testing, and documentation of integrated-circuit and systems designs of all complexities. Practical applications of aids resulting in producible analog, digital, optical, or microwave integrated circuits are emphasized.


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Most published Xplore authors for CMOS process

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Xplore Articles related to CMOS process

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Competing technologies for high-speed digital systems

1987 IEEE International Solid-State Circuits Conference. Digest of Technical Papers, 1987

Several new technologies, including sub-micron CMOS, SOI/ SMOS, BiCMOS GaAs and advanced bipolar ECL, are being developed for the super-fast ULSI digital system of the '90s. . . The panel will discuss whether the continued scaling of bulk CMOS will be adequate or whether a change over to technologies such as SOI or GaAs will be required . . . ...


A CMOS facsimile video signal processor

1985 IEEE International Solid-State Circuits Conference. Digest of Technical Papers, 1985

This paper will describe a facsimile video signal processor that incorporates a 4b flash A/D with an offset canceler to provide 5MHz performance. A 2.5μ CMOS chip contains 25,000 transistors and 840 bits of RAM and can control a CCD image scanner.


A 1Mb CMOS DRAM

1985 IEEE International Solid-State Circuits Conference. Digest of Technical Papers, 1985

None


VHSIC technology approaches

1982 IEEE International Solid-State Circuits Conference. Digest of Technical Papers, 1982

Tri-service contracts, totaling over $165M for the current three-year effort, have been granted to six companies to develop Very High Speed ICs required for signal processors to be used in advanced military systems. Each contractor has specified a different technology to achieve the near-term objectives of1 \frac{1}/{4}μm minimum feature size and5 × 10^{11}gate-Hz/cm2functional throughput rate, and longer-term objectives of 0.5 ...


Next generation IC technology for analog/digital VLSI

1987 IEEE International Solid-State Circuits Conference. Digest of Technical Papers, 1987

The panel will discuss IC technology from the circuit designer's perspective. Today's analog VLSI devices are limited to about 20K transistors, a small fraction of the complexity available in scaled MOS processes. Analog VLSI complexity is limited by such factors as design risk, testability, design talent, supply voltage and scaled device performance. The most successful next-generation processes will balance all ...


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Educational Resources on CMOS process

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IEEE.tv Videos

A 73GHz PA for 5G Phased Arrays in 14nm FinFET CMOS: RFIC Industry Showcase 2017
A 32GHz 20dBm-PSAT Transformer-Based Doherty Power Amplifier for MultiGb/s 5G Applications in 28nm Bulk CMOS: RFIC Interactive Forum 2017
A Low Power High Performance PLL with Temperature Compensated VCO in 65nm CMOS: RFIC Interactive Forum
A Precision 140MHz Relaxation Oscillator in 40nm CMOS with 28ppm/C Frequency Stability for Automotive SoC Applications: RFIC Interactive Forum 2017
Erasing Logic-Memory Boundaries in Superconductor Electronics - Vasili Semenov: 2016 International Conference on Rebooting Computing
Millimeter-Wave Bandpass Filter Using High-Q Conical Inductors and MOM Capacitors: RFIC Interactive Forum
A Transformer-Based Inverted Complementary Cross-Coupled VCO with a 193.3dBc/Hz FoM and 13kHz 1/f3 Noise Corner: RFIC Interactive Forum
ON-CHIP VOLTAGE AND TIMING DIAGNOSTIC CIRCUITS
Single Die Broadband CMOS Power Amplifier and Tracker with 37% Overall Efficiency for TDD/FDD LTE Applications: RFIC Industry Forum
CIRCUIT DESIGN USING FINFETS
Superconductive Energy-Efficient Computing - ASC-2014 Plenary-series - 6 of 13 - Wednesday 2014/8/13
A CMOS Qubit: Quantum & Probabilistic Computing - Mark Sanquer at INC 2019
IMS 2011 Microapps - pHEMT Amplifier MMICs with Enhanced Robustness Against Process Variations
A 20dBm Configurable Linear CMOS RF Power Amplifier for Multi-Standard Transmitters: RFIC Industry Showcase
Analysis and Implementation of Quick-Start Pulse Generator by CMOS Flipped on Quartz Substrate: RFIC Interactive Forum
Multi-Standard 5Gbps to 28.2Gbps Adaptive, Single Voltage SerDes Transceiver with Analog FIR and 2-Tap Unrolled DFE in 28nm CMOS: RFIC Interactive Forum 2017
A Direct-Conversion Receiver for Multi-Carrier 3G/4G Small-Cell Base Stations in 65nm CMOS: RFIC Industry Showcase
X-band NMOS & CMOS Cross-Coupled DCO’s with “Folded” Common Mode Resonators - Run Levinger - RFIC 2019 Showcase
Theodore Sizer - IEEE Value of Membership Testimonial
Process Data and Computing with Words: A Neglected Opportunity?

IEEE-USA E-Books

  • Competing technologies for high-speed digital systems

    Several new technologies, including sub-micron CMOS, SOI/ SMOS, BiCMOS GaAs and advanced bipolar ECL, are being developed for the super-fast ULSI digital system of the '90s. . . The panel will discuss whether the continued scaling of bulk CMOS will be adequate or whether a change over to technologies such as SOI or GaAs will be required . . . Meaningful measures for comparing these technologies will also be assessed.

  • A CMOS facsimile video signal processor

    This paper will describe a facsimile video signal processor that incorporates a 4b flash A/D with an offset canceler to provide 5MHz performance. A 2.5μ CMOS chip contains 25,000 transistors and 840 bits of RAM and can control a CCD image scanner.

  • A 1Mb CMOS DRAM

    None

  • VHSIC technology approaches

    Tri-service contracts, totaling over $165M for the current three-year effort, have been granted to six companies to develop Very High Speed ICs required for signal processors to be used in advanced military systems. Each contractor has specified a different technology to achieve the near-term objectives of1 \frac{1}/{4}μm minimum feature size and5 × 10^{11}gate-Hz/cm2functional throughput rate, and longer-term objectives of 0.5 and 1013, respectively ... Panelists will discuss the various technologies selected to meet the program objectives.

  • Next generation IC technology for analog/digital VLSI

    The panel will discuss IC technology from the circuit designer's perspective. Today's analog VLSI devices are limited to about 20K transistors, a small fraction of the complexity available in scaled MOS processes. Analog VLSI complexity is limited by such factors as design risk, testability, design talent, supply voltage and scaled device performance. The most successful next-generation processes will balance all of these factors. The reward will be unprecedented monolithic performance for telecommunications, instrumentation and video applications.

  • A 1Mb CMOS DRAM with fast page and static column modes

    None

  • Challenges in detecting and analyzing process-induced damage for 130nm CMOS technology and beyond [Title only-no paper published pgs 31-36]

    None

  • A 10,000-gate CMOS LSI processor

    A high-end silicon-gate CMOS microprocessor comprised of 10,000 gates, dissipating 130mW with a 400ns microinstruction cycle, will be reported. The average propagation delay time is 4-10ns/gate.

  • A quad CMOS single-supply opamp with rail-to rail output swing

    A report on a quad opamp built in a conventional 4μm, double-poly CMOS process, will be presented. It operates on a 5V supply and achieves rail-to- rail output. Performance is comparable to that of bipolar opamps.

  • A million-cycle CMOS 256K EEPROM

    This paper will discuss a device with an endurance of 1-million cycles and a read access time of 150ns, fabricated in 1.25μm double poly CMOS. Circuit modes include byte write and page write, with means of endurance selection.



Standards related to CMOS process

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No standards are currently tagged "CMOS process"


Jobs related to CMOS process

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