Conferences related to Computer Bus

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2020 57th ACM/ESDA/IEEE Design Automation Conference (DAC)

The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2022 59th ACM/ESDA/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2021 58th ACM/ESDA/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2019 56th ACM/ESDA/IEEE Design Automation Conference (DAC)

    EDA (Electronics Design Automation) is becoming ever more important with the continuous scaling of semiconductor devices and the growing complexities of their use in circuits and systems. Demands for lower-power, higher-reliability and more agile electronic systems raise new challenges to both design and design automation of such systems. For the past five decades, the primary focus of research track at DAC has been to showcase leading-edge research and practice in tools and methodologies for the design of circuits and systems.

  • 2018 55th ACM/ESDA/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2017 54th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2016 53nd ACM/EDAC/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2015 52nd ACM/EDAC/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2014 51st ACM/EDAC/IEEE Design Automation Conference (DAC)

    DAC Description for TMRF The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading

  • 2013 50th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 session on design methodologies and EDA tool developments, keynotes, panels, plus User Track presentations. A diverse worldwide community representing more than 1,000 organization attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2012 49th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The Design Automation Conference (DAC) is the premier event for the design of electronic circuits and systems, and for EDA and silicon solutions. DAC features a wide array of technical presentations plus over 200 of the leading electronics design suppliers

  • 2011 48th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The Design Automation Conference is the world s leading technical conference and tradeshow on electronic design and design automation. DAC is where the IC Design and EDA ecosystem learns, networks, and does business.

  • 2010 47th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The Design Automation Conference (DAC) is the premier event for the design of electronic circuits and systems, and for EDA and silicon solutions. DAC features a wide array of technical presentations plus over 200 of the leading electronics design suppliers.

  • 2009 46th ACM/EDAC/IEEE Design Automation Conference (DAC)

    DAC is the premier event for the electronic design community. DAC offers the industry s most prestigious technical conference in combination with the biggest exhibition, bringing together design, design automation and manufacturing market influencers.

  • 2008 45th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The Design Automation Conference (DAC) is the premier event for the design of electronic circuits and systems, and for EDA and silicon solutions. DAC features a wide array of technical presentations plus over 250 of the leading electronics design suppliers.

  • 2007 44th ACM/IEEE Design Automation Conference (DAC)

    The Design Automation Conference (DAC) is the premier Electronic Design Automation (EDA) and silicon solution event. DAC features over 50 technical sessions covering the latest in design methodologies and EDA tool developments and an Exhibition and Demo Suite area with over 250 of the leading EDA, silicon and IP Providers.

  • 2006 43rd ACM/IEEE Design Automation Conference (DAC)

  • 2005 42nd ACM/IEEE Design Automation Conference (DAC)

  • 2004 41st ACM/IEEE Design Automation Conference (DAC)

  • 2003 40th ACM/IEEE Design Automation Conference (DAC)

  • 2002 39th ACM/IEEE Design Automation Conference (DAC)

  • 2001 38th ACM/IEEE Design Automation Conference (DAC)

  • 2000 37th ACM/IEEE Design Automation Conference (DAC)

  • 1999 36th ACM/IEEE Design Automation Conference (DAC)

  • 1998 35th ACM/IEEE Design Automation Conference (DAC)

  • 1997 34th ACM/IEEE Design Automation Conference (DAC)

  • 1996 33rd ACM/IEEE Design Automation Conference (DAC)


2020 59th IEEE Conference on Decision and Control (CDC)

The CDC is the premier conference dedicated to the advancement of the theory and practice of systems and control. The CDC annually brings together an international community of researchers and practitioners in the field of automatic control to discuss new research results, perspectives on future developments, and innovative applications relevant to decision making, automatic control, and related areas.


2020 IEEE Applied Power Electronics Conference and Exposition (APEC)

APEC focuses on the practical and applied aspects of the power electronics business. Not just a power designer’s conference, APEC has something of interest for anyone involved in power electronics including:- Equipment OEMs that use power supplies and converters in their equipment- Designers of power supplies, dc-dc converters, motor drives, uninterruptable power supplies, inverters and any other power electronic circuits, equipments and systems- Manufacturers and suppliers of components and assemblies used in power electronics- Manufacturing, quality and test engineers involved with power electronics equipment- Marketing, sales and anyone involved in the business of power electronic- Compliance engineers testing and qualifying power electronics equipment or equipment that uses power electronics


2020 IEEE International Conference on Robotics and Automation (ICRA)

The International Conference on Robotics and Automation (ICRA) is the IEEE Robotics and Automation Society’s biggest conference and one of the leading international forums for robotics researchers to present their work.


2020 IEEE Nuclear Science Symposium and Medical Imaging Conference (NSS/MIC)

All areas of ionizing radiation detection - detectors, signal processing, analysis of results, PET development, PET results, medical imaging using ionizing radiation


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Periodicals related to Computer Bus

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Aerospace and Electronic Systems Magazine, IEEE

The IEEE Aerospace and Electronic Systems Magazine publishes articles concerned with the various aspects of systems for space, air, ocean, or ground environments.


Biomedical Engineering, IEEE Transactions on

Broad coverage of concepts and methods of the physical and engineering sciences applied in biology and medicine, ranging from formalized mathematical theory through experimental science and technological development to practical clinical applications.


Circuits and Systems II: Express Briefs, IEEE Transactions on

Part I will now contain regular papers focusing on all matters related to fundamental theory, applications, analog and digital signal processing. Part II will report on the latest significant results across all of these topic areas.


Computer

Computer, the flagship publication of the IEEE Computer Society, publishes peer-reviewed technical content that covers all aspects of computer science, computer engineering, technology, and applications. Computer is a resource that practitioners, researchers, and managers can rely on to provide timely information about current research developments, trends, best practices, and changes in the profession.


Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on

Methods, algorithms, and human-machine interfaces for physical and logical design, including: planning, synthesis, partitioning, modeling, simulation, layout, verification, testing, and documentation of integrated-circuit and systems designs of all complexities. Practical applications of aids resulting in producible analog, digital, optical, or microwave integrated circuits are emphasized.


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Most published Xplore authors for Computer Bus

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Xplore Articles related to Computer Bus

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Worst-case arbitration time in S-100-type computer bus systems

Electronics Letters, 1982

The computer bus systems S-100 and Fastbus use a scheme consisting of extra logic circuits in each device and extra bus lines for arbitrating rapidly between two or more devices seeking to use the bus at the same time. The letter shows how to develop a table of priority numbers that make the arbitration time a maximum, and gives an ...


Overcoming the effects of spurious pulses on wired-or lines in computer bus systems

Electronics Letters, 1983

Spurious pulses can be generated on wired-OR computer bus lines under certain conditions. The letter explains how they are caused and presents two methods for overcoming their effects. The first relies on timing within the devices connected to the bus; the second, thought to be preferable, involves forming the line into a loop and arranging for each device to sense ...


CPLD-Based Implementation of Computer Bus RAM

2010 International Conference on Challenges in Environmental Science and Computer Engineering, 2010

Along with the rapid application of large-scale integrated circuit and computer system is growing by geometric series, the boundary between hardware and software has blurred. EDA, a novel technology arisen in recent years has been challenged with the traditional hardware design, because the original method and mode cannot satisfy modern hardware system design. In this paper, we implement the complex ...


The implementation of computer Bus-RAM based on FPGA

2011 2nd International Conference on Artificial Intelligence, Management Science and Electronic Commerce (AIMSEC), 2011

Along with the rapid application of large-scale integrated circuit, computer system is growing by geometric series, the boundary between hardware and software has blurred. FPGA, a novel technology arisen in recent years has been challenged with the traditional hardware design, because the original method and mode cannot satisfy modern hardware system design. In this paper, we implement the complex design ...


Virtualization of Local Computer Bus Architectures Over the Internet

IEEE GLOBECOM 2007 - IEEE Global Telecommunications Conference, 2007

We propose a companion solution to iSCSI that is more suited for virtualization of local computer bus architectures, such as PCI/PCI-X and PCI Express. We explore the architecture of a possible virtualization protocol. The solution would allow extension of the host computer bus via an IP network based on 10Gbps Ethernet. This solution would allow adapter cards to be located ...


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Educational Resources on Computer Bus

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IEEE-USA E-Books

  • Worst-case arbitration time in S-100-type computer bus systems

    The computer bus systems S-100 and Fastbus use a scheme consisting of extra logic circuits in each device and extra bus lines for arbitrating rapidly between two or more devices seeking to use the bus at the same time. The letter shows how to develop a table of priority numbers that make the arbitration time a maximum, and gives an expression for this maximum time in terms of logic-circuit and bus-propagation delays.

  • Overcoming the effects of spurious pulses on wired-or lines in computer bus systems

    Spurious pulses can be generated on wired-OR computer bus lines under certain conditions. The letter explains how they are caused and presents two methods for overcoming their effects. The first relies on timing within the devices connected to the bus; the second, thought to be preferable, involves forming the line into a loop and arranging for each device to sense the signal at two points along it.

  • CPLD-Based Implementation of Computer Bus RAM

    Along with the rapid application of large-scale integrated circuit and computer system is growing by geometric series, the boundary between hardware and software has blurred. EDA, a novel technology arisen in recent years has been challenged with the traditional hardware design, because the original method and mode cannot satisfy modern hardware system design. In this paper, we implement the complex design in a new way, where the programmable logic undoubtedly becomes the best suited technology.

  • The implementation of computer Bus-RAM based on FPGA

    Along with the rapid application of large-scale integrated circuit, computer system is growing by geometric series, the boundary between hardware and software has blurred. FPGA, a novel technology arisen in recent years has been challenged with the traditional hardware design, because the original method and mode cannot satisfy modern hardware system design. In this paper, we implement the complex design in a new way, where programmable logic undoubtedly become the best suited technology.

  • Virtualization of Local Computer Bus Architectures Over the Internet

    We propose a companion solution to iSCSI that is more suited for virtualization of local computer bus architectures, such as PCI/PCI-X and PCI Express. We explore the architecture of a possible virtualization protocol. The solution would allow extension of the host computer bus via an IP network based on 10Gbps Ethernet. This solution would allow adapter cards to be located remote from host systems via the Internet, yet appear as a local bus resource. We present Quality of Service (QOS) goals for PCI Express virtualization and expansion via IP. Critical QOS characteristics such as data transfer rates and latency are discussed. PCI Express transaction types are reviewed to assess whether IP over 10 Gbps Ethernet is suitable as a transport. A general protocol architecture as presently envisioned is described. We introduce a class system for performance categorization. We identify the areas that require further research and investigation. System overhead, latency, and timeouts must be addressed. Methods for configuring and optimizing the data transfer path must be developed.

  • Computer Bus, Coax and Fiber Media Utilization in Multiple Function, Multiformat Digital Facilities Design

    Television broadcasting is now in the last phase of its 20-year evolution from all-analog to all-digital facilities. Traditional transmission means of coax and STP (shielded twisted pairs) are still the standards for interconnecting standalone equipment via routers. But stand-alone high speed computers now provide multiple signal processing functions in compact desk-top consoles, moving signals about on parallel buses. Fiber is coming into its own as the medium for transporting broadband serial digital signals beyond coax cable's cliff effect distances. — This is a tutorial on those transmission means.

  • DIII-D F-coil chopper selection, control and fault recognition system

    The DIII-D fusion experiment uses 18 field-shaping coils (F-coils) to control the position and shape of a plasma discharge. The DIII-D F-coils are powered and controlled by configuring single or parallel operation of up to 50 modular, 3-kA, 3-kHz, 2-quadrant-switching power supplies (choppers) and nine DC power supplies. The DC power supplies provide the raw power for the choppers while the choppers control the current in the F-coils. The chopper selection, control, and fault-recognition system uses state-of-the-art computer bus switching networks and programmable array logic (PAL) circuitry. The chopper selection and control system uses the computer bus switching networks to select individual chopper controls for a specific F-coil. A fault system capable of managing over 100 faults was developed using flexible PAL circuitry programmed for the application. The fault system identifies the first fault to occur and takes appropriate action for controlled safe termination of a shot. Additional faults are flagged and new responses taken if required.<<ETX>>

  • Spectrum management of pulse transmission by high-cut filter line

    A computer bus which operates at 200 MHz clock frequency has been constructed using an absorptive high-cut filter line based on the time domain analysis of the pulse transmission in the bus. The filter has enabled the rapid buildup of the pulse as well as the suppression of the resonance, which damages the gates of ICs. The results of the experiment have led to the concept of spectrum management, and quantitative discussions have been made. The experiments have also confirmed that the bus has contributed to the reduction of the unwanted radiation. This bus structure and the spectrum management are essential for the rapid operation of the computer.

  • Introduction of a fully portable, body-mounted emergency medical information system

    InterVision Systems Inc. has developed a "wearable" computer system for use by Walter Reed Army Institute of Research. The system will be used to access medical information, to support remote primary care, and for remote diagnostic consultation. The system consists of a small 4/spl times/4/spl times/3-inch chassis that houses the CPU, interface boards, battery mount and a panel of standard I/O ports. The system comprises a 486SLC/25 MHz computer bus, 4, 8 or 12 MB RAM, a 170 MB removable hard drive for a type III PCMCIA slot, a type II PCMCIA slot, voice actuation software and hardware, and a miniature wrist- mounted keyboard. The miniature VGA CRT is mounted on a head band, or may be mounted on the wrist, and displays text, graphics or information relayed from the medical information system or from the medical consultant.

  • Spectrum management of pulse transmission by high-cut filter using magnetic loss

    Operation problems of a 200 MHz clock computer bus were analyzed by the time domain transmission of pulse in the bus. An absorptive high-cut filter was fabricated and installed to solve the problems. In the process of determining the operating conditions, we came upon a new concept for spectrum management.



Standards related to Computer Bus

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(Replaced) IEEE Standard VHDL Language Reference Manual

his standard revises and enhances the VHDL language reference manual (LRM) by including a standard C language interface specification; specifications from previously separate, but related, standards IEEE Std 1164 -1993,1 IEEE Std 1076.2 -1996, and IEEE Std 1076.3-1997; and general language enhancements in the areas of design and verification of electronic systems.


IEEE Application Guide for Distributed Digital Control and Monitoring for Power Plants


IEEE Guide for Control of Small Hydroelectric Power Plants


IEEE Standard for a Chip and Module Interconnect Bus: SBus


IEEE Standard for a Futurebus+®/VME64 Bridge


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Jobs related to Computer Bus

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