Conferences related to Computer Architecture

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2020 ACM/IEEE 47th Annual International Symposium on Computer Architecture (ISCA)

Computer Architecture


2020 IEEE Applied Power Electronics Conference and Exposition (APEC)

APEC focuses on the practical and applied aspects of the power electronics business. Not just a power designer’s conference, APEC has something of interest for anyone involved in power electronics including:- Equipment OEMs that use power supplies and converters in their equipment- Designers of power supplies, dc-dc converters, motor drives, uninterruptable power supplies, inverters and any other power electronic circuits, equipments and systems- Manufacturers and suppliers of components and assemblies used in power electronics- Manufacturing, quality and test engineers involved with power electronics equipment- Marketing, sales and anyone involved in the business of power electronic- Compliance engineers testing and qualifying power electronics equipment or equipment that uses power electronics


2020 IEEE Frontiers in Education Conference (FIE)

The Frontiers in Education (FIE) Conference is a major international conference focusing on educational innovations and research in engineering and computing education. FIE 2019 continues a long tradition of disseminating results in engineering and computing education. It is an ideal forum for sharing ideas, learning about developments and interacting with colleagues inthese fields.


2020 IEEE Global Engineering Education Conference (EDUCON)

The IEEE Global Engineering Education Conference (EDUCON) 2020 is the eleventh in a series of conferences that rotate among central locations in IEEE Region 8 (Europe, Middle East and North Africa). EDUCON is one of the flagship conferences of the IEEE Education Society. It seeks to foster the area of Engineering Education under the leadership of the IEEE Education Society.


Oceans 2020 MTS/IEEE GULF COAST

To promote awareness, understanding, advancement and application of ocean engineering and marine technology. This includes all aspects of science, engineering, and technology that address research, development, and operations pertaining to all bodies of water. This includes the creation of new capabilities and technologies from concept design through prototypes, testing, and operational systems to sense, explore, understand, develop, use, and responsibly manage natural resources.

  • OCEANS 2018 MTS/IEEE Charleston

    Ocean, coastal, and atmospheric science and technology advances and applications

  • OCEANS 2017 - Anchorage

    Papers on ocean technology, exhibits from ocean equipment and service suppliers, student posters and student poster competition, tutorials on ocean technology, workshops and town meetings on policy and governmental process.

  • OCEANS 2016

    The Marine Technology Scociety and the Oceanic Engineering Society of the IEEE cosponor a joint annual conference and exposition on ocean science, engineering, and policy. The OCEANS conference covers four days. One day for tutorials and three for approx. 500 technical papers and 150 -200 exhibits.

  • OCEANS 2015

    The Marine Technology Scociety and the Oceanic Engineering Society of the IEEE cosponor a joint annual conference and exposition on ocean science, engineering, and policy. The OCEANS conference covers four days. One day for tutorials and three for approx. 450 technical papers and 150-200 exhibits.

  • OCEANS 2014

    The OCEANS conference covers four days. One day for tutorials and three for approx. 450 technical papers and 150-200 exhibits.

  • OCEANS 2013

    Three days of 8-10 tracks of technical sessions (400-450 papers) and concurent exhibition (150-250 exhibitors)

  • OCEANS 2012

    Ocean related technology. Tutorials and three days of technical sessions and exhibits. 8-12 parallel technical tracks.

  • OCEANS 2011

    The Marine Technology Society and the Oceanic Engineering Scociety of the IEEE cosponsor a joint annual conference and exposition on ocean science engineering, and policy.

  • OCEANS 2010

    The Marine Technology Society and the Oceanic Engineering Scociety of the IEEE cosponsor a joint annual conference and exposition on ocean science engineering, and policy.

  • OCEANS 2009

  • OCEANS 2008

    The Marine Technology Society (MTS) and the Oceanic Engineering Society (OES) of the Institute of Electrical and Electronic Engineers (IEEE) cosponsor a joint conference and exposition on ocean science, engineering, education, and policy. Held annually in the fall, it has become a focal point for the ocean and marine community to meet, learn, and exhibit products and services. The conference includes technical sessions, workshops, student poster sessions, job fairs, tutorials and a large exhibit.

  • OCEANS 2007

  • OCEANS 2006

  • OCEANS 2005

  • OCEANS 2004

  • OCEANS 2003

  • OCEANS 2002

  • OCEANS 2001

  • OCEANS 2000

  • OCEANS '99

  • OCEANS '98

  • OCEANS '97

  • OCEANS '96


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Periodicals related to Computer Architecture

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Biomedical Circuits and Systems, IEEE Transactions on

The Transactions on Biomedical Circuits and Systems addresses areas at the crossroads of Circuits and Systems and Life Sciences. The main emphasis is on microelectronic issues in a wide range of applications found in life sciences, physical sciences and engineering. The primary goal of the journal is to bridge the unique scientific and technical activities of the Circuits and Systems ...


Circuits and Systems for Video Technology, IEEE Transactions on

Video A/D and D/A, display technology, image analysis and processing, video signal characterization and representation, video compression techniques and signal processing, multidimensional filters and transforms, analog video signal processing, neural networks for video applications, nonlinear video signal processing, video storage and retrieval, computer vision, packet video, high-speed real-time circuits, VLSI architecture and implementation for video technology, multiprocessor systems--hardware and software-- ...


Circuits and Systems II: Express Briefs, IEEE Transactions on

Part I will now contain regular papers focusing on all matters related to fundamental theory, applications, analog and digital signal processing. Part II will report on the latest significant results across all of these topic areas.


Circuits and Systems Magazine, IEEE


Communications Letters, IEEE

Covers topics in the scope of IEEE Transactions on Communications but in the form of very brief publication (maximum of 6column lengths, including all diagrams and tables.)


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Most published Xplore authors for Computer Architecture

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Xplore Articles related to Computer Architecture

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An XML-Based ADL Framework for Automatic Generation of Multithreaded Computer Architecture Simulators

IEEE Computer Architecture Letters, 2009

Computer architecture simulation has always played a pivotal role in continuous innovation of computers. However, constructing or modifying a high quality simulator is time consuming and error-prone. Thus, often architecture description languages (ADLs) are used to provide an abstraction layer for describing the computer architecture and automatically generating corresponding simulators. Along the line of such research, we present a novel ...


Incorporating benchmark programming in the teaching of undergraduate Computer Architecture

2015 IEEE 7th International Conference on Engineering Education (ICEED), 2015

Advanced Computer Architecture is an upper-level required course offered by the Department of Computer Science and Engineering at the University of Alaska-Anchorage (UAA). Course content is structured to provide students with a qualitative and quantitative approach to computer architecture, which addresses both the hardware and software aspects of parallelism in modern computing systems. Historically, students were exposed to computer architecture's ...


M-learning application for Basic Computer Architecture

2012 International Conference on Innovation Management and Technology Research, 2012

M-learning is a mobile technology in learning and teaching which also another extension to the conventional learning practice specifically e-learning. Mostly, accessing of resources in e-learning is done through fixed nodes such as notebook and desktop PC which generally are restricted either by location, time or both. Through m-learning, accessing to learning resources is independent of time and location. Therefore, ...


Fault Tolerant Computer Architecture

Fault Tolerant Computer Architecture, None

For many years, most computer architects have pursued one primary goal: performance. Architects have translated the ever-increasing abundance of ever- faster transistors provided by Moore's law into remarkable increases in performance. Recently, however, the bounty provided by Moore's law has been accompanied by several challenges that have arisen as devices have become smaller, including a decrease in dependability due to ...


Work in progress - computer architecture meets ubiquitous computing

2009 39th IEEE Frontiers in Education Conference, 2009

Computer architecture has been a core topic in computer science since the 1950s. It is taught in most universities offering CS degrees and features in IEEE CS/ACM computing curricula. Interest in computer architecture has fallen. The number of innovative books on computer architecture has declined, as well as the number of papers on computer architecture education. This work in progress ...


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Educational Resources on Computer Architecture

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IEEE.tv Videos

End of Moore's Law Challenges and Opportunities: Computer Architecture Perspectives: IEEE Rebooting Computing 2017, Margaret Martonosi
Search Techniques
Computing Conversations: Van Jacobson on Content-Centric Networking
Computing in the Cambrian Era - ICRC 2018 Plenary, Paolo Faraboschi
Hal Abelson on Computer Science Education
Rebooting Memory Architecture - Wen-mei Hwu at INC 2019
2012 IEEE Medal of Honor: John L. Hennessy
Kostas Kontogiannis: IoT Systems Delivery and Deployment Agility - Research Challenges and Issues: WF IoT 2016
Alexandros Fragkiadakis: Trust-based Scheme Employing Evidence Reasoning for IoT Architectures: WF-IoT 2016
Neuromorphic Mixed-Signal Circuitry for Asynchronous Pulse Processing Neuromorphic Mixed-Signal Circuitry for Asynchronous Pulse Processing - Peter Petre: 2016 International Conference on Rebooting Computing
Parallel Quantum Computing Emulation - Brian La Cour - ICRC 2018
Q&A with Dejan Milojicic: IEEE Big Data Podcast, Episode 7
D-Wave Quantum Computer: Technology Update - Fabio Altomare - ICRC San Mateo, 2019
NSF's Platforms for Advanced Wireless Research (PAWR) - IEEE Future Networks Webinar
Quantum Computation - ASC-2014 Plenary series - 4 of 13 - Tuesday 2014/8/12
Chameleon: A Scientific Instrument for Computer Science - Paul Ruth - IEEE Sarnoff Symposium, 2019
A Spike-Timing Neuromorphic Architecture: IEEE Rebooting Computing 2017
ITEC 2014: Next Generation Combat Vehicle Electrical Power Architecture Development
Millimeter Wave Mobile Communications for 5G Cellular: It Will Work!
Overview of SDRJ - Yoshihiro Hayashi at INC 2019

IEEE-USA E-Books

  • An XML-Based ADL Framework for Automatic Generation of Multithreaded Computer Architecture Simulators

    Computer architecture simulation has always played a pivotal role in continuous innovation of computers. However, constructing or modifying a high quality simulator is time consuming and error-prone. Thus, often architecture description languages (ADLs) are used to provide an abstraction layer for describing the computer architecture and automatically generating corresponding simulators. Along the line of such research, we present a novel XML-based ADL, its compiler, and a generation methodology to automatically generate multithreaded simulators for computer architecture. We utilize the industry-standard extensible markup language XML to describe the functionality and architecture of a modeled processor. Our ADL framework allows users to easily and quickly modify the structure, register set, and execution of a modeled processor. To prove its validity, we have generated several multithreaded simulators with different configurations based on the MIPS five- stage processor, and successfully tested with two programs.

  • Incorporating benchmark programming in the teaching of undergraduate Computer Architecture

    Advanced Computer Architecture is an upper-level required course offered by the Department of Computer Science and Engineering at the University of Alaska-Anchorage (UAA). Course content is structured to provide students with a qualitative and quantitative approach to computer architecture, which addresses both the hardware and software aspects of parallelism in modern computing systems. Historically, students were exposed to computer architecture's hardware-centric concepts through traditional textbook publisher provided instructor materials, including system schematic and block diagrams, and cycle-by-cycle hand analysis of short assembly language code snippets. Recorded student achievement outcomes for the course, were just meeting the faculty defined levels. Analysis of student performance indicated a higher-level of course content understanding in students with a mix of both hardware and software skills, and lower achievement levels by those students with only software background and skills. In an attempt to improve overall student understanding and outcome achievement, a reform of course material presentation was initiated which focused on use of microbenchmark programming as a means of introducing selected computer hardware concepts through their programming interfaces. Most computer science students are good programmers and understand high-level languages and algorithms. As such, they are used to tackling new concepts with software, so it was hoped that by linking the instruction of computer architecture hardware concepts with a programmer's perspective, overall student understanding and outcomes would improve.

  • M-learning application for Basic Computer Architecture

    M-learning is a mobile technology in learning and teaching which also another extension to the conventional learning practice specifically e-learning. Mostly, accessing of resources in e-learning is done through fixed nodes such as notebook and desktop PC which generally are restricted either by location, time or both. Through m-learning, accessing to learning resources is independent of time and location. Therefore, this study emphasizes on developing m-learning application for Basic Computer Architecture for supporting teaching and learning process. The application involves modules for notes, flash card and quiz which enables user to learn fundamental topics of the course by using mobile devices while offline. Prototype model is used as the development methodology. This m-learning application has been developed using JAVA programming language specifically J2ME MIDP 2.0 and CLDC 1.1. Netbeans IDE was used to design the interface. As a result, this prototype is expected to be as an alternative learning material which enables user to learn fundamental topics in Basic Computer Architecture course included Basic Structure of Computer, Basic Processing Unit, Arithmetic Unit, and Memory System.

  • Fault Tolerant Computer Architecture

    For many years, most computer architects have pursued one primary goal: performance. Architects have translated the ever-increasing abundance of ever- faster transistors provided by Moore's law into remarkable increases in performance. Recently, however, the bounty provided by Moore's law has been accompanied by several challenges that have arisen as devices have become smaller, including a decrease in dependability due to physical faults. In this book, we focus on the dependability challenge and the fault tolerance solutions that architects are developing to overcome it. The two main purposes of this book are to explore the key ideas in fault-tolerant computer architecture and to present the current state-of-the-art - over approximately the past 10 years - in academia and industry. Table of Contents: Introduction / Error Detection / Error Recovery / Diagnosis / Self-Repair / The Future

  • Work in progress - computer architecture meets ubiquitous computing

    Computer architecture has been a core topic in computer science since the 1950s. It is taught in most universities offering CS degrees and features in IEEE CS/ACM computing curricula. Interest in computer architecture has fallen. The number of innovative books on computer architecture has declined, as well as the number of papers on computer architecture education. This work in progress describes an attempt to breathe new life into the computer architecture curriculum by combining it with an area of growing interest - ubiquitous computing. An innovative attempt to create a new curriculum combining parts of the existing computer architecture curriculum with the structure, organization and design of ubiquitous systems is described. It examines factors common to both conventional processors and ubiquitous systems, for example input sensors and technologies, as well as low-power technology and memory design for portable applications.

  • Use of a New Moodle Module for Improving the Teaching of a Basic Course on Computer Architecture

    This paper describes how a new Moodle module, called CTPracticals, is applied to the teaching of the practical content of a basic computer organization course. In the core of the module, an automatic verification engine enables it to process the VHDL designs automatically as they are submitted. Moreover, a straightforward modification of this engine would make it possible to extend its application to other programming languages. The module provides students with real-time knowledge of the state of their work by their accessing the result of the automatic assessment or feedback messages. Teachers have a constant global view of the status of their class and have available multiple options such as sending feedback messages to students, obtaining statistics, launching additional verifications in batch, and so on. Likewise, the module substantially improves some organizational aspects, and its design may help teachers to encourage teamwork. Its use partially frees teachers from certain routine work, saving time that can be devoted to teaching objectives and tutoring activities.

  • Proceedings 30th Annual International Symposium on Computer Architecture

    The following topics are dealt with: computer architecture; thermal-aware microarchitecture; multiprocessor chip; thread-level speculation mechanisms; microarchitecture technique; superscalar microprocessors; energy-saving designs; multiprocessor interconnects; front-end scheduling; instruction scheduling; parallel processing; network processors; clustered processors; prefetching; pipelined memory architecture.

  • Proceedings. 15th Symposium on Computer Architecture and High Performance Computing

    The following topics are dealt with: computer architecture; memory architecture; cache storage; processor architecture; parallel programming languages; distributed programming; pervasive computing; grid computing; cluster computing; high performance applications; parallel algorithms; load balancing; processor scheduling; reconfigurable system; benchmarking; performance measurement.

  • Proceedings Eighth International Symposium on High Performance Computer Architecture

    The following topics are dealt with: energy and thermal management; speculative multithreading; memory-aware scheduling; latency tolerance and caches; speculation and prediction; multiprocessor systems; pipelining and microarchitecture; high-performance computer architecture.

  • Work in progress-improving feedback using an automatic assessment tool

    Students of computer science freshman year usually develop assembler programs to learn processor architecture. Homework exercises are done on paper, while those in lab sessions are solved with the aid of programming tools. Students perceive theory and lab as different subjects, so they donpsilat use lab tools to test their theory solved problems. Moreover, during lab sessions, students often tend to ask for the teacherpsilas guide and advice instead of using the debugging tools because these are new and unfriendly for them, and do not offer a quick and clear feedback. In this paper we present an automatic and friendly assessment tool, SISA-EMU, with a novel feature: exercise driven feedback with teacherpsilas expertise. It provides correctness information and clues to help the students solve their most common mistakes for each individual problem (and not typical generic debug information) without the physical support of a teacher. SISA-EMU is currently in pre-deploy phase via a Moodle learning platform and we will have first evaluation results by the end of the current term.



Standards related to Computer Architecture

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(Replaced) IEEE Standard VHDL Language Reference Manual

his standard revises and enhances the VHDL language reference manual (LRM) by including a standard C language interface specification; specifications from previously separate, but related, standards IEEE Std 1164 -1993,1 IEEE Std 1076.2 -1996, and IEEE Std 1076.3-1997; and general language enhancements in the areas of design and verification of electronic systems.


IEEE Application Guide for Distributed Digital Control and Monitoring for Power Plants


IEEE Recommended Practice for Architectural Description for Software-Intensive Systems

The purpose of this standard is to facilitate the expression and communication of architectures and thereby lay a foundation for quality and cost gains through standardization of elements and practices for architectural description. Despite significant efforts to improve engineering practices and technologies, software-intensive systems continue to present formidable risks and difficulties in their design, construction, deployment and evolution. Recent attempts ...


IEEE Standard Backplane Bus Specification for Multiprocessor Architectures: Futurebus+®


IEEE Standard for a 32-bit Microprocessor Architecture


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Jobs related to Computer Architecture

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