Conferences related to 3D

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Oceans 2020 MTS/IEEE GULF COAST

To promote awareness, understanding, advancement and application of ocean engineering and marine technology. This includes all aspects of science, engineering, and technology that address research, development, and operations pertaining to all bodies of water. This includes the creation of new capabilities and technologies from concept design through prototypes, testing, and operational systems to sense, explore, understand, develop, use, and responsibly manage natural resources.

  • OCEANS 2018 MTS/IEEE Charleston

    Ocean, coastal, and atmospheric science and technology advances and applications

  • OCEANS 2017 - Anchorage

    Papers on ocean technology, exhibits from ocean equipment and service suppliers, student posters and student poster competition, tutorials on ocean technology, workshops and town meetings on policy and governmental process.

  • OCEANS 2016

    The Marine Technology Scociety and the Oceanic Engineering Society of the IEEE cosponor a joint annual conference and exposition on ocean science, engineering, and policy. The OCEANS conference covers four days. One day for tutorials and three for approx. 500 technical papers and 150 -200 exhibits.

  • OCEANS 2015

    The Marine Technology Scociety and the Oceanic Engineering Society of the IEEE cosponor a joint annual conference and exposition on ocean science, engineering, and policy. The OCEANS conference covers four days. One day for tutorials and three for approx. 450 technical papers and 150-200 exhibits.

  • OCEANS 2014

    The OCEANS conference covers four days. One day for tutorials and three for approx. 450 technical papers and 150-200 exhibits.

  • OCEANS 2013

    Three days of 8-10 tracks of technical sessions (400-450 papers) and concurent exhibition (150-250 exhibitors)

  • OCEANS 2012

    Ocean related technology. Tutorials and three days of technical sessions and exhibits. 8-12 parallel technical tracks.

  • OCEANS 2011

    The Marine Technology Society and the Oceanic Engineering Scociety of the IEEE cosponsor a joint annual conference and exposition on ocean science engineering, and policy.

  • OCEANS 2010

    The Marine Technology Society and the Oceanic Engineering Scociety of the IEEE cosponsor a joint annual conference and exposition on ocean science engineering, and policy.

  • OCEANS 2009

  • OCEANS 2008

    The Marine Technology Society (MTS) and the Oceanic Engineering Society (OES) of the Institute of Electrical and Electronic Engineers (IEEE) cosponsor a joint conference and exposition on ocean science, engineering, education, and policy. Held annually in the fall, it has become a focal point for the ocean and marine community to meet, learn, and exhibit products and services. The conference includes technical sessions, workshops, student poster sessions, job fairs, tutorials and a large exhibit.

  • OCEANS 2007

  • OCEANS 2006

  • OCEANS 2005

  • OCEANS 2004

  • OCEANS 2003

  • OCEANS 2002

  • OCEANS 2001

  • OCEANS 2000

  • OCEANS '99

  • OCEANS '98

  • OCEANS '97

  • OCEANS '96


2019 21st European Conference on Power Electronics and Applications (EPE '19 ECCE Europe)

Energy conversion and conditioning technologies, power electronics, adjustable speed drives and their applications, power electronics for smarter grid, energy efficiency,technologies for sustainable energy systems, converters and power supplies


2019 30th Annual SEMI Advanced Semiconductor Manufacturing Conference (ASMC)

ASMC is the leading international technical conferences for discussing solutions that improve the collective manufacturing expertise of the semiconductor industry. Solving the challenges presented by semiconductor manufacturing has been a combined effort by device makers, equipment and materials suppliers, and academics. ASMC provides an unparalleled platform for semiconductor professionals to network and learn the latest in the practical application of advanced manufacturing strategies and methodologies. Technical presentations at ASMC highlight industry innovations with specific results.


2019 41st Annual International Conference of the IEEE Engineering in Medicine & Biology Society (EMBC)

The conference program will consist of plenary lectures, symposia, workshops andinvitedsessions of the latest significant findings and developments in all the major fields ofbiomedical engineering.Submitted papers will be peer reviewed. Accepted high quality paperswill be presented in oral and postersessions, will appear in the Conference Proceedings and willbe indexed in PubMed/MEDLINE & IEEE Xplore


2019 56th ACM/ESDA/IEEE Design Automation Conference (DAC)

EDA (Electronics Design Automation) is becoming ever more important with the continuous scaling of semiconductor devices and the growing complexities of their use in circuits and systems. Demands for lower-power, higher-reliability and more agile electronic systems raise new challenges to both design and design automation of such systems. For the past five decades, the primary focus of research track at DAC has been to showcase leading-edge research and practice in tools and methodologies for the design of circuits and systems.

  • 2022 59th ACM/ESDA/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2021 58th ACM/ESDA/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2020 57th ACM/ESDA/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2018 55th ACM/ESDA/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2017 54th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2016 53nd ACM/EDAC/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2015 52nd ACM/EDAC/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2014 51st ACM/EDAC/IEEE Design Automation Conference (DAC)

    DAC Description for TMRF The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading

  • 2013 50th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 session on design methodologies and EDA tool developments, keynotes, panels, plus User Track presentations. A diverse worldwide community representing more than 1,000 organization attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2012 49th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The Design Automation Conference (DAC) is the premier event for the design of electronic circuits and systems, and for EDA and silicon solutions. DAC features a wide array of technical presentations plus over 200 of the leading electronics design suppliers

  • 2011 48th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The Design Automation Conference is the world s leading technical conference and tradeshow on electronic design and design automation. DAC is where the IC Design and EDA ecosystem learns, networks, and does business.

  • 2010 47th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The Design Automation Conference (DAC) is the premier event for the design of electronic circuits and systems, and for EDA and silicon solutions. DAC features a wide array of technical presentations plus over 200 of the leading electronics design suppliers.

  • 2009 46th ACM/EDAC/IEEE Design Automation Conference (DAC)

    DAC is the premier event for the electronic design community. DAC offers the industry s most prestigious technical conference in combination with the biggest exhibition, bringing together design, design automation and manufacturing market influencers.

  • 2008 45th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The Design Automation Conference (DAC) is the premier event for the design of electronic circuits and systems, and for EDA and silicon solutions. DAC features a wide array of technical presentations plus over 250 of the leading electronics design suppliers.

  • 2007 44th ACM/IEEE Design Automation Conference (DAC)

    The Design Automation Conference (DAC) is the premier Electronic Design Automation (EDA) and silicon solution event. DAC features over 50 technical sessions covering the latest in design methodologies and EDA tool developments and an Exhibition and Demo Suite area with over 250 of the leading EDA, silicon and IP Providers.

  • 2006 43rd ACM/IEEE Design Automation Conference (DAC)

  • 2005 42nd ACM/IEEE Design Automation Conference (DAC)

  • 2004 41st ACM/IEEE Design Automation Conference (DAC)

  • 2003 40th ACM/IEEE Design Automation Conference (DAC)

  • 2002 39th ACM/IEEE Design Automation Conference (DAC)

  • 2001 38th ACM/IEEE Design Automation Conference (DAC)

  • 2000 37th ACM/IEEE Design Automation Conference (DAC)

  • 1999 36th ACM/IEEE Design Automation Conference (DAC)

  • 1998 35th ACM/IEEE Design Automation Conference (DAC)

  • 1997 34th ACM/IEEE Design Automation Conference (DAC)

  • 1996 33rd ACM/IEEE Design Automation Conference (DAC)


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Periodicals related to 3D

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Antennas and Propagation, IEEE Transactions on

Experimental and theoretical advances in antennas including design and development, and in the propagation of electromagnetic waves including scattering, diffraction and interaction with continuous media; and applications pertinent to antennas and propagation, such as remote sensing, applied optics, and millimeter and submillimeter wave techniques.


Applied Superconductivity, IEEE Transactions on

Contains articles on the applications and other relevant technology. Electronic applications include analog and digital circuits employing thin films and active devices such as Josephson junctions. Power applications include magnet design as well asmotors, generators, and power transmission


Broadcasting, IEEE Transactions on

Broadcast technology, including devices, equipment, techniques, and systems related to broadcast technology, including the production, distribution, transmission, and propagation aspects.


Circuits and Systems for Video Technology, IEEE Transactions on

Video A/D and D/A, display technology, image analysis and processing, video signal characterization and representation, video compression techniques and signal processing, multidimensional filters and transforms, analog video signal processing, neural networks for video applications, nonlinear video signal processing, video storage and retrieval, computer vision, packet video, high-speed real-time circuits, VLSI architecture and implementation for video technology, multiprocessor systems--hardware and software-- ...


Communications Magazine, IEEE

IEEE Communications Magazine was the number three most-cited journal in telecommunications and the number eighteen cited journal in electrical and electronics engineering in 2004, according to the annual Journal Citation Report (2004 edition) published by the Institute for Scientific Information. Read more at http://www.ieee.org/products/citations.html. This magazine covers all areas of communications such as lightwave telecommunications, high-speed data communications, personal communications ...


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Most published Xplore authors for 3D

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Xplore Articles related to 3D

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Five-contact silicon structure based integrated 3D Hall sensor

Electronics Letters, 2003

A new silicon integrated 3D Hall sensor for high-accuracy magnetic field measurements is suggested and tested. Its unique device design in having only five n/sup +/ contacts allows simultaneous and independent obtaining of the full information about the three components of the magnetic field vector. The device is manufactured through a simple planar process and requires the use of four ...


Coupling between microstrip lines embedded in polyimide layers for 3D-MMICs on Si

IEE Proceedings - Microwaves, Antennas and Propagation, 2003

Three-dimensional circuits built on multiple layers of polyimide are required for constructing Si/SiGe monolithic microwave/millimetre-wave integrated circuits on CMOS (low resistivity) Si wafers. However, the closely spaced transmission lines are susceptible to high levels of coupling, which degrade circuit performance. We present finite difference time domain (FDTD) analysis and measured characteristics of novel shielding structures that significantly reduce coupling between ...


Monolithic 3D layout using 2D EDA for embedded memory-rich designs

2015 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S), 2015

Monolithic 3D integration has generated considerable interest in recent years due it its inherent capability of supporting heterogeneous devices, and its rich vertical connectivity allowing for increased integration while reducing wire-length and power. Few commercial EDA 3D tools are in existence and prior work focused on partitioning logic between two or more logic strata, capitalizing on harnessing existing 2D tools ...


Algorithm for 3D reconstruction with both visible and missing data

Electronics Letters, 2003

A novel algorithm for 3D reconstruction from image sequences is presented. Global optimisation is applied to a rough model by minimising the back projection errors in each image. Different weights are added to distinguish visible and occluded points. Satisfactory results on both simulated data and real images are reported


On the 3D documentation of the Igel Column — Original and copy: Structured 3D survey and analytical 3D information system

2013 Digital Heritage International Congress (DigitalHeritage), 2013

The Igel Column, 23 m high, is one of the best known Roman column monuments in Germany and is part of the UNESCO World Heritage `Roman Structures, Cathedral and Church of Our Lady' in Trier. The list also includes a faithfully reconstructed and colored one-to-one copy of the column monument from the early 20th century, which is located at the ...


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Educational Resources on 3D

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IEEE-USA E-Books

  • Five-contact silicon structure based integrated 3D Hall sensor

    A new silicon integrated 3D Hall sensor for high-accuracy magnetic field measurements is suggested and tested. Its unique device design in having only five n/sup +/ contacts allows simultaneous and independent obtaining of the full information about the three components of the magnetic field vector. The device is manufactured through a simple planar process and requires the use of four masks. The lateral dimensions of the sensor are 270/spl times/270 /spl mu/m; the channel magnetosensitivities are S/sub x/=S/sub y/=85 V/AT and S/sub z/=29 V/AT; the nonlinearity and channel cross-sensitivities at B/spl les/1 reach no more than 0.6% and 3-4%, respectively; and the frequency response to AC magnetic field is greater than 30 kHz

  • Coupling between microstrip lines embedded in polyimide layers for 3D-MMICs on Si

    Three-dimensional circuits built on multiple layers of polyimide are required for constructing Si/SiGe monolithic microwave/millimetre-wave integrated circuits on CMOS (low resistivity) Si wafers. However, the closely spaced transmission lines are susceptible to high levels of coupling, which degrade circuit performance. We present finite difference time domain (FDTD) analysis and measured characteristics of novel shielding structures that significantly reduce coupling between embedded microstrip lines. A discussion of the electric and magnetic field distributions for the coupled microstrip lines is presented to provide a physical rationale for the presented results

  • Monolithic 3D layout using 2D EDA for embedded memory-rich designs

    Monolithic 3D integration has generated considerable interest in recent years due it its inherent capability of supporting heterogeneous devices, and its rich vertical connectivity allowing for increased integration while reducing wire-length and power. Few commercial EDA 3D tools are in existence and prior work focused on partitioning logic between two or more logic strata, capitalizing on harnessing existing 2D tools into 3D flows through scripting and other strategies. In this paper we present a methodology intended to exploit the memory-rich nature of modern designs that have large fractions of their area dedicated to multiple memory blocks, and leverages 3D stacking to partition the design into memory-optimized and logic-optimized strata using commercial Synopsys 2D EDA tools.

  • Algorithm for 3D reconstruction with both visible and missing data

    A novel algorithm for 3D reconstruction from image sequences is presented. Global optimisation is applied to a rough model by minimising the back projection errors in each image. Different weights are added to distinguish visible and occluded points. Satisfactory results on both simulated data and real images are reported

  • On the 3D documentation of the Igel Column — Original and copy: Structured 3D survey and analytical 3D information system

    The Igel Column, 23 m high, is one of the best known Roman column monuments in Germany and is part of the UNESCO World Heritage `Roman Structures, Cathedral and Church of Our Lady' in Trier. The list also includes a faithfully reconstructed and colored one-to-one copy of the column monument from the early 20th century, which is located at the Rheinisches Landesmuseum Trier. Both original and copy are in danger of decay and require comprehensive restoration. Commissioned by the LBB Trier, ArcTron3D GmbH documented both monuments with combined terrestrial and airborne high-resolution 3D scanning technologies. Apart from terrestrial laser scanning and structured light scanning, SFMphotogrammetry was carried out from a lifting platform and a camera copter (MAV - Micro Aerial Vehicle). The data fusion and processing resulted in photorealistic high-resolution 3D models. These models were managed and prepared in ArcTron3D's database-supported 3D information system aSPECT3D, which is able to handle large data amounts. For further use during the restoration process, the database allows systematic access to all project data, which was structured according to archaeological and restoration questions.

  • Full-parallax 3D display from the hole-filtered depth information

    In this paper we introduce an efficient hole-filling algorithm for synthetic generation of microimages that are displayed on an integral imaging monitor. We apply the joint bilateral filter and the median filter to the captured depth map. We introduce in any step of the iterative algorithm with the data from a new Kinect capture. As a result, this algorithm can improve the quality of the depth maps and remove unmeasured depth holes effectively. This refined depth information enables to create a tidy integral image, which can be projected into an integral imaging monitor. In this way the monitor can display 3D images with continuous views, full parallax and abundant 3D reconstructed scene for the observer.

  • 3D integration applications for low temperature direct bond technology

    This paper describes low temperature direct bond technology and applications enabled by this technology. This technology includes ZiBond® and DBI® hybrid bonding. Enabled applications include backside illuminated (BSI) image sensors; stacked BSI image sensors; DBI® hybrid bond image sensors; 3D memory; higher performance, lower cost RF front ends; and reduced thickness, lower cost die stacks with reduced stress.

  • 3D-TSV vertical interconnection method using Cu/SnAg double bumps

    3D-TSV chip staking becomes the ultimate 3D chip stacking technology because of its smallest size and weight, best electrical performance, and potentially lower cost. There have been several 3D-TSV chip to chip vertical interconnection methods such as copper-copper bonding and solder interconnect. In the solder 3D-TSV interconnect, copper/solder double bump structure has been used to interconnect TSV bumps followed by underfill dispensing. However, solder joint electrical shortage between neighboring bumps and underfill dispensing at the very thin 3D-TSV chip stack becomes very challenging issues. In this study, the copper/eutectic solder bump bonding method using pre- applied NCAs was investigated as an alternative 3D-TSV interconnection method. The non-conductive polymer adhesive was pre-applied on 3D-TSV wafers with copper/eutectic solder bumps as a film format resulting in no solder joint electrical shortage problem between neighboring bumps and no extra underfill process. Specially designed NCA materials have been developed to satisfy the polymer resin flow characteristics, solder flux function, fast curing speed, and 3D chip stacking process compatibility. In addition, simple and fast thermo-compression bonding processes have been developed to finish the solder joining and NCA curing at 250°C within 10 seconds. The electrical interconnections mechanism of 3D-TSV stacked chips using copper/solder double bumps and newly developed pre-applied NCAs were investigated and 3D-TSV vertical interconnect using NCAs was successfully demonstrated. The electrical interconnection through the arrays of the bumps between two 3D-TSV test chips showed excellent reliability test results, high temperature storage test (HTST) of 200 hours, pressure cooker test (PCT) of 24 hours, and thermal cycle (T/C) of 200 cycles. As a summary, it was proven that the one step metal/polymer hybrid bonding was very efficient 3D-TSV vertical interconnection method.

  • Process development for 3D integration: Conductive wafer bonding for high density inter-chip interconnection

    This paper discusses the application of conductive wafer bonding, especially wafer level hybrid Cu-Cu bonding, for realizing high density inter-chip interconnection. 3D integration process using conductive wafer bonding and the test vehicle for bonding process evaluation are described. Different pre- bonding surface treatment methods and bonding procedures are studied and compared for yield and throughput optimization.

  • Cu/dielectric hybrid bonding using surface-activated bonding (SAB) technologies for 3D integration

    Surface activation is of great importance for low temperature wafer bonding technology development. We developed new low temperature Cu/dielectric hybrid bonding process by using surface-activated bonding technologies for 3D integration application. We report the surface analysis results of the hybrid surface treated by Ar plasma and Ar FAB, and discuss the effects of different surface activation processes on wafer bonding, and conclude with prospects for the future.



Standards related to 3D

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No standards are currently tagged "3D"