Conferences related to Single Event Upset

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2020 IEEE Nuclear Science Symposium and Medical Imaging Conference (NSS/MIC)

All areas of ionizing radiation detection - detectors, signal processing, analysis of results, PET development, PET results, medical imaging using ionizing radiation


2019 IEEE 28th International Symposium on Industrial Electronics (ISIE)

The conference will provide a forum for discussions and presentations of advancements inknowledge, new methods and technologies relevant to industrial electronics, along with their applications and future developments.


2019 IEEE International Reliability Physics Symposium (IRPS)

Meeting of academia and research professionals to discuss reliability challenges.


2018 19th International Symposium on Quality Electronic Design (ISQED)

19th International Symposium on Quality Electronic Design (ISQED 2018) is the premier interdisciplinary and multidisciplinary Electronic Design conference?bridges the gap among Electronic/Semiconductor ecosystem members providing electronic design tools, integratedcircuit technologies, semiconductor technology,packaging, assembly & test to achieve design quality.


2018 Annual Reliability and Maintainability Symposium (RAMS)

Scope:Tutorials and original papers on reliability, maintainability, safety, risk management, and logistics


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Periodicals related to Single Event Upset

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Circuits and Systems II: Express Briefs, IEEE Transactions on

Part I will now contain regular papers focusing on all matters related to fundamental theory, applications, analog and digital signal processing. Part II will report on the latest significant results across all of these topic areas.


Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on

Methods, algorithms, and human-machine interfaces for physical and logical design, including: planning, synthesis, partitioning, modeling, simulation, layout, verification, testing, and documentation of integrated-circuit and systems designs of all complexities. Practical applications of aids resulting in producible analog, digital, optical, or microwave integrated circuits are emphasized.


Dependable and Secure Computing, IEEE Transactions on

The purpose of TDSC is to publish papers in dependability and security, including the joint consideration of these issues and their interplay with system performance. These areas include but are not limited to: System Design: architecture for secure and fault-tolerant systems; trusted/survivable computing; intrusion and error tolerance, detection and recovery; fault- and intrusion-tolerant middleware; firewall and network technologies; system management ...


Design & Test of Computers, IEEE

IEEE Design & Test of Computers offers original works describing the methods used to design and test electronic product hardware and supportive software. The magazine focuses on current and near-future practice, and includes tutorials, how-to articles, and real-world case studies. Topics include IC/module design, low-power design, electronic design automation, design/test verification, practical technology, and standards. IEEE Design & Test of ...


Device and Materials Reliability, IEEE Transactions on

Provides leading edge information that is critical to the creation of reliable electronic devices and materials, and a focus for interdisciplinary communication in the state of the art of reliability of electronic devices, and the materials used in their manufacture. It focuses on the reliability of electronic, optical, and magnetic devices, and microsystems; the materials and processes used in the ...


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Most published Xplore authors for Single Event Upset

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Xplore Articles related to Single Event Upset

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Use of code error and beat frequency test method to identify single event upset sensitive circuits in a 1GHz analog to digital converter

2007 9th European Conference on Radiation and Its Effects on Components and Systems, 2007

Typical test methods for characterizing the single event upset performance of an analog to digital converter (ADC) have involved holding the input at static values. As a result, output error signatures are seen for only a few input voltage and output codes. A test method using an input beat frequency and output code error detection allows an ADC to be ...


Use of Code Error and Beat Frequency Test Method to Identify Single Event Upset Sensitive Circuits in a 1 GHz Analog to Digital Converter

IEEE Transactions on Nuclear Science, 2008

Typical test methods for characterizing the single event upset performance of an analog to digital converter (ADC) have involved holding the input at static values. As a result, output error signatures are seen for only a few input voltage and output codes. A test method using an input beat frequency and output code error detection allows an ADC to be ...


Influence of Laser Pulse Duration in Single Event Upset Testing

2005 8th European Conference on Radiation and Its Effects on Components and Systems, 2005

Device simulations of laser induced SEU in an SRAM cell are performed with pulse durations from 100fs to 100μs. SEU threshold energy is notably dependent on the pulse duration. Two regimes are identified and modeled analytically and electrically.


Proton Induced Single Event Upset in 6 T SOI SRAMs

IEEE Transactions on Nuclear Science, 2006

This paper presents a method to estimate the saturated proton upset cross section for 6 T SOI SRAM cells from layout and technology parameters. The calculated proton upset cross section based on this method is in good agreement with test results for our 6 T SOI SRAM cells processed using 0.15 and 0.35 mum technologies


Single Event Upset Characterization of the Virtex-4 Field Programmable Gate Array Using Proton Irradiation

2006 IEEE Radiation Effects Data Workshop, 2006

Proton induced SEU cross-sections of functional blocks and the SRAM which stores the logic configuration of the Virtex-4 FPGA are presented. Upset rates in the space radiation environment are estimated


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Educational Resources on Single Event Upset

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IEEE.tv Videos

An IEEE IPC Special Session with X. Chen from Nokia Bell Labs
Energy Efficient Single Flux Quantum Based Neuromorphic Computing - IEEE Rebooting Computing 2017
Single Frame Super Resolution: Fuzzy Rule-Based and Gaussian Mixture Regression Approaches
A Comparison Between Single Purpose and Flexible Neuromorphic Processor Designs: IEEE Rebooting Computing 2017
Neuromorphic computing with integrated photonics and superconductors - Jeffrey Shainline: 2016 International Conference on Rebooting Computing
Broadband IQ, Image Reject, and Single Sideband Mixers: MicroApps 2015 - Marki Microwave
IMS MicroApps: Single Chip LNA on 0.25um SOS for SKA Midband Receiver
Maker Faire 2008: Spectrum's Digital Clock Contest Winner
Single Die Broadband CMOS Power Amplifier and Tracker with 37% Overall Efficiency for TDD/FDD LTE Applications: RFIC Industry Forum
Nanophotonic Devices for Quantum Information Processing: Optical Computing - Carsten Schuck at INC 2019
Multiobjective Quantum-inspired Evolutionary Algorithm and Preference-based Solution Selection Algorithm
A Wideband Single-PLL RF Receiver for Simultaneous Multi-Band and Multi-Channel Digital Car Radio Reception: RFIC Industry Showcase
Approximate Dynamic Programming Methods A Unified Framework
Handling of a Single Object by Multiple Mobile Robots based on Caster-Like Dynamics
Single Crystal AlGaN Bulk Acoustic Wave Resonators on Silicon Substrates with High Electromechanical Coupling: RFIC Industry Showcase
IEEE IPC Special Session with Domanic Lavery of UCL
SIMD Programming in VOLK, the Vector-Optimized Library of Kernels
Ciena Corp - IEEE Spectrum Emerging Technology Award, 2019 IEEE Honors Ceremony
Stochastic Single Flux Quantum Neuromorphic Computing using Magnetically Tunable Josephson Junctions - Stephen Russek: 2016 International Conference on Rebooting Computing
Multi-Standard 5Gbps to 28.2Gbps Adaptive, Single Voltage SerDes Transceiver with Analog FIR and 2-Tap Unrolled DFE in 28nm CMOS: RFIC Interactive Forum 2017

IEEE-USA E-Books

  • Use of code error and beat frequency test method to identify single event upset sensitive circuits in a 1GHz analog to digital converter

    Typical test methods for characterizing the single event upset performance of an analog to digital converter (ADC) have involved holding the input at static values. As a result, output error signatures are seen for only a few input voltage and output codes. A test method using an input beat frequency and output code error detection allows an ADC to be characterized with a dynamic input at a high frequency. With this method, the impact of an ion strike can be seen over the full code range of the output. The error signatures from this testing can provide clues to which area of the ADC is sensitive to an ion strike.

  • Use of Code Error and Beat Frequency Test Method to Identify Single Event Upset Sensitive Circuits in a 1 GHz Analog to Digital Converter

    Typical test methods for characterizing the single event upset performance of an analog to digital converter (ADC) have involved holding the input at static values. As a result, output error signatures are seen for only a few input voltage and output codes. A test method using an input beat frequency and output code error detection allows an ADC to be characterized with a dynamic input at a high frequency. With this method, the impact of an ion strike can be seen over the full code range of the output. The error signatures from this testing can provide clues to which area of the ADC is sensitive to an ion strike.

  • Influence of Laser Pulse Duration in Single Event Upset Testing

    Device simulations of laser induced SEU in an SRAM cell are performed with pulse durations from 100fs to 100μs. SEU threshold energy is notably dependent on the pulse duration. Two regimes are identified and modeled analytically and electrically.

  • Proton Induced Single Event Upset in 6 T SOI SRAMs

    This paper presents a method to estimate the saturated proton upset cross section for 6 T SOI SRAM cells from layout and technology parameters. The calculated proton upset cross section based on this method is in good agreement with test results for our 6 T SOI SRAM cells processed using 0.15 and 0.35 mum technologies

  • Single Event Upset Characterization of the Virtex-4 Field Programmable Gate Array Using Proton Irradiation

    Proton induced SEU cross-sections of functional blocks and the SRAM which stores the logic configuration of the Virtex-4 FPGA are presented. Upset rates in the space radiation environment are estimated

  • Impact of Process Variations and Charge Sharing on the Single-Event-Upset Response of Flip-Flops

    Process variations and charge sharing impact the single-event circuit response. This paper correlates parameter shift impact on the single-event upset (SEU) probability of flip-flop designs in advanced CMOS processes under the influence of charge sharing.

  • 1.1 Ghz integer N phase lock loop with superior single event upset and total dose properties suitable for commercial space applications

    Poor single event upset (SEU) and single event latchup (SEL) immunity are of major concern in high speed RF phase lock loops (PLLs) incorporated in many of current commercial satellites. As a result, greater demands are placed at the system level to compensate for this. These include reloading programming every clock cycle, parallel interfaces and redundancy, which result in increased size, weight, complexity and power. We present in this paper a 1.1 Ghz integer N PLL which is inherently SEL immune, has SEU rates less than 10/sup -9/ errors/bit-day (orders of magnitude better than currently available), excellent phase noise performance and standby current up to 100 krads(Si) total dose. This part is currently being manufactured on Peregrine Semiconductor's 0.8 /spl mu/m ultra thin silicon on sapphire UTSi/sup R/ process.

  • Heavy ion linear energy transfer measurements during single event upset testing of electronic devices

    A heavy ion beam diagnostic system installed at the Brookhaven Single Event Upset Test Facility is described. Calibration of the system with the help of a-particles, essential for linear energy transfer (LET) measurements, is discussed. Measured LET values for 20 different ions, including /sup 7/Li, /sup 9/B, /sup 12/C, /sup 16/O, /sup 19/F, /sup 28/Si, /sup 32/S, /sup 35/Cl, /sup 40/Ca, /sup 45/Sc, /sup 48/Ti, /sup 56/Fe, /sup 58/Ni, /sup 63/Cu, /sup 74/Ge, /sup 79/Br, /sup 107/Ag, /sup 127/I, /sup 197/Au, and /sup 235/U, with energies between 0.5 and 8.5 MeV/AMU but not exceeding 400 MeV for the heaviest ions, are presented in both graphical and numerical forms. Results are compared to predictions of the TRIM-90 simulation program, with an average difference between the measured and calculated values of 2/spl plusmn/6%.

  • An amalgamation of hardening methods for single event upset mitigation in memory elements

    A modification of the Muller C-Element is proposed as a single event transient (SET) and single event upset (SEU) mitigation circuit. Proton tests suggests its efficiency compared to unmitigated designs.

  • Impact of Heavy Ion Energy and Nuclear Interactions on Single-Event Upset and Latchup in Integrated Circuits

    The effects of heavy ion energy and nuclear interactions on the single-event upset (SEU) and single-event latchup (SEL) response of commercial and radiation-hardened CMOS ICs are explored. Above the threshold LET for direct ionization-induced upsets, little difference is observed in single-event upset and latchup cross sections measured using low versus high energy heavy ions. However, significant differences between low- and high-energy heavy ion test results are observed below the threshold LET for single-node direct ionization-induced upsets. The data suggest that secondary particles produced by nuclear interactions play a role in determining the SEU and SEL hardness of integrated circuits, especially at low LET. The role of nuclear interactions and implications for radiation hardness assurance and rate prediction are discussed.



Standards related to Single Event Upset

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Jobs related to Single Event Upset

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