Conferences related to Digital Circuits

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2020 22nd European Conference on Power Electronics and Applications (EPE'20 ECCE Europe)

Energy conversion and conditioning technologies, power electronics, adjustable speed drives and their applications, power electronics for smarter grid, energy efficiency,technologies for sustainable energy systems, converters and power supplies


2020 IEEE 16th International Workshop on Advanced Motion Control (AMC)

AMC2020 is the 16th in a series of biennial international workshops on Advanced Motion Control which aims to bring together researchers from both academia and industry and to promote omnipresent motion control technologies and applications.


2020 IEEE Applied Power Electronics Conference and Exposition (APEC)

APEC focuses on the practical and applied aspects of the power electronics business. Not just a power designer’s conference, APEC has something of interest for anyone involved in power electronics including:- Equipment OEMs that use power supplies and converters in their equipment- Designers of power supplies, dc-dc converters, motor drives, uninterruptable power supplies, inverters and any other power electronic circuits, equipments and systems- Manufacturers and suppliers of components and assemblies used in power electronics- Manufacturing, quality and test engineers involved with power electronics equipment- Marketing, sales and anyone involved in the business of power electronic- Compliance engineers testing and qualifying power electronics equipment or equipment that uses power electronics


2020 IEEE International Electron Devices Meeting (IEDM)

the IEEE/IEDM has been the world's main forum for reporting breakthroughs in technology, design, manufacturing, physics and the modeling of semiconductors and other electronic devices. Topics range from deep submicron CMOS transistors and memories to novel displays and imagers, from compound semiconductor materials to nanotechnology devices and architectures, from micromachined devices to smart -power technologies, etc.


2020 IEEE International Solid- State Circuits Conference - (ISSCC)

ISSCC is the foremost global forum for solid-state circuits and systems-on-a-chip. The Conference offers 5 days of technical papers and educational events related to integrated circuits, including analog, digital, data converters, memory, RF, communications, imagers, medical and MEMS ICs.


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Periodicals related to Digital Circuits

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Aerospace and Electronic Systems Magazine, IEEE

The IEEE Aerospace and Electronic Systems Magazine publishes articles concerned with the various aspects of systems for space, air, ocean, or ground environments.


Applied Superconductivity, IEEE Transactions on

Contains articles on the applications and other relevant technology. Electronic applications include analog and digital circuits employing thin films and active devices such as Josephson junctions. Power applications include magnet design as well asmotors, generators, and power transmission


Biomedical Circuits and Systems, IEEE Transactions on

The Transactions on Biomedical Circuits and Systems addresses areas at the crossroads of Circuits and Systems and Life Sciences. The main emphasis is on microelectronic issues in a wide range of applications found in life sciences, physical sciences and engineering. The primary goal of the journal is to bridge the unique scientific and technical activities of the Circuits and Systems ...


Circuits and Systems for Video Technology, IEEE Transactions on

Video A/D and D/A, display technology, image analysis and processing, video signal characterization and representation, video compression techniques and signal processing, multidimensional filters and transforms, analog video signal processing, neural networks for video applications, nonlinear video signal processing, video storage and retrieval, computer vision, packet video, high-speed real-time circuits, VLSI architecture and implementation for video technology, multiprocessor systems--hardware and software-- ...


Circuits and Systems I: Regular Papers, IEEE Transactions on

Part I will now contain regular papers focusing on all matters related to fundamental theory, applications, analog and digital signal processing. Part II will report on the latest significant results across all of these topic areas.


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Most published Xplore authors for Digital Circuits

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Xplore Articles related to Digital Circuits

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The construction of sequences for identification of digital circuits using simulated annealing (SA)

2014 Information and Communication Technologies Innovation and Application (ICTIA), 2014

In this paper we propose the use of simulated annealing algorithm to solve the problems of the construction of initialization sequences for digital circuits. The proximity of this strategy with genetic algorithms allows us to use existing strengths to quickly build identification algorithms based on this approach.


Structurally synthesized multiple input BDDs for simulation of digital circuits

2009 16th IEEE International Conference on Electronics, Circuits and Systems - (ICECS 2009), 2009

Binary decision diagrams (BDD) have become the state-of-the-art data structure in VLSI CAD for representation and manipulation of Boolean Functions. For verification, fault simulation and test generation purposes structurally synthesized BDDs (SSBDD) have proved to be better suited than traditional BDDs which represent only the function but not the structure of the circuit. In this paper we present an improvement ...


Parallel Genetic Algorithm of Test Generation For Digital Circuits

2006 International Conference - Modern Problems of Radio Engineering, Telecommunications, and Computer Science, 2006

The parallel genetic algorithms are considered for problem of test generation. The different forms of parallelization of genetic algorithms are investigated for test generation.


Distributed Genetic Algorithm of Test Generation For Digital Circuits

2006 International Biennial Baltic Electronics Conference, 2006

The distributed genetic algorithms are considered for problem of test generation. The different forms of parallelization of genetic algorithms are investigated for test generation


The remote lab “Nexys 2 FPGA platform” aimed for learning design of digital circuits

2017 4th Experiment@International Conference (exp.at'17), 2017

The application of remote lab “Nexys 2 FPGA platform” for learning digital circuits design is described in this paper. The experiment requires installation of Xilinx ISE Design Suite software on students' PCs for designing digital circuits and generating .bit file. There are three ways of designing digital circuits in Xilinx ISE Design Suite software: by programming in VHDL language, by ...


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Educational Resources on Digital Circuits

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IEEE.tv Videos

Analog to Digital Types
The Josephson Effect: Josephson Digital Electronics in the Soviet Union
2017 IEEE Donald O. Pederson Award in Solid-State Circuits: Takao Nishitani and John S. Thompson
Interview with Takao Nishitani - IEEE Donald O. Pederson Award in Solid-State Circuits Co-Recipient 2017
Co-design of Power Amplifier and Dynamic Power Supplies for Radar and Communications Transmitters
Analog to Digital Traits
ASC-2014 SQUIDs 50th Anniversary: 1 of 6 Arnold Silver
Noise-Shaped Active SAR Analog-to-Digital Converter - IEEE Circuits and Systems Society (CAS) Distinguished Lecture
Superconductive Energy-Efficient Computing - ASC-2014 Plenary-series - 6 of 13 - Wednesday 2014/8/13
ON-CHIP VOLTAGE AND TIMING DIAGNOSTIC CIRCUITS
CASS Lecture "Deep-Subthreshold Operation of ADPLLs, Transmitters and ADCs"
IMS 2011-100 Years of Superconductivity (1911-2011) - Existing and Emerging RF Applications of Superconductivity
Analog Devices, Inc. accepts the IEEE Corporate Innovation Award - Honors Ceremony 2017
1.04 - 4V Digital-Intensive Dual-Mode BLE5.0/IEEE802.15.4 Transceiver SOC - N.S. Kim - RFIC 2019 Showcase
IEEE Custom Integrated Circuits Conference
Quantum Annealing: Current Status and Future Directions - Applied Superconductivity Conference 2018
Low-energy High-performance Computing based on Superconducting Technology
Voltage Metrology with Superconductive Electronics
SOC DESIGN METHODOLOGY FOR IMPROVED ROBUSTNESS
Erasing Logic-Memory Boundaries in Superconductor Electronics - Vasili Semenov: 2016 International Conference on Rebooting Computing

IEEE-USA E-Books

  • The construction of sequences for identification of digital circuits using simulated annealing (SA)

    In this paper we propose the use of simulated annealing algorithm to solve the problems of the construction of initialization sequences for digital circuits. The proximity of this strategy with genetic algorithms allows us to use existing strengths to quickly build identification algorithms based on this approach.

  • Structurally synthesized multiple input BDDs for simulation of digital circuits

    Binary decision diagrams (BDD) have become the state-of-the-art data structure in VLSI CAD for representation and manipulation of Boolean Functions. For verification, fault simulation and test generation purposes structurally synthesized BDDs (SSBDD) have proved to be better suited than traditional BDDs which represent only the function but not the structure of the circuit. In this paper we present an improvement of the SSBDD model in a form of SSBDDs with multiple inputs (SSMIBDD) which allows a significant reduction of the model complexity in the number of nodes which directly leads to decrease of the memory requirements and to increase of the speed of simulation.

  • Parallel Genetic Algorithm of Test Generation For Digital Circuits

    The parallel genetic algorithms are considered for problem of test generation. The different forms of parallelization of genetic algorithms are investigated for test generation.

  • Distributed Genetic Algorithm of Test Generation For Digital Circuits

    The distributed genetic algorithms are considered for problem of test generation. The different forms of parallelization of genetic algorithms are investigated for test generation

  • The remote lab “Nexys 2 FPGA platform” aimed for learning design of digital circuits

    The application of remote lab “Nexys 2 FPGA platform” for learning digital circuits design is described in this paper. The experiment requires installation of Xilinx ISE Design Suite software on students' PCs for designing digital circuits and generating .bit file. There are three ways of designing digital circuits in Xilinx ISE Design Suite software: by programming in VHDL language, by programming in Verilog language or by using schematic diagrams. Working environment of the remote lab consists of Digilent Nexys 2 FPGA platform that is connected with PC. Students connect with the remote lab PC through CEyeClon viewer which also needs to be installed on their PCs together with .Net Framework 4.5. Generated .bit file is loaded through Digilent Adept2 software that is installed on the remote lab PC and used for the FPGA programming. The usage of this experiment enable engineering students to achieve practical experiences and skills for designing and simulating digital circuits using FPGA and to better understand and learn theory of designing digital circuits.

  • Implementation of FPGA for decision making in portable automatic testing systems for IC's library & digital circuits

    This paper proposes a real approve design of inexpensive digital circuit testing environment that simplifies functional testing of Integrated Circuits (IC's) and digital circuits. Using this technique will lead to get the decision making if the module functions properly or not. This environment consists of the tester hardware and its corresponding software which enables both engineers and technicians to experience the challenges of testing and debugging without the expense of costly commercial hardware testers. A simple digital circuits is constructed using breadboards, wires, along with Device under Tests (DUT's), then tested using switches and Light Emitting Diodes (LED's). However, advanced digital circuits are often too complex to be tested, and debugged in this way, due to the large amount of states they may require and the larger number of input and output signals compared with simple projects. Moreover the proposed system can be used to test complex digital circuits using image analysis and pattern recognition responses from the DUT compared to the expected stored pattern. Adding to that the system is described as design and implementation of compact, small, cheap for low-power IC_TESTER and digital circuit tester. By implementation of this technique a digital IC tester sends a sequence of test vectors to a DUT, receives the actual response vectors from the DUT, and compares the responses from the DUT to the expected stored response vectors to determine and decide whether DUT is functioning properly or not. So finally we are able to get decision making.

  • Approximation of digital circuits using cartesian genetic programming

    Digital circuits can be approximated in which the exact functionality can be relaxed. Approximate circuits are constructed such that the logic given by the user is not implemented completely and hence their functionality can be traded for area, delay and power consumption. An evolutionary approach like Cartesian Genetic programming (CGP) is used in this paper to make automatic design process of digital circuits. The quality of approximate circuits can be improved along with the reduction of evolution time by using a heuristic population seeding method which is embedded into CGP. In particular, digital circuits like full adder, 2 bit multiplier and 2 bit adder are addressed in this paper. Experimental results are given where random seeding mechanism is compared with heuristic seeding methods.

  • Object oriented approach for modeling digital circuits

    Undergraduate students in computer science at the University of Brest are learning basics of digital circuits by developing their own functional and structural models. The approach is object oriented to aggregate different abstraction levels in one single structure. This paper presents how a simple combinatorial and sequential circuit can be functionally modeled and how complex circuits can be hierarchically built. The students' project consists of designing a logic simulator using the Smalltalk environment, which allows them to integrate more easily recent research made in our lab on logic synthesis and on abstract low-level tools for FPGA using the same object oriented approach.

  • Hierarchical genetic algorithm of test generation for digital circuits

    The goal of represented paper is further development of the evolutionary approach to test generation of digital circuits based on the hierarchical genetic algorithm application. Here the characteristic sequences, like synchronizing (or initialization), homing, distinguishing, unique sequences, are generated at the low level. These sequences allow to simplify test generation procedure essentially at high level. The genetic algorithms with developed problem oriented genetic operators are used at both levels.

  • Impact of soft and hard breakdown on analog and digital circuits

    The influence of gate oxide breakdown of one MOS transistor on the functionality of simple analog and digital circuits is studied. The main changes in the transistor behavior such as the additional gate current as well as transconductance and threshold voltage degradation are pointed out and their respective impact on circuit characteristics is analyzed. With this approach, it is possible to identify critical transistors during the design stage and implement appropriate countermeasures. Depending on the application, some circuits may be functional even after breakdown of one of their transistors.



Standards related to Digital Circuits

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(Replaced) IEEE Standard VHDL Language Reference Manual

his standard revises and enhances the VHDL language reference manual (LRM) by including a standard C language interface specification; specifications from previously separate, but related, standards IEEE Std 1164 -1993,1 IEEE Std 1076.2 -1996, and IEEE Std 1076.3-1997; and general language enhancements in the areas of design and verification of electronic systems.