System-on-a-chip

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System-on-a-chip or system on chip (SoC or SOC) refers to integrating all components of a computer or other electronic system into a single integrated circuit (chip). It may contain digital, analog, mixed-signal, and often radio-frequency functions – all on a single chip substrate. A typical application is in the area of embedded systems. (Wikipedia.org)






Conferences related to System-on-a-chip

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2021 IEEE/MTT-S International Microwave Symposium - IMS 2021

The IEEE MTT-S International Microwave Symposium (IMS) is the premier conference covering basic technologies, to passives and actives components to system over a wide range of frequencies including VHF, UHF, RF, microwave, millimeter-wave, terahertz, and optical. The conference will encompass the latest in RFIC, MIC, MEMS and filter technologies, advances in CAD, modeling, EM simulation, wireless systems, RFID and related topics.

  • 2029 IEEE/MTT-S International Microwave Symposium - IMS 2029

    The IEEE International Microwave Symposium (IMS) is the world s foremost conference covering the UHF, RF, wireless, microwave, millimeter-wave, terahertz, and optical frequencies; encompassing everything from basic technologies to components to systems including the latest RFIC, MIC, MEMS and filter technologies, advances in CAD, modeling, EM simulation and more. The IMS includes technical and interactive sessions, exhibits, student competitions, panels, workshops, tutorials, and networking events.

  • 2019 IEEE/MTT-S International Microwave Symposium - IMS 2019

    Comprehensive symposium on microwave theory and techniques including active and passive circuit components, theory and microwave systems.

  • 2018 IEEE/MTT-S International Microwave Symposium - IMS 2018

    Microwave theory and techniques, RF/microwave/millimeter-wave/terahertz circuit design and fabrication technology, radio/wireless communication.

  • 2017 IEEE/MTT-S International Microwave Symposium - IMS 2017

    The IEEE MTT-S International Microwave Symposium (IMS) is the premier conference covering basic technologies, to passives and actives components to system over a wide range of frequencies including VHF, UHF, RF, microwave, millimeter-wave, terahertz, and optical. The conference will encompass the latest in RFIC, MIC, MEMS and filter technologies, advances in CAD, modeling, EM simulation, wireless systems, RFID and related topics.

  • 2016 IEEE/MTT-S International Microwave Symposium - IMS 2016

    The IEEE International Microwave Symposium (IMS) is the world s foremost conference covering the UHF, RF, wireless, microwave, millimeter-wave, terahertz, and optical frequencies; encompassing everything from basic technologies to components to systems including the latest RFIC, MIC, MEMS and filter technologies, advances in CAD, modeling, EM simulation and more. The IMS includes technical and interactive sessions, exhibits, student competitions, panels, workshops, tutorials, and networking events.

  • 2015 IEEE/MTT-S International Microwave Symposium - MTT 2015

    The IEEE MTT-S International Microwave Symposium (IMS) is the premier conference covering basic technologies, to passives and actives components to system over a wide range of frequencies including VHF, UHF, RF, microwave, millimeter-wave, terahertz, and optical. The conference will encompass the latest in RFIC, MIC, MEMS and filter technologies, advances in CAD, modeling, EM simulation, wireless systems, RFID and related topics. The IMS includes technical sessions, both oral and interactive, worksh

  • 2014 IEEE/MTT-S International Microwave Symposium - MTT 2014

    IMS2014 will cover developments in microwave technology from nano devices to system applications. Technical paper sessions, interactive forums, plenary and panel sessions, workshops, short courses, industrial exhibits, and a wide array of other technical activities will be offered.

  • 2013 IEEE/MTT-S International Microwave Symposium - MTT 2013

    The IEEE MTT-S International Microwave Symposium (IMS) is the premier conference covering basic technologies, to passives and actives components to system over a wide range of frequencies including VHF, UHF, RF, microwave, millimeter -wave, terahertz, and optical. The conference will encompass the latest in RFIC, MIC, MEMS and filter technologies, advances in CAD, modeling, EM simulation, wireless systems, RFID and related topics.The IMS includes technical and interactive sessions, exhibits, student competitions, panels, workshops, tutorials, and networking events.

  • 2012 IEEE/MTT-S International Microwave Symposium - MTT 2012

    The IEEE International Microwave Symposium (IMS) is the world s foremost conference covering the UHF, RF, wireless, microwave, millimeter-wave, terahertz, and optical frequencies; encompassing everything from basic technologies to components to systems including the latest RFIC, MIC, MEMS and filter technologies, advances in CAD, modeling, EM simulation and more. The IMS includes technical and interactive sessions, exhibits, student competitions, panels, workshops, tutorials, and networking events.

  • 2011 IEEE/MTT-S International Microwave Symposium - MTT 2011

    The IEEE International Microwave Symposium (IMS) is the world s foremost conference covering the UHF, RF, wireless, microwave, millimeter-wave, terahertz, and optical frequencies; encompassing everything from basic technologies to components to systems including the latest RFIC, MIC, MEMS and filter technologies, advances in CAD, modeling, EM simulation and more. The IMS includes technical and interactive sessions, exhibits, student competitions, panels, workshops, tutorials, and networking events.

  • 2010 IEEE/MTT-S International Microwave Symposium - MTT 2010

    Reports of research and development at the state-of-the-art of the theory and techniques related to the technology and applications of devices, components, circuits, modules and systems in the RF, microwave, millimeter-wave, submillimeter-wave and Terahertz ranges of the electromagnetic spectrum.

  • 2009 IEEE/MTT-S International Microwave Symposium - MTT 2009

    The IEEE International Microwave Symposium (IMS) is the world s foremost conference covering the UHF, RF, wireless, microwave, millimeter-wave, terahertz, and optical frequencies; encompassing everything from basic technologies to components to systems including the latest RFIC, MIC, MEMS and filter technologies, advances in CAD, modeling, EM simulation and more. The IMS includes technical and interactive sessions, exhibits, student competitions, panels, workshops, tutorials, and networking events.

  • 2008 IEEE/MTT-S International Microwave Symposium - MTT 2008


2020 IEEE International Symposium on Antennas and Propagation and North American Radio Science Meeting

The joint meeting is intended to provide an international forum for the exchange of information on state of the art research in the area of antennas and propagation, electromagnetic engineering and radio science


2020 57th ACM/ESDA/IEEE Design Automation Conference (DAC)

The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2022 59th ACM/ESDA/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2021 58th ACM/ESDA/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2019 56th ACM/ESDA/IEEE Design Automation Conference (DAC)

    EDA (Electronics Design Automation) is becoming ever more important with the continuous scaling of semiconductor devices and the growing complexities of their use in circuits and systems. Demands for lower-power, higher-reliability and more agile electronic systems raise new challenges to both design and design automation of such systems. For the past five decades, the primary focus of research track at DAC has been to showcase leading-edge research and practice in tools and methodologies for the design of circuits and systems.

  • 2018 55th ACM/ESDA/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2017 54th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2016 53nd ACM/EDAC/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2015 52nd ACM/EDAC/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2014 51st ACM/EDAC/IEEE Design Automation Conference (DAC)

    DAC Description for TMRF The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading

  • 2013 50th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 session on design methodologies and EDA tool developments, keynotes, panels, plus User Track presentations. A diverse worldwide community representing more than 1,000 organization attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2012 49th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The Design Automation Conference (DAC) is the premier event for the design of electronic circuits and systems, and for EDA and silicon solutions. DAC features a wide array of technical presentations plus over 200 of the leading electronics design suppliers

  • 2011 48th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The Design Automation Conference is the world s leading technical conference and tradeshow on electronic design and design automation. DAC is where the IC Design and EDA ecosystem learns, networks, and does business.

  • 2010 47th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The Design Automation Conference (DAC) is the premier event for the design of electronic circuits and systems, and for EDA and silicon solutions. DAC features a wide array of technical presentations plus over 200 of the leading electronics design suppliers.

  • 2009 46th ACM/EDAC/IEEE Design Automation Conference (DAC)

    DAC is the premier event for the electronic design community. DAC offers the industry s most prestigious technical conference in combination with the biggest exhibition, bringing together design, design automation and manufacturing market influencers.

  • 2008 45th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The Design Automation Conference (DAC) is the premier event for the design of electronic circuits and systems, and for EDA and silicon solutions. DAC features a wide array of technical presentations plus over 250 of the leading electronics design suppliers.

  • 2007 44th ACM/IEEE Design Automation Conference (DAC)

    The Design Automation Conference (DAC) is the premier Electronic Design Automation (EDA) and silicon solution event. DAC features over 50 technical sessions covering the latest in design methodologies and EDA tool developments and an Exhibition and Demo Suite area with over 250 of the leading EDA, silicon and IP Providers.

  • 2006 43rd ACM/IEEE Design Automation Conference (DAC)

  • 2005 42nd ACM/IEEE Design Automation Conference (DAC)

  • 2004 41st ACM/IEEE Design Automation Conference (DAC)

  • 2003 40th ACM/IEEE Design Automation Conference (DAC)

  • 2002 39th ACM/IEEE Design Automation Conference (DAC)

  • 2001 38th ACM/IEEE Design Automation Conference (DAC)

  • 2000 37th ACM/IEEE Design Automation Conference (DAC)

  • 1999 36th ACM/IEEE Design Automation Conference (DAC)

  • 1998 35th ACM/IEEE Design Automation Conference (DAC)

  • 1997 34th ACM/IEEE Design Automation Conference (DAC)

  • 1996 33rd ACM/IEEE Design Automation Conference (DAC)


2020 IEEE 70th Electronic Components and Technology Conference (ECTC)

ECTC is the premier international conference sponsored by the IEEE Components, Packaging and Manufacturing Society. ECTC paper comprise a wide spectrum of topics, including 3D packaging, electronic components, materials, assembly, interconnections, device and system packaging, optoelectronics, reliability, and simulation.


2020 IEEE Applied Power Electronics Conference and Exposition (APEC)

APEC focuses on the practical and applied aspects of the power electronics business. Not just a power designer’s conference, APEC has something of interest for anyone involved in power electronics including:- Equipment OEMs that use power supplies and converters in their equipment- Designers of power supplies, dc-dc converters, motor drives, uninterruptable power supplies, inverters and any other power electronic circuits, equipments and systems- Manufacturers and suppliers of components and assemblies used in power electronics- Manufacturing, quality and test engineers involved with power electronics equipment- Marketing, sales and anyone involved in the business of power electronic- Compliance engineers testing and qualifying power electronics equipment or equipment that uses power electronics


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Periodicals related to System-on-a-chip

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Antennas and Wireless Propagation Letters, IEEE

IEEE Antennas and Wireless Propagation Letters (AWP Letters) will be devoted to the rapid electronic publication of short manuscripts in the technical areas of Antennas and Wireless Propagation.


Applied Superconductivity, IEEE Transactions on

Contains articles on the applications and other relevant technology. Electronic applications include analog and digital circuits employing thin films and active devices such as Josephson junctions. Power applications include magnet design as well asmotors, generators, and power transmission


Biomedical Circuits and Systems, IEEE Transactions on

The Transactions on Biomedical Circuits and Systems addresses areas at the crossroads of Circuits and Systems and Life Sciences. The main emphasis is on microelectronic issues in a wide range of applications found in life sciences, physical sciences and engineering. The primary goal of the journal is to bridge the unique scientific and technical activities of the Circuits and Systems ...


Biomedical Engineering, IEEE Transactions on

Broad coverage of concepts and methods of the physical and engineering sciences applied in biology and medicine, ranging from formalized mathematical theory through experimental science and technological development to practical clinical applications.


Circuits and Systems for Video Technology, IEEE Transactions on

Video A/D and D/A, display technology, image analysis and processing, video signal characterization and representation, video compression techniques and signal processing, multidimensional filters and transforms, analog video signal processing, neural networks for video applications, nonlinear video signal processing, video storage and retrieval, computer vision, packet video, high-speed real-time circuits, VLSI architecture and implementation for video technology, multiprocessor systems--hardware and software-- ...


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Most published Xplore authors for System-on-a-chip

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Xplore Articles related to System-on-a-chip

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Clock power issues in system-on-a-chip designs

Proceedings. IEEE Computer Society Workshop on VLSI '99. System Design: Towards System-on-a-Chip Paradigm, 1999

The paper investigates some issues on clock power consumption in system- on-a-chip (SoC) designs. Since clock power consumption is often the largest part of total chip power research in this area becomes urgent. In a SoC the clock depends not only on clock distribution wiring, clock driver sizing and the capability to disable part of the clock network, but also ...


Improving the System-on-a-Chip Performance for Mobile Systems by Using Efficient Bus Interface

2009 WRI International Conference on Communications and Mobile Computing, 2009

Minimizing the communication delay is one of the most important design considerations in System-on-a-Chip (SoC) design for mobile systems. In this paper, we present a bus interface design technique, called Efficient Bus Interface (EBI), to reduce the communication delay between the Intellectual Property (IP) core and the memory connected through AMBA3 AXI bus for mobile systems. Several mobile systems require ...


Logic Built-In Self-Test for Core-Based Designs on System-on-a-Chip

2008 IEEE Instrumentation and Measurement Technology Conference, 2008

System-on-a-chip (SoC) built with embedded IP cores offers attractive methodology design reuse, reconfigurability, and customizability. But integration of design-for-testability (DfT) structures of IP cores in these complex SoCs presents daunting challenges to designers and ultimately affects the time-to-market goals. In this paper, we introduce a design methodology to reduce the time-to-market by taking core test data from the design environment ...


Controlling Ground Bounce Noise in Power Gating Scheme for System-on-a-Chip

2008 IEEE Computer Society Annual Symposium on VLSI, 2008

Conventional power gating techniques for minimizing leakage currents introduce ground bounce noise during power mode transition. Here an analysis of ground bounce due to power mode transition in power gating structures is presented. An innovative power gating approach is proposed, which in addition to targeting maximum reduction of major leakage currents will provide a way to control ground bounce during ...


Advanced CMOS 'system on a chip' technology platforms-status today and outlook tomorrow

2001 6th International Conference on Solid-State and Integrated Circuit Technology. Proceedings (Cat. No.01EX443), 2001

During the last few years, there has been an increasing interest in the product community to integrate more and different features and functions on a single chip with minimum process complexity and yield impact. This 'system on a chip' integration is definitely a challenge for process technology, because all the parts have to be combined in a modular way, allowing ...


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Educational Resources on System-on-a-chip

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IEEE-USA E-Books

  • Clock power issues in system-on-a-chip designs

    The paper investigates some issues on clock power consumption in system- on-a-chip (SoC) designs. Since clock power consumption is often the largest part of total chip power research in this area becomes urgent. In a SoC the clock depends not only on clock distribution wiring, clock driver sizing and the capability to disable part of the clock network, but also on circuit design style, architectural choice and the clock rate of the IP blocks. The different IP blocks may require that multiple-frequency clocks are distributed on the chip. Our research provides a clock power model for SoC that takes into account these various factors. The impact of architectural, design, and logic style on clock power is studied using adder and register designs. In research, such characterizing information on SoC designs will be used in designing the clock network and estimating its power dissipation.

  • Improving the System-on-a-Chip Performance for Mobile Systems by Using Efficient Bus Interface

    Minimizing the communication delay is one of the most important design considerations in System-on-a-Chip (SoC) design for mobile systems. In this paper, we present a bus interface design technique, called Efficient Bus Interface (EBI), to reduce the communication delay between the Intellectual Property (IP) core and the memory connected through AMBA3 AXI bus for mobile systems. Several mobile systems require huge multimedia data in the memory to be transferred to the IP core through bus. The EBI is designed to reduce the memory access time by using double buffering, open row access, and bank interleaving. According to our simulations, the proposed EBI improves the performance of the target system by up to 49%.

  • Logic Built-In Self-Test for Core-Based Designs on System-on-a-Chip

    System-on-a-chip (SoC) built with embedded IP cores offers attractive methodology design reuse, reconfigurability, and customizability. But integration of design-for-testability (DfT) structures of IP cores in these complex SoCs presents daunting challenges to designers and ultimately affects the time-to-market goals. In this paper, we introduce a design methodology to reduce the time-to-market by taking core test data from the design environment and automatically generating DfT structures that can be easily integrated into SoC. A novel automated synthesis methodology to generate SoC built-in self- test (BIST) in order to test IP and custom logic cores with high fault coverage is proposed. The proposed technique, modified configurable 2-D LFSR, is modeled after the principle of configurable 2-D LFSR design, which generates a deterministic sequence of test vectors for random-vector- resistant faults, and then random test vectors for random- vector-detectable faults. The basis of this method is to explore the design solution space for optimal 2-D LFSR design by replacing the XOR gates used in the conventional LFSRs with simple logic gates like NOR and NAND. Moreover, the proposed approach is capable of optimizing 2-D LFSRs with consideration of don't-care bits in incompletely specified test patterns.

  • Controlling Ground Bounce Noise in Power Gating Scheme for System-on-a-Chip

    Conventional power gating techniques for minimizing leakage currents introduce ground bounce noise during power mode transition. Here an analysis of ground bounce due to power mode transition in power gating structures is presented. An innovative power gating approach is proposed, which in addition to targeting maximum reduction of major leakage currents will provide a way to control ground bounce during power mode transition. The proposed power gating technique will have an additional intermediate HOLD mode along with conventional CUTOFF and RUN modes. Its stepwise turning on feature will provide higher reduction of the magnitude of peak current and voltage glitches in the power distribution network as well as the minimum time required to stabilize power and ground as compared to other similar techniques.

  • Advanced CMOS 'system on a chip' technology platforms-status today and outlook tomorrow

    During the last few years, there has been an increasing interest in the product community to integrate more and different features and functions on a single chip with minimum process complexity and yield impact. This 'system on a chip' integration is definitely a challenge for process technology, because all the parts have to be combined in a modular way, allowing the designers to re-use the same IP in various products. A technology platform allows 'system on a chip integration' for a broad spectrum of products, but it is important to take advantage of the potential benefits of SOC with respect to performance, power and cost. This requires system knowledge as well as leading edge technology.

  • Architecture to integrate a large-scale DOPC-based optical switching system on a chip

    In this paper, we propose a four-level architecture to integrate an entire N × M × K optical switching system on a chip using wavelength selective optical switches based on digital optical phase conjugation (DOPC), where N is the number of input fibers, M the number of output fibers and K the number of wavelengths carried within each input and output fiber. We show that a strictly non-blocking 128 × 128 × 48 system might be built on a 131 mm × 67 mm chip. With a 0.8 nm channel space, such optical switching systems might be widely used for dense wavelength division multiplexing networks.

  • A 24 GHz RFID system-on-a-chip with on-chip antenna, compatible to ISO 18000-6C / EPC C1G2

    A 24 GHz RFID System-on-a-Chip (SoC) with On-Chip Antenna (OCA) is presented. Using the SHF band for RFID applications gives the opportunity of integrating such an OCA, which reduces the costs (no bonding necessary etc.) and the overall size of the tags. The presented tag is ISO 18000-6C / EPC C1G2 compatible, including all data rates and multi tag capability. To keep the costs low, a standard CMOS technology is used. With a transmit power of 20 dBm and the tag placed in front of an open-ended waveguide, it harvests enough energy to communicate with a reader, which is currently under development using inexpensive standard components.

  • Synchronization Time Calculation Improvement in System on a Chip (SoC) Products or Any Networking Products Under Transient Time Adjustment Conditions Without an Error

    In any System on a Chip (SoC) or networking communication device, residence time is calculated by subtracting the time when the message was received from the time when the message was sent. If an adjustment is made to the actual time between the time that the message arrived to before the message is sent, then this adjustment will create an error in the measured residence time. In order to prevent this error, two things can be done: make no adjustments while one or more messages that require residence time calculations are present in the local device, and recognize that an adjustment was made and provide a means to compensate for that adjustment. Not making the adjustment delays the time at which the two-clock variation is reduced, thus resulting in less accuracy, and also require that a device control and keep track of how many outstanding residence time calculations there are at any given time. Part one of this solution uses the second technique in order to maintain higher accuracy and to reduce the burden of having to keep track of the outstanding number of calculations.

  • A pyroelectric sensor for system-on-a-chip

    A pyroelectric sensor is presented in this paper which can improve the performance of microscale devices in applications where monitoring of fast temperature variations is necessary, such as in the instance of highly degradable biological substances. The proposed sensor demonstrates better performance compared to its traditional counterparts in terms of responsitivity, power supply, and flexibility that make it suitable for integration in a lab-on-a-chip platform. The temperature transducer is made of polyvinylidene-fluoride (PVDF), and features integration with a microfluidic device and the electronic readout circuits. The advantages and uniqueness of the proposed pyroelectric sensor are discussed through a theoretical analysis relating pyroelectric response to temperature variations in the millisecond range.

  • Substrate coupled noise reduction and active noise suppression circuits for mixed-signal system-on-a-chip designs

    Two novel high-bandwidth CMOS active suppression circuits are proposed to enhance conventional guard band structures. The circuits are compact and robust, and suitable for system-on-a-chip implementations. They compare favorably with previous designs. Experimental results indicated that sub- nanosecond switching noise pulses are attenuated up to 80% using our active suppression circuits.



Standards related to System-on-a-chip

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No standards are currently tagged "System-on-a-chip"