Conferences related to Radiation Hardening

Back to Top

2020 IEEE Nuclear Science Symposium and Medical Imaging Conference (NSS/MIC)

All areas of ionizing radiation detection - detectors, signal processing, analysis of results, PET development, PET results, medical imaging using ionizing radiation


2020 Optical Fiber Communications Conference and Exhibition (OFC)

The Optical Fiber Communication Conference and Exhibition (OFC) is the largest global conference and exhibition for optical communications and networking professionals. For over 40 years, OFC has drawn attendees from all corners of the globe to meet and greet, teach and learn, make connections and move business forward.OFC attracts the biggest names in the field, offers key networking and partnering opportunities, and provides insights and inspiration on the major trends and technology advances affecting the industry. From technical presentations to the latest market trends and predictions, OFC is a one-stop-shop.


2020 IEEE International Electron Devices Meeting (IEDM)

the IEEE/IEDM has been the world's main forum for reporting breakthroughs in technology, design, manufacturing, physics and the modeling of semiconductors and other electronic devices. Topics range from deep submicron CMOS transistors and memories to novel displays and imagers, from compound semiconductor materials to nanotechnology devices and architectures, from micromachined devices to smart -power technologies, etc.


2020 IEEE Photovoltaic Specialists Conference (PVSC)

Promote science and engineering of photovoltaic materials, devices, systems and applications


2019 IEEE Aerospace Conference

The international IEEE Aerospace Conference is organized to promote interdisciplinaryunderstanding of aerospace systems, their underlying science, and technology



Periodicals related to Radiation Hardening

Back to Top

Aerospace and Electronic Systems Magazine, IEEE

The IEEE Aerospace and Electronic Systems Magazine publishes articles concerned with the various aspects of systems for space, air, ocean, or ground environments.


Circuits and Systems II: Express Briefs, IEEE Transactions on

Part I will now contain regular papers focusing on all matters related to fundamental theory, applications, analog and digital signal processing. Part II will report on the latest significant results across all of these topic areas.


Computer Architecture Letters

Rigorously peer-reviewed forum for publishing early, high-impact results in the areas of uni- and multiprocessors computer systems, computer architecture workload characterization, performance evaluation and simulation techniques, and power-aware computing


Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on

Methods, algorithms, and human-machine interfaces for physical and logical design, including: planning, synthesis, partitioning, modeling, simulation, layout, verification, testing, and documentation of integrated-circuit and systems designs of all complexities. Practical applications of aids resulting in producible analog, digital, optical, or microwave integrated circuits are emphasized.


Computers, IEEE Transactions on

Design and analysis of algorithms, computer systems, and digital networks; methods for specifying, measuring, and modeling the performance of computers and computer systems; design of computer components, such as arithmetic units, data storage devices, and interface devices; design of reliable and testable digital devices and systems; computer networks and distributed computer systems; new computer organizations and architectures; applications of VLSI ...



Most published Xplore authors for Radiation Hardening

Back to Top

Xplore Articles related to Radiation Hardening

Back to Top

Radiation-Hardening Techniques for Spin Orbit Torque-MRAM Peripheral Circuitry

IEEE Transactions on Magnetics, 2018

Magnetic random access memory (MRAM) is experimentally proved intrinsically immune to radiation effects including heavy-ion irradiation and total ion dose as the data are represented by the spin instead of charges. Hence, it is considered as a promising candidate for aerospace and avionic electronics. However, its CMOS peripheral read/write circuits are much more vulnerable to radiation-induced single-event upset (SEU) and ...


Radiation Hardening by Design of a Novel Double-Node-Upset-Tolerant Latch Combined with Layout Technique

2018 IEEE International Test Conference in Asia (ITC-Asia), 2018

This paper presents a novel double-node upset (DNU) tolerant latch through radiation-hardening-by-design combined with layout technique. The latch mainly comprises 6 interlocked cross-coupled input-split inverters. Due to the special feedback rules for the internal nodes, many interlocked feedback loops are constructed in the latch and the following robustness is achieved: 1) In the case of 0 being held, the latch ...


Transistor sizing for radiation hardening

2004 IEEE International Reliability Physics Symposium. Proceedings, 2004

This paper presents an efficient and accurate numerical analysis technique to simulate single event upsets (SEUs) in logic circuits. Experimental results that show the method is accurate to within 10% of the results obtained using SPICE are provided. The proposed method is used to study the ability of a CMOS gate to tolerate SEUs as a function of injected charge ...


Proton radiation hardening of silicon oxynitride gate nMOSFETs formed by nitrogen implantation into silicon prior to oxidation

RADECS 2001. 2001 6th European Conference on Radiation and Its Effects on Components and Systems (Cat. No.01TH8605), 2001

Silicon oxynitride (SiO/sub x/N/sub y/) insulators have been obtained by low- energy nitrogen ion implantation into Si substrates prior to conventional or rapid thermal oxidation. Theses films have been used as gate insulators in enhancement nMOSFETs and MOS capacitors. MOS capacitors were used to obtain capacitance-voltage (C-V) measurements. A relative dielectric constant of 3.9 was adopted to extract the Equivalent ...


Trade-off in logical radiation hardening: Approach, mechanisms, and reliability impacts

2016 Annual Reliability and Maintainability Symposium (RAMS), 2016

In aerospace field, it is necessary to address the radiation effects to which embedded systems are especially sensitive. Besides, the reuse of existing components implies that a modification of the architecture is sometimes expected to meet the safety requirements for such critical applications. To achieve such safety level, physical radiation hardening is usually used despite its cost. However, by performing ...



Educational Resources on Radiation Hardening

Back to Top

IEEE-USA E-Books

  • Radiation-Hardening Techniques for Spin Orbit Torque-MRAM Peripheral Circuitry

    Magnetic random access memory (MRAM) is experimentally proved intrinsically immune to radiation effects including heavy-ion irradiation and total ion dose as the data are represented by the spin instead of charges. Hence, it is considered as a promising candidate for aerospace and avionic electronics. However, its CMOS peripheral read/write circuits are much more vulnerable to radiation-induced single-event upset (SEU) and double-node upset (DNU) induced by charge sharing. This paper presents a novel radiation-hardening design of the peripheral circuitry for spin orbit torque (SOT)-MRAM to address abovementioned issues effectively. Transient simulations are performed based on a physics-based SOT-magnetic tunnel junction compact model and a 65 nm CMOS design kit. Simulation results validate that the proposed hardening read/write circuits are strongly robust against SEUs and DNUs. Furthermore, the proposed hardening read circuit shows the improvement of hardware area and reliability compared with the previous works.

  • Radiation Hardening by Design of a Novel Double-Node-Upset-Tolerant Latch Combined with Layout Technique

    This paper presents a novel double-node upset (DNU) tolerant latch through radiation-hardening-by-design combined with layout technique. The latch mainly comprises 6 interlocked cross-coupled input-split inverters. Due to the special feedback rules for the internal nodes, many interlocked feedback loops are constructed in the latch and the following robustness is achieved: 1) In the case of 0 being held, the latch can self-recover from any single node upset (SNU), any DNU including double-adjacent-node upset (DANU) and double- separated-node upset (DSNU); 2) In the case of 1 being held, the latch can self-recover from any SNU, any DANU and partial DSNU. However, using layout technique, as for any DSNU-sensitive node-pair, the nodes are separated, thus the latch can avoid any DSNU. Simulation results demonstrate the robustness of the proposed latch. Besides, compared with typical existing DNU hardened latch designs, the proposed latch approximately saves 80.25% area-power-delay product on average.

  • Transistor sizing for radiation hardening

    This paper presents an efficient and accurate numerical analysis technique to simulate single event upsets (SEUs) in logic circuits. Experimental results that show the method is accurate to within 10% of the results obtained using SPICE are provided. The proposed method is used to study the ability of a CMOS gate to tolerate SEUs as a function of injected charge and transistor sizing (aspect ratio W/L). A novel radiation hardening technique to calculate the minimum transistor size required to make a CMOS gate immune to SEUs is also presented. The results agree well with SPICE simulations, while allowing for very fast analysis. The technique can be easily integrated into design automation tools to harden sensitive portions of logic circuits.

  • Proton radiation hardening of silicon oxynitride gate nMOSFETs formed by nitrogen implantation into silicon prior to oxidation

    Silicon oxynitride (SiO/sub x/N/sub y/) insulators have been obtained by low- energy nitrogen ion implantation into Si substrates prior to conventional or rapid thermal oxidation. Theses films have been used as gate insulators in enhancement nMOSFETs and MOS capacitors. MOS capacitors were used to obtain capacitance-voltage (C-V) measurements. A relative dielectric constant of 3.9 was adopted to extract the Equivalent Oxide Thickness (EOT) of films from C-V curves, resulting in values between 5 nm and 12 nm. nMOSFETs were bombarded with H/sup +/ ion beams (energy of 0.17 MeV and doses of 0, 10/sup 12/, 10/sup 13/ and 10/sup 14/ protonS/cm/sup 2/) to investigate radiation hardening. nMOSFET electrical characteristics, such as threshold voltage (V/sub T/), transconductances (Gm) and sub-threshold slope (S), were extracted before and after proton radiation. For high dose bombardment, VT, S are increased and Gm is reduced. These oxynitride gate device performance degradation was significant only for doses >10/sup 12/ protons/cm/sup 2/.

  • Trade-off in logical radiation hardening: Approach, mechanisms, and reliability impacts

    In aerospace field, it is necessary to address the radiation effects to which embedded systems are especially sensitive. Besides, the reuse of existing components implies that a modification of the architecture is sometimes expected to meet the safety requirements for such critical applications. To achieve such safety level, physical radiation hardening is usually used despite its cost. However, by performing a logical radiation hardening, it is possible to achieve the expected results while decreasing the expected cost of such an evolution. As a first step, a state of the art of existing mechanisms for logical radiation hardening is performed. These mechanisms are evaluated according a set of parameters: the type of errors they address, whether it is for purpose of detection or correction, the performance, the necessary additional physical volume, the computing time. To select the mechanisms to be used, a trade-off is performed, which depends also on the reliability analysis performed as well as the components that are concerned and on which the mechanisms are to be applied. A use case is presented and a comparison between the unprotected module and the protected module is performed. The results obtained show that the optimized selection of hardening mechanisms yields to an improvement in reliability.

  • Experimental results from performance improvement and radiation hardening of inverted metamorphic multi-junction solar cells

    Summary form only given. This paper discusses results from continued development of inverted metamorphic multi-junction (IMM) solar cells with air mass zero (AM0) conversion efficiencies greater than 34%. An experimental best four-junction IMM (IMM4J) design is presented. In an effort to improve IMM performance in space radiation environments, 1-MeV electron irradiation studies are conducted on the individual IMM4J subcells. This data is used to engineer an IMM4J structure with beginning of life (BOL) AM0 conversion efficiency of approximately 34% and an end of life (EOL) remaining factor greater than 82%, where EOL is defined as performance after exposure to 1-MeV electron irradiation at 1E15 e/cm<sup>2</sup> fluence. Next generation IMM designs are explored and an avenue toward AM0 conversion efficiencies of greater than 35% is presented.

  • The effectiveness of Rad-Pak ICs for space-radiation hardening

    Rad-Pak IC packages with radiation shields as an integral part of their structure have been designed and manufactured. Two styles were designed and fabricated assuming a fission-enhanced orbit: a 68 lead chip carrier designed to shield to the bremsstrahlung limit, and a 22 lead chip carrier providing forty-fold dose reduction. The accuracy of the computer models developed to design these packages was experimentally verified by irradiating dosimeters and functional ICs with 2-MeV electrons. The durability of the packages was demonstrated by testing samples of both designs to the test methods of MIL- STD-883C. There were no failures. The electrical and thermal characteristics of the Rad-Pak design were compared to those of standard IC packages of similar design. The shields were found to have only a slight effect on the electrical characteristics and to significantly improve the thermal properties of the Rad-Pak demonstration packages. Rad-Pak counterparts of some VHSIC packages have been designed. Computer studies of the efficiency of Rad-Pak packages as shields against ionizing radiation in space environments indicate weight savings as high as 80% over box shielding schemes.<<ETX>>

  • Radiation hardening of commercial CMOS processes through minimally invasive techniques

    UTMC Microelectronic Systems has developed two minimally invasive radiation tolerant modules (RTMs) to harden a commercial CMOS process. The RTMs were successfully inserted into three commercial foundries. The results of UTMC's hardening effort clearly demonstrate that a total dose hardness of between 100 to 500 krad (SiO/sub 2/) can be achieved on a commercial CMOS process without significantly altering the commercial flow. This hardness level is from an initial set of experiments. Response factors from this first set of experiments have been identified which, when fully optimized, may increase the final total dose hardness level significantly.

  • Radiation hardening of advanced fiber optic systems for space missile and avionic applications

    We describe performance testing results of a quad transceiver module developed for harsh environment applications. This 850 nm VCSEL-based transceiver operates over 4 independent transmit and receive channels using multi-mode fiber. We present characterization of performance and built-in-test (BIT) features over temperature as well as initial Total Dose and Single Event Upset radiation data.

  • The avenue of FDSOI radiation hardening

    Advanced FDSOI technology has inherent resistance to transient ionizing radiation effects and better Single Event Effect (SEE) tolerance. In the meantime, total dose hardening is now the biggest challenging for the cutting- edge FDSOI technology. Three TID hardening techniques are discussed in this paper. The effects of buried oxide modification, device structure innovation and biased Double SOI methods are shown and compared in detail. This discussion describes the most promising avenue to radiation hardened FDSOI devices and circuits.



Standards related to Radiation Hardening

Back to Top

No standards are currently tagged "Radiation Hardening"