Conferences related to eFuse

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2020 IEEE International Reliability Physics Symposium (IRPS)

Meeting of academia and research professionals to discuss reliability challenges


2020 IEEE International Solid- State Circuits Conference - (ISSCC)

ISSCC is the foremost global forum for solid-state circuits and systems-on-a-chip. The Conference offers 5 days of technical papers and educational events related to integrated circuits, including analog, digital, data converters, memory, RF, communications, imagers, medical and MEMS ICs.


2019 IEEE Custom Integrated Circuits Conference (CICC)

Conference with technical sessions, educational sessions, panel discussions and forums.


2019 IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC)

EDSSC provides as a multidisciplinary forum for the exchange of ideas, research results, and industry experience in the broad areas of electron devices and solid state circuits and systems. The technical program includes invited talks by famous scientists and contributed papers.


2018 IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)

IPFA 2018 is devoted to the fundamental understanding of the electrical and physical characterization techniques and associated technologies that assist in probing the nature of wear-out and failure in conventional and new CMOS devices, in turn resulting in improved knowhow of the physics of device / circuit / module failure that serves as critical input for future design for reliability.


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Periodicals related to eFuse

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Device and Materials Reliability, IEEE Transactions on

Provides leading edge information that is critical to the creation of reliable electronic devices and materials, and a focus for interdisciplinary communication in the state of the art of reliability of electronic devices, and the materials used in their manufacture. It focuses on the reliability of electronic, optical, and magnetic devices, and microsystems; the materials and processes used in the ...


Electron Device Letters, IEEE

Publishes original and significant contributions relating to the theory, design, performance and reliability of electron devices, including optoelectronic devices, nanoscale devices, solid-state devices, integrated electronic devices, energy sources, power devices, displays, sensors, electro-mechanical devices, quantum devices and electron tubes.


Solid-State Circuits, IEEE Journal of

The IEEE Journal of Solid-State Circuits publishes papers each month in the broad area of solid-state circuits with particular emphasis on transistor-level design of integrated circuits. It also provides coverage of topics such as device modeling, technology, systems design, layout, and testing that relate directly to IC design. Integrated circuits and VLSI are of principal interest; material related to discrete ...


Spectrum, IEEE

IEEE Spectrum Magazine, the flagship publication of the IEEE, explores the development, applications and implications of new technologies. It anticipates trends in engineering, science, and technology, and provides a forum for understanding, discussion and leadership in these areas. IEEE Spectrum is the world's leading engineering and scientific magazine. Read by over 300,000 engineers worldwide, Spectrum provides international coverage of all ...



Most published Xplore authors for eFuse

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Xplore Articles related to eFuse

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eFuse based IC authentication architecture

2016 International SoC Design Conference (ISOCC), 2016

In the era of IoT (Internet of Things), more devices now frequently carry confidential data. At the same time, the risk of invasive attacks also increases. Hence, the security against these attacks has become more critical. In this paper, we propose eFuse-based authentication logic. This logic generates a unique value of each IC using eFuse trimming information. In the authentication ...


eFuse Design and Reliability

2008 IEEE International Integrated Reliability Workshop Final Report, 2008

Summary form only given. Programmable eFuse designs present an integration challenge in modern CMOS processing. The power level to program a fuse, and the programming methodologies leverage reliability mechanisms which all other elements in a design avoid. A high degree of eFuse process control and circuit design is required in order to guarantee operation. Almost all eFuse types are one ...


A Tag based solution for efficient utilization of efuse for memory repair

2014 International Test Conference, 2014

Efuse or FuseROMs play a major role in embedded memory BIST and repair flows. The trend of increasing demand for SRAMs in SoCs for graphics, DSP and application processors have resulted in the need for more efuses on die to repair these memories. Efuse bit cell is comparatively large in size and does not scale well at lower technology nodes, ...


Design of an eFuse OTP memory of 8 bits based on a 0.35µm BCD process

International Conference on Mobile IT Convergence, 2011

In this paper, we design an 8-bit eFuse OTP (one-time programmable) memory based on a BCD process using differential paired eFuse cells which can sense BL data without a reference voltage and also have smaller sensing resistances of programmed eFuse links. Also, we implement a sensing margin test circuit with variable pull-up loads in consideration of variations of the programmed ...


A Compact eFUSE Programmable Array Memory for SOI CMOS

2007 IEEE Symposium on VLSI Circuits, 2007

Demonstrating a >10X density increase over traditional VLSI fuse circuits, a compact eFUSE programmable array memory configured as a 4 Kb one-time programmable ROM (OTPROM) is presented using a 6.2μm2NiSixsilicide electromigration 1T1R cell in 65nm SOI CMOS. A 20μs programming time at 1.5V is achieved by asymmetrical scaling of the fuse and a shared differential sensing scheme. Having zero process ...


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Educational Resources on eFuse

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IEEE.tv Videos

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IEEE-USA E-Books

  • eFuse based IC authentication architecture

    In the era of IoT (Internet of Things), more devices now frequently carry confidential data. At the same time, the risk of invasive attacks also increases. Hence, the security against these attacks has become more critical. In this paper, we propose eFuse-based authentication logic. This logic generates a unique value of each IC using eFuse trimming information. In the authentication process, the unique value is used to distinguish authentic ICs from copied ones. Since the eFuse trimming information resides in ICs, the proposed method can be implemented with lightweight architectures. Experimental results in 0.13-um technology show that the proposed method can reliably authenticate ICs in various operating conditions.

  • eFuse Design and Reliability

    Summary form only given. Programmable eFuse designs present an integration challenge in modern CMOS processing. The power level to program a fuse, and the programming methodologies leverage reliability mechanisms which all other elements in a design avoid. A high degree of eFuse process control and circuit design is required in order to guarantee operation. Almost all eFuse types are one time programmable and are limited to "one chance" programmable. This tutorial discussed selected eFuse technologies describing the design philosophy electrical programming and characterization, the physics of failure, and some of the many applications an on chip programmable element provides.

  • A Tag based solution for efficient utilization of efuse for memory repair

    Efuse or FuseROMs play a major role in embedded memory BIST and repair flows. The trend of increasing demand for SRAMs in SoCs for graphics, DSP and application processors have resulted in the need for more efuses on die to repair these memories. Efuse bit cell is comparatively large in size and does not scale well at lower technology nodes, thus becoming a floor plan nightmare. All these factors call for an efficient use of available efuses. This paper describes the implementation of an efuse compression scheme that identifies repair registers by tags and allocates efuse to only the repair registers that need a repair code. Linked list based data structure was utilized for storing and retrieving repair codes from the FuseROM. This implementation was designed with the goal of achieving good compression when using incremental repair. Analysis indicate compression ratio as high as 88.5% and a max improvement of 35% over RLE based compression schemes with logic overhead of ~10K gates.

  • Design of an eFuse OTP memory of 8 bits based on a 0.35µm BCD process

    In this paper, we design an 8-bit eFuse OTP (one-time programmable) memory based on a BCD process using differential paired eFuse cells which can sense BL data without a reference voltage and also have smaller sensing resistances of programmed eFuse links. Also, we implement a sensing margin test circuit with variable pull-up loads in consideration of variations of the programmed eFuse resistances. The layout size of the designed 8-bit eFuse OTP memory IP is 142μm × 380.725μm.

  • A Compact eFUSE Programmable Array Memory for SOI CMOS

    Demonstrating a >10X density increase over traditional VLSI fuse circuits, a compact eFUSE programmable array memory configured as a 4 Kb one-time programmable ROM (OTPROM) is presented using a 6.2μm2NiSixsilicide electromigration 1T1R cell in 65nm SOI CMOS. A 20μs programming time at 1.5V is achieved by asymmetrical scaling of the fuse and a shared differential sensing scheme. Having zero process cost adder, eFUSE is fully compatible with standard VLSI manufacturing.

  • A Commercial Field-Programmable Dense eFUSE Array Memory with 99.999% Sense Yield for 45nm SOI CMOS

    This paper describes a second-generation one-time programmable read-only memory (OTPROM) that provides these features through a balanced bitline, resistor pull-up, differential sense amp with a programmable reference.

  • eFuse Design and Reliability

    None

  • Electrically programmable fuse (eFUSE) using electromigration in silicides

    For the first time we describe a positive application of electromigration, as an electrically programmable fuse device (eFUSE). Upon programming, eFUSE's show a large increase in resistance that enable easy sensing. The transient device characteristics show that the eFUSE stays in a low resistance state during programming due to the local heating of the fuse link. The programming is enhanced by a device design that uses a large cathode which increases the temperature gradient and minimizes the effect of microstructural variations.

  • Characterization of Silicided Polysilicon Fuse Implemented in 65nm Logic CMOS Technology

    NiSi electrically programmable fuses (eFUSE) were fabricated and investigated using 65 nm logic CMOS technology. The optimization of fuse program was achieved by analyzing electrical and physical responses of fuse bits for various conditions. Controlled electromigration of Ni during fuse program was identified as a key factor in achieving reliably high post-program fuse resistance.

  • Electrically Programmable Fuse (eFUSE): From Memory Redundancy to Autonomic Chips

    Electrical fuse (eFUSE) has become a popular choice to enable memory redundancy, chip identification and authentication, analog device trimming, and other applications. We will review the evolution and applications of electrical fuse solutions for 180 nm to 45 nm technologies at IBM, and provide some insight into future uses in 32 nm technology and beyond with the eFUSE as a building block for the autonomic chip of the future.



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