IEEE Organizations related to Biochips

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Conferences related to Biochips

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2021 IEEE International Conference on Mechatronics (ICM)

CM focuses on recent developments and future prospects related to the synergetic integration of mechanics, electronics, and information processing.


2020 42nd Annual International Conference of the IEEE Engineering in Medicine & Biology Society (EMBC)

The conference program will consist of plenary lectures, symposia, workshops and invitedsessions of the latest significant findings and developments in all the major fields of biomedical engineering.Submitted papers will be peer reviewed. Accepted high quality papers will be presented in oral and postersessions, will appear in the Conference Proceedings and will be indexed in PubMed/MEDLINE


2020 57th ACM/ESDA/IEEE Design Automation Conference (DAC)

The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2022 59th ACM/ESDA/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2021 58th ACM/ESDA/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2019 56th ACM/ESDA/IEEE Design Automation Conference (DAC)

    EDA (Electronics Design Automation) is becoming ever more important with the continuous scaling of semiconductor devices and the growing complexities of their use in circuits and systems. Demands for lower-power, higher-reliability and more agile electronic systems raise new challenges to both design and design automation of such systems. For the past five decades, the primary focus of research track at DAC has been to showcase leading-edge research and practice in tools and methodologies for the design of circuits and systems.

  • 2018 55th ACM/ESDA/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2017 54th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2016 53nd ACM/EDAC/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2015 52nd ACM/EDAC/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2014 51st ACM/EDAC/IEEE Design Automation Conference (DAC)

    DAC Description for TMRF The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading

  • 2013 50th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 session on design methodologies and EDA tool developments, keynotes, panels, plus User Track presentations. A diverse worldwide community representing more than 1,000 organization attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2012 49th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The Design Automation Conference (DAC) is the premier event for the design of electronic circuits and systems, and for EDA and silicon solutions. DAC features a wide array of technical presentations plus over 200 of the leading electronics design suppliers

  • 2011 48th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The Design Automation Conference is the world s leading technical conference and tradeshow on electronic design and design automation. DAC is where the IC Design and EDA ecosystem learns, networks, and does business.

  • 2010 47th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The Design Automation Conference (DAC) is the premier event for the design of electronic circuits and systems, and for EDA and silicon solutions. DAC features a wide array of technical presentations plus over 200 of the leading electronics design suppliers.

  • 2009 46th ACM/EDAC/IEEE Design Automation Conference (DAC)

    DAC is the premier event for the electronic design community. DAC offers the industry s most prestigious technical conference in combination with the biggest exhibition, bringing together design, design automation and manufacturing market influencers.

  • 2008 45th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The Design Automation Conference (DAC) is the premier event for the design of electronic circuits and systems, and for EDA and silicon solutions. DAC features a wide array of technical presentations plus over 250 of the leading electronics design suppliers.

  • 2007 44th ACM/IEEE Design Automation Conference (DAC)

    The Design Automation Conference (DAC) is the premier Electronic Design Automation (EDA) and silicon solution event. DAC features over 50 technical sessions covering the latest in design methodologies and EDA tool developments and an Exhibition and Demo Suite area with over 250 of the leading EDA, silicon and IP Providers.

  • 2006 43rd ACM/IEEE Design Automation Conference (DAC)

  • 2005 42nd ACM/IEEE Design Automation Conference (DAC)

  • 2004 41st ACM/IEEE Design Automation Conference (DAC)

  • 2003 40th ACM/IEEE Design Automation Conference (DAC)

  • 2002 39th ACM/IEEE Design Automation Conference (DAC)

  • 2001 38th ACM/IEEE Design Automation Conference (DAC)

  • 2000 37th ACM/IEEE Design Automation Conference (DAC)

  • 1999 36th ACM/IEEE Design Automation Conference (DAC)

  • 1998 35th ACM/IEEE Design Automation Conference (DAC)

  • 1997 34th ACM/IEEE Design Automation Conference (DAC)

  • 1996 33rd ACM/IEEE Design Automation Conference (DAC)


2020 IEEE International Electron Devices Meeting (IEDM)

the IEEE/IEDM has been the world's main forum for reporting breakthroughs in technology, design, manufacturing, physics and the modeling of semiconductors and other electronic devices. Topics range from deep submicron CMOS transistors and memories to novel displays and imagers, from compound semiconductor materials to nanotechnology devices and architectures, from micromachined devices to smart -power technologies, etc.


2020 IEEE International Symposium on Circuits and Systems (ISCAS)

The International Symposium on Circuits and Systems (ISCAS) is the flagship conference of the IEEE Circuits and Systems (CAS) Society and the world’s premier networking and exchange forum for researchers in the highly active fields of theory, design and implementation of circuits and systems. ISCAS2020 focuses on the deployment of CASS knowledge towards Society Grand Challenges and highlights the strong foundation in methodology and the integration of multidisciplinary approaches which are the distinctive features of CAS contributions. The worldwide CAS community is exploiting such CASS knowledge to change the way in which devices and circuits are understood, optimized, and leveraged in a variety of systems and applications.


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Periodicals related to Biochips

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Xplore Articles related to Biochips

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Smartphone-Based Cancer Detection Platform Based on Plasmonic Interferometer Array Biochips

2019 Conference on Lasers and Electro-Optics (CLEO), 2019

We develop a nanoplasmonic interferometer imaging system based on intensity modulation to detect circulating exosomal proteins in real-time with high sensitivity and low cost to enable the early detection of cancer. © 2019 The Author(s).


A medical mini-me one day your doctor could prescribe drugs based on now a biochip version of you reacts

IEEE Spectrum, 2019

You've fallen ill, but neither you nor your doctor know which treatment will work. Which would you rather do-try five different drugs, one at a time, until you find one that treats your illness without serious side effects, or take one drug that's guaranteed to work? You'd opt for that one drug, of course.


Fault Localization in Programmable Microfluidic Devices

2019 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2019

Programmable Microfluidic Devices (PMDs) have revolutionized the traditional biochemical experiment flow. Test algorithms for PMDs have recently been proposed. Test patterns can be generated algorithmically. But an algorithm for fault localization once some faults have been identified is not yet available. When testing a PMD, once a test pattern fails it is unknown where the stuck valve is located. The ...


Module Placement under Completion-Time Uncertainty in Micro-Electrode-Dot-Array Digital Microfluidic Biochips

IEEE Transactions on Multi-Scale Computing Systems, 2018

Digital microfluidic biochips (DMFBs) are an emerging technology that are replacing traditional laboratory procedures. With the integrated functions which are necessary for biochemical experiments, DMFBs are able to achieve automatic experiments. Recently, DMFBs based on a new architecture called micro-electrode-dot-array (MEDA) have been demonstrated. Compared with conventional DMFBs which sensors are specifically located, each microelectrode is integrated with a sensor ...


Physical Synthesis of Flow-Based Microfluidic Biochips Considering Distributed Channel Storage

2019 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2019

Flow-based microfluidic biochips (FBMBs) have attracted much attention over the past decade. On such a micrometer-scale platform, various biochemical applications, also called bioas-says, can be processed concurrently and automatically. To improve execution efficiency and reduce fabrication cost, a distributed channel-storage architecture (DCSA) can be implemented on this platform, where fluid samples can be cached temporarily in flow channels close to ...


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Educational Resources on Biochips

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IEEE.tv Videos

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IEEE-USA E-Books

  • Smartphone-Based Cancer Detection Platform Based on Plasmonic Interferometer Array Biochips

    We develop a nanoplasmonic interferometer imaging system based on intensity modulation to detect circulating exosomal proteins in real-time with high sensitivity and low cost to enable the early detection of cancer. © 2019 The Author(s).

  • A medical mini-me one day your doctor could prescribe drugs based on now a biochip version of you reacts

    You've fallen ill, but neither you nor your doctor know which treatment will work. Which would you rather do-try five different drugs, one at a time, until you find one that treats your illness without serious side effects, or take one drug that's guaranteed to work? You'd opt for that one drug, of course.

  • Fault Localization in Programmable Microfluidic Devices

    Programmable Microfluidic Devices (PMDs) have revolutionized the traditional biochemical experiment flow. Test algorithms for PMDs have recently been proposed. Test patterns can be generated algorithmically. But an algorithm for fault localization once some faults have been identified is not yet available. When testing a PMD, once a test pattern fails it is unknown where the stuck valve is located. The stuck valve can be any one valve out of many valves forming the test pattern. In this paper, we propose an effective algorithm for the localization of stuck-at-0 faults and stuck-at-1 faults in a PMD. The stuck valve is localized either exactly or within a very small set of candidate valves. Once the locations of faulty valves are known, it becomes possible to continue to use the PMD by resynthesizing the application.

  • Module Placement under Completion-Time Uncertainty in Micro-Electrode-Dot-Array Digital Microfluidic Biochips

    Digital microfluidic biochips (DMFBs) are an emerging technology that are replacing traditional laboratory procedures. With the integrated functions which are necessary for biochemical experiments, DMFBs are able to achieve automatic experiments. Recently, DMFBs based on a new architecture called micro-electrode-dot-array (MEDA) have been demonstrated. Compared with conventional DMFBs which sensors are specifically located, each microelectrode is integrated with a sensor on MEDA-based biochips. Benefiting from the advantage of MEDA-based biochips, real-time reaction-outcome detection is attainable. However, to the best of our knowledge, synthesis algorithms proposed in the literature for MEDA-based biochips do not fully utilize the real-time detection since completion-time uncertainties have not yet been considered. During the execution of a biochemical experiment, operations may finish earlier or delay due to variability and randomness in biochemical reactions. Such uncertainties also have effects when allocating modules for each fluidic operation and placing them on a biochip since a biochip with a fixed size area restricts the number and the size of these modules. Thus, in this paper, we proposed the first operation-variation-aware placement algorithm that fully utilizes the real-time detection since completion-time uncertainties have been considered. Simulation results demonstrate that with the proposed approach, it leads to reduced time-to-result and minimizes the chip size while not exceeding completion time compared to the benchmarks.

  • Physical Synthesis of Flow-Based Microfluidic Biochips Considering Distributed Channel Storage

    Flow-based microfluidic biochips (FBMBs) have attracted much attention over the past decade. On such a micrometer-scale platform, various biochemical applications, also called bioas-says, can be processed concurrently and automatically. To improve execution efficiency and reduce fabrication cost, a distributed channel-storage architecture (DCSA) can be implemented on this platform, where fluid samples can be cached temporarily in flow channels close to components. Although DCSA can improve the execution efficiency of FBMBs significantly, it requires a careful arrangement of fluid samples to enable the channels to fulfill the dual functions of transportation and caching. In this paper, we formulate the first flow-layer physical design problem considering DCSA, and propose a top-down synthesis algorithm to generate efficient solutions considering execution efficiency, washing, and resource usage simultaneously. Experimental results demonstrate that the proposed algorithm leads to a shorter execution time, less flow-channel length, and a higher efficiency of on-chip resource utilization for biochemical applications compared with a direct approach to incorporate distributed storage into existing frameworks.

  • Desieve the Attacker: Thwarting IP Theft in Sieve-Valve-based Biochips

    Researchers develop bioassays following rigorous experimentation in the lab that involves considerable fiscal and highly-skilled-person-hour investment. Previous work shows that a bioassay implementation can be reverse engineered by using images or video and control signals of the biochip. Hence, techniques must be devised to protect the intellectual property (IP) rights of the bioassay developer. This study is the first step in this direction and it makes the following contributions: (1) it introduces use of a sieve-valve as a security primitive to obfuscate bioassay implementations; (2) it shows how sieve-valves can be used to obscure biochip building blocks such as multiplexers and mixers; (3) it presents design rules and security metrics to design and measure obfuscated biochips. We assess the cost-security trade-offs associated with this solution and demonstrate practical sieve-valve based obfuscation on real-life biochips.

  • Structural and Behavioural Facets of Digital Microfluidic Biochips with Hexagonal-Electrode-Based Array

    In recent times, digital microfluidic biochips have received an appreciable recognition as one of the most promising platforms for lab-on-a-chip attainment. Such a compound system can replace most of the laboratory experiments by controlling nano-litre or micro-litre volume of droplets and yield more accurate and faster results depending upon electrowetting on dielectric (EWOD) principle. Being aware of the fact about the progress of traditional square electrode biochips in the digital microfluidic realm, here in this paper, we present two-dimensional regular hexagonal digital microfluidic electrode (HDMFB) array. A hexagonal chip array offers numerous advantages over a square array like droplet movement, mixing operation, speed, etc. To cope with this new design technique care should be taken for fluidic constraints and electrode constraints to ensure safe droplet routing. Here, we propose an algorithm for efficient control pin assignment on the chip such that no droplet interference on the chip array occurs during an assay operation. Moreover, a multiplexed assay operation is performed by a scheduling algorithm, and the result is compared with a previous work conducted on the conventional square electrode array. Finally, a comparative study is done on the proposed architecture and the existing one on some relevant issues.

  • A New Fluid-Chip Co-Design for Digital Microfluidic Biochips Considering Cost Drivers and Design Convergence

    The design process for digital microfluidic biochips (DMFBs) is becoming more complex due to the growing need for essential bio-protocols. A number of significant fluid- and chip-level synthesis tools have been offered previously for designing an efficient system. Several important cost drivers like bioassay schedule length, total pin count, congestion-free wiring, total wire length, and total layer count together measure the efficiency of the DMFBs. Besides, existing design gaps among the sub-tasks of the fluid and chip level make the design process expensive delaying the time-to-market and increasing the overall cost. In this context, removal of design cycles among the sub- tasks is a prior need to obtain a low-cost and efficient platform. Hence, this paper aims to propose a fluid-chip co-design methodology in dealing with the consideration of the fluid-chip cost drivers, while reducing the design cycles in between. A simulation study considering a number of benchmarks has been presented to observe the performance.

  • Supply-Chain Security of Digital Microfluidic Biochips

    Digital microfluidic biochips (DMFBs) implement novel protocols for highly sensitive and specific biomolecular recognition. However, attackers can exploit supply-chain vulnerabilities to pirate DMFBs' proprietary protocols or modify their results, with serious consequences for laboratory analysis, healthcare, and biotechnology innovation.

  • Security Assessment of Microfluidic Fully-Programmable-Valve-Array Biochips

    The fully-programmable-valve-array (FPVA) is a general-purpose programmable flow-based microfluidic platform, akin to the VLSI field-programmable gate array (FPGA). FPVAs are dynamically reconfigurable and hence are suitable in a broad spectrum of applications involving immunoassays and cell analysis. Since these applications are safety-critical, addressing security concerns is vital for the success and adoption of FPVAs. This study evaluates the security of FPVA biochips. We show that FPVAs are vulnerable to malicious operations similar to digital and flow-based microfluidic biochips. FPVAs are further prone to new classes of attacks - tunneling and deliberate aging. The study establishes security metrics and describes possible attacks on real-life bioassays.



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