Transistor Noise Models
Transistor noise models are mathematical representations of noise sources within transistors that extend compact device models to capture thermal, flicker, shot, and induced gate noise as frequency-dependent spectral densities, enabling circuit noise prediction.
What Are Transistor Noise Models?
Transistor noise models are mathematical representations of the noise sources within transistors, formulated to allow circuit simulators and noise analysis tools to predict circuit noise performance from device parameters. Where compact device models (such as BSIM) describe a transistor's current-voltage relationships, noise models extend those descriptions to include stochastic fluctuations, capturing thermal noise, flicker noise, shot noise, and induced gate noise as frequency-dependent current and voltage noise spectral densities. Accurate noise models are essential for the design of low-noise amplifiers, oscillators, and precision analog circuits, where a few tenths of a decibel in noise figure can determine whether a circuit meets its specification.
Transistor noise models draw on a combination of semiconductor device physics, measurements on fabricated devices, and empirical fitting. Foundries provide noise model parameters as part of their process design kits (PDKs), calibrated to measurements at the specific process node.
MOSFET Noise Models
The foundational theoretical framework for MOSFET noise was developed by A. van der Ziel in the 1960s, who identified the conducting channel as a distributed thermal noise source and derived expressions for drain current noise and induced gate noise. Modern compact MOSFET noise models build on this framework while adding terms for short-channel effects and flicker noise. A physics-based MOSFET noise model for circuit simulators incorporates channel thermal noise with a bias-dependent excess noise parameter, reflecting that short-channel MOSFETs generate more noise per unit transconductance than their long-channel counterparts due to hot-carrier effects.
Induced gate noise, arising from capacitive coupling of channel thermal fluctuations to the gate electrode, becomes significant at radio frequencies. It is partially correlated with the drain noise current, and capturing this correlation is necessary to correctly predict the minimum noise figure (NFmin) and optimum source resistance of an RF transistor. Analytical modeling of MOSFET noise parameters for analog and RF applications provides closed-form expressions for the four noise parameters (NFmin, equivalent noise resistance Rn, and optimum source admittance) as explicit functions of device geometry and bias, enabling rapid noise parameter prediction without full numerical simulation.
BJT Noise Models
Bipolar junction transistor noise models include three principal sources: shot noise on the base and collector currents, thermal noise from the physical base resistance, and flicker (1/f) noise associated with carrier recombination at surface defects. The Gummel-Poon compact model and its extended successors incorporate these noise sources through additive current noise generators at the junctions and a voltage noise source in series with the base terminal.
BJTs typically exhibit lower 1/f corner frequencies than MOSFETs, which makes bipolar noise models particularly important in audio, instrumentation, and precise reference applications where low-frequency noise directly degrades offset, drift, and dynamic range.
Noise Parameter Extraction
Transistor noise model parameters are extracted from measurements. For RF applications, a noise figure meter combined with a vector network analyzer provides the four measured noise parameters across frequency and bias, from which the model coefficients are fitted. The extraction method for MOSFET noise model parameters from RF noise figure measurements demonstrates how scattering parameter data and noise figure measurements at multiple frequencies and bias points can be combined to extract the key noise coefficients for deep-submicron devices.
Noise model extraction is performed on dedicated test structures, including devices with different channel lengths and widths, to separate geometry-dependent scaling from process-dependent parameters.
Applications
Transistor noise models have applications in a wide range of disciplines, including:
- Low-noise amplifier design for wireless front ends and satellite receivers
- Oscillator phase noise simulation
- Precision instrumentation front-end design
- Process technology characterization and comparison
- Monte Carlo noise yield analysis for analog integrated circuits