What Are Semiconductor Impurities?

Semiconductor impurities are foreign atoms introduced into a semiconductor crystal, either intentionally through doping to control electrical conductivity, or unintentionally as contaminants that degrade device performance. In their intrinsic state, semiconductors such as silicon or gallium arsenide carry equal concentrations of electrons and holes and exhibit moderate electrical resistivity. Adding impurities at controlled concentrations, typically between 10 to the 14th and 10 to the 21st atoms per cubic centimeter, shifts the balance between electrons and holes and determines whether a region behaves as n-type or p-type semiconductor. This ability to define conductivity type and magnitude with spatial precision over distances as small as a few nanometers is the foundation of every transistor, diode, and integrated circuit.

Impurity physics draws on solid-state chemistry, statistical mechanics, and quantum mechanics. The behavior of dopants as electron donors or acceptors, the processes by which they are ionized at room temperature, and their interactions with other defects and with charge carriers are all subjects of active study.

Dopant Impurities and Charge Carrier Processes

Donor impurities occupy substitutional sites in the semiconductor lattice and contribute an extra electron to the conduction band. In silicon, group V elements such as phosphorus, arsenic, and antimony serve as donors, each contributing one loosely bound electron with an ionization energy of roughly 45 meV, small enough that nearly all donors are ionized at room temperature. Acceptor impurities, typically group III elements such as boron and aluminum in silicon, each lack one electron relative to silicon and accept an electron from the valence band, generating a hole.

The University of Colorado ECEE course notes on extrinsic semiconductors provide a quantitative framework for calculating electron and hole concentrations as functions of temperature and doping density. The carrier concentrations set by intentional doping govern junction formation, threshold voltage in MOSFETs, current gain in bipolar transistors, and series resistance in ohmic contacts. In compensation doping, both donors and acceptors are present simultaneously, and only the net dopant species, the difference between their concentrations, contributes to the free carrier density.

Charge carrier processes affected by impurities include ionized impurity scattering, which reduces carrier mobility at high doping densities, and carrier recombination at deep-level traps, which limits minority carrier lifetime. Transition metal contaminants such as iron and copper introduce energy levels near mid-gap that act as very efficient recombination centers.

Plasma Immersion Ion Implantation

The principal technique for introducing dopants into silicon with spatial control is ion implantation, in which dopant ions are accelerated to energies of a few keV to several hundred keV and directed into the wafer surface. Conventional beamline implantation handles one wafer at a time and provides excellent dose and energy control. As device dimensions shrank into the deep-submicron regime, forming the very shallow source-drain junctions required by CMOS scaling demanded ion energies below one keV, which is difficult to deliver efficiently through beamline systems.

Plasma immersion ion implantation (PIII) addresses this by immersing the wafer directly in a plasma and applying high-voltage pulses that draw ions from the plasma and implant them at energies determined by the pulse voltage. A PIII process for low-cost semiconductor doping documented through the US Department of Energy describes how energies as low as 20 eV can be achieved, enabling ultra-shallow junctions below 50 nanometers in depth. Research on plasma immersion ion implantation for shallow junctions in silicon establishes junction depths from 120 to 200 nanometers with sheet resistivities compatible with ULSI circuit requirements.

Applications

Semiconductor impurities and doping have applications in a wide range of fields, including:

• Source and drain formation in CMOS transistors during integrated circuit fabrication
• Threshold voltage adjustment in MOSFET devices through channel doping
• Emitter and base doping in silicon and silicon-germanium bipolar transistors
• Ohmic contact formation in power devices and compound semiconductors
• Radiation detector fabrication requiring long carrier lifetimes in high-purity material