What Is Radiation Hardened?

Radiation hardened refers to the design philosophy, manufacturing processes, and testing methodologies used to produce electronic components and systems capable of operating reliably in high-radiation environments without unacceptable degradation in performance. The term encompasses both the total accumulated dose effects that gradually shift transistor characteristics over a mission lifetime and the transient single event effects caused when a single energetic particle deposits enough charge to flip a bit or trigger a destructive latch condition. Components described as radiation hardened have been qualified against defined radiation dose and particle flux specifications and are used in spacecraft, military systems, nuclear power plant instrumentation, and high-energy physics detectors.

The need for radiation hardening arises because standard commercial silicon processes are optimized for performance and yield in benign operating environments. In space, galactic cosmic rays, protons trapped in the Van Allen belts, and solar energetic particle events continuously bombard onboard electronics. Alpha particles emitted by trace radioactive contaminants in packaging materials can cause single event upsets even at ground level in sensitive memories. Nuclear radiation effects from reactor neutrons and gamma fields degrade bipolar transistors and optoelectronics in reactor instrumentation. Each threat mechanism calls for a different hardening strategy.

Radiation Hardening by Design

Radiation hardening by design (RHBD) applies structural and topological changes within a standard fabrication process to reduce sensitivity to radiation effects. At the physical layout level, enclosed layout transistors (ELTs) prevent the parasitic leakage paths along transistor edges that total ionizing dose creates in MOS devices, and guard rings around NMOS transistors suppress single event latchup by interrupting the parasitic thyristor path. At the circuit level, resistive decoupling is inserted at sensitive storage node connections to slow the charge collection transient, reducing the probability that it flips a latch. A 2020 IEEE Xplore paper on RHBD approaches applied to an 8051 microcontroller demonstrates how these techniques can be applied within standard cell design flows without requiring a specialized radiation-hardened foundry.

Architecture Redundancy and Error Correction

System-level redundancy is a powerful mitigation strategy for single event upsets in memories and logic. Triple modular redundancy (TMR) replicates a logic function three times and takes a majority vote of the outputs, tolerating a single-node upset without error propagation. Error-correcting codes (ECC) in memory arrays detect and correct single-bit errors and detect multi-bit errors, with Hamming and Reed-Solomon codes being common choices. Scrubbing, the periodic re-writing of configuration memory in FPGAs from a known-good copy stored in radiation-tolerant nonvolatile memory, removes accumulated bit flips before they cascade. Nonvolatile memory technologies such as phase change memory (PCM) and eFuse arrays are incorporated as storage for configuration data and trim parameters precisely because their state is not susceptible to charge-induced upsets in the way that SRAM-based storage is. The MRS Bulletin review of total ionizing dose and displacement damage in microelectronics provides the device physics context for understanding why these memory technologies behave differently under radiation.

Process and Material Approaches

Radiation-hardened-by-process (RHBP) technologies use modified fabrication steps or substrate choices to inherently resist radiation damage. Silicon-on-insulator (SOI) substrates dramatically reduce the volume of silicon available for charge collection, suppressing both single event latchup and some total ionizing dose effects. Oxide growth conditions and gate insulator thickness are controlled to minimize trapped charge buildup. Bipolar processes tuned for radiation tolerance use carefully optimized base doping and emitter geometries to reduce the dose-enhanced low-dose-rate sensitivity (ELDRS) that afflicts many standard linear bipolar circuits in space. NASA's Jet Propulsion Laboratory electronics reliability resource for radiation effects in space covers the device physics behind these process-level choices and their effectiveness against cosmic event particle spectra.

Applications

Radiation hardened electronics have applications in a wide range of fields, including:

• Spacecraft and satellite bus electronics for low-Earth and geosynchronous orbits
• Deep-space probe avionics operating beyond the magnetosphere
• Military systems in nuclear or high-altitude electromagnetic environments
• Nuclear power plant digital safety system instrumentation
• High-energy physics detector front-end electronics at accelerators such as CERN