What Is Gettering?

Gettering is a semiconductor process engineering technique used to remove metallic impurities from the active device regions of a silicon wafer by attracting and trapping them at designated sites away from where transistors and other circuit elements will be formed. Trace metal contaminants introduced during crystal growth or wafer handling degrade device performance by creating recombination centers that reduce minority carrier lifetime and increase leakage current. Gettering processes counteract this by establishing preferential trapping zones, typically in the wafer bulk or on its backside surface.

The technique became essential as very-large-scale integration (VLSI) progressed into the 1980s, when shrinking device geometries made circuits increasingly sensitive to contaminants that would have been tolerable at larger feature sizes. Elements such as iron, copper, and nickel are among the most damaging mobile impurities in silicon, and their concentrations at part-per-billion levels can measurably reduce transistor yield.

Intrinsic Gettering

Intrinsic gettering, also called internal gettering, exploits the supersaturated oxygen naturally present in Czochralski-grown silicon wafers. During a carefully designed thermal treatment, the excess interstitial oxygen precipitates out of solution in the wafer bulk, forming silicon dioxide particles surrounded by regions of crystal strain. These precipitates and the associated dislocation networks serve as energetically favorable trapping sites for metallic atoms, which diffuse through the lattice and accumulate in the bulk zone rather than in the near-surface device layer. A characteristic feature of intrinsic gettering is the formation of a denuded zone, a relatively impurity-free region at the wafer surface, achieved by driving off near-surface oxygen at high temperature before precipitating the bulk oxygen at lower temperature. Research published in PMC examining proximity gettering for CMOS image sensors illustrates how this principle has been refined to meet the contamination requirements of modern image sensor fabrication.

Extrinsic Gettering

Extrinsic gettering relies on deliberately introduced mechanical damage or chemical sinks on the wafer backside to create impurity traps that are physically separate from the device face. Common methods include abrasion of the backside surface to generate dislocations, laser scribing, ion implantation of phosphorus or carbon into the backside, and polysilicon deposition. Each method introduces crystal defects or chemical binding sites that attract metallic atoms by providing lower-energy configurations than the undisturbed silicon lattice. Because the trapping sites are on the wafer backside, separated from active devices by the full wafer thickness, the risk of contaminant re-release into the device region during subsequent high-temperature steps is minimized. The NIST fabrication technology documentation and industry references describe backside extrinsic gettering as standard practice in production CMOS processes.

Process Integration and Semiconductor Device Manufacture

Gettering is not a standalone step but is integrated with the overall thermal budget and implant sequence of a device process. Foundries must balance the temperatures and durations used to establish gettering sinks against the diffusion of dopants already placed in the device structure. Advanced processes for CMOS image sensors have adopted proximity gettering, in which a gettering layer is placed close to the active imaging region rather than deep in the bulk, allowing faster impurity capture within the tight thermal budgets of modern processes. The IEEE Xplore library contains substantial conference and journal literature on gettering effectiveness, defect characterization, and integration strategies.

Applications

Gettering has applications in a wide range of semiconductor processes, including:

• CMOS image sensor fabrication, where dark current defects caused by metallic contamination must be minimized
• VLSI and ULSI logic device manufacturing
• Power semiconductor processing, where minority carrier lifetime affects switching efficiency
• Solar cell silicon wafer preparation to improve photovoltaic conversion efficiency