Frequency locked loops

What Are Frequency Locked Loops?

Frequency locked loops (FLLs) are feedback control circuits that automatically adjust a variable-frequency oscillator until its output frequency matches that of a reference signal. Unlike a phase-locked loop (PLL), which drives both the frequency and the phase of the controlled oscillator to track the reference, an FLL controls only the frequency. This narrower objective makes the FLL simpler in some respects, gives it a wider acquisition range, and makes it tolerant of sudden phase discontinuities that would disrupt a phase-locked loop.

FLLs appear in synchronization systems, frequency synthesizers, and signal demodulators wherever frequency alignment is required but precise phase locking is either unnecessary or would be too fragile to maintain under the conditions of the application.

Operating Principle

An FLL consists of a voltage-controlled oscillator (VCO) or numerically controlled oscillator (NCO), a frequency discriminator, a loop filter, and a feedback path connecting the discriminator output back to the oscillator's control input. The frequency discriminator compares the oscillator output to the reference and generates an error signal proportional to the frequency difference. This error signal is filtered to suppress noise and then fed to the oscillator, reducing the frequency offset.

In digital implementations, the frequency discriminator is typically realized by measuring the rate of phase accumulation. If the phase difference between the reference and the VCO is increasing, the VCO is running too slow; if it is decreasing, the VCO is running too fast. The magnitude of the rate of change is a direct measure of frequency error. The Wireless Pi tutorial on FLL operation describes how this frequency error signal is computed in discrete-time receivers and used to drive the oscillator correction.

Acquisition and Tracking

An FLL acquires lock more rapidly and over a wider frequency offset range than an equivalent PLL. Because the FLL does not require phase alignment, it can reduce a large initial frequency error to within the loop's operating range without the cycle-slip behavior that limits PLL acquisition. This property is valuable in applications where the initial frequency offset is unknown or large, such as the carrier acquisition step of a satellite receiver that must search over a Doppler shift window of several kilohertz.

Once the frequency error is small, the loop operates in its tracking mode, where the loop filter bandwidth determines the tradeoff between noise suppression and the ability to follow dynamic frequency changes. Narrow bandwidth reduces phase noise in the controlled oscillator but slows the response to rapid frequency variations. FLL performance in power system synchronization applications is analyzed in the IEEE Xplore paper on FLLs in power and energy systems, which shows that FLLs and PLLs converge to similar behavior under steady-state conditions but differ substantially in their transient responses to grid disturbances.

Relation to Phase-Locked Loops and Frequency Synthesizers

PLLs and FLLs are often used together in a two-mode architecture. An FLL operates during initial acquisition, when the frequency offset is too large for a PLL to lock reliably. Once the FLL has pulled the oscillator within the PLL's lock range, control is transferred to the PLL, which achieves precise phase alignment and the low phase noise required for coherent demodulation. This handoff strategy combines the FLL's fast acquisition with the PLL's steady-state phase accuracy.

In frequency synthesizers, FLLs can serve as a coarse-tuning stage to speed up frequency switching before a PLL takes over. In IEEE 1588 precision timing systems, FLL-based implementations have been compared to PLL-based ones for clock recovery over packet networks.

Applications

Frequency locked loops have applications in a wide range of fields, including: