What Are FeFETs?

FeFETs are ferroelectric field-effect transistors, a class of semiconductor device in which a ferroelectric material replaces the conventional gate dielectric of a standard metal-oxide-semiconductor field-effect transistor. Because ferroelectric materials retain polarization after an applied voltage is removed, a FeFET can store a binary logic state without continuous power. This nonvolatile memory behavior, combined with a transistor geometry that integrates naturally into standard complementary metal-oxide-semiconductor (CMOS) fabrication flows, has made FeFETs a subject of substantial research interest for embedded memory and neuromorphic computing.

The concept of using ferroelectric gates in transistors was proposed in the 1950s, but practical fabrication was limited by the incompatibility of early ferroelectric perovskites with silicon processing. The situation changed after the discovery of ferroelectricity in hafnium oxide (HfO2) and its alloys around 2011, which provided a material fully compatible with advanced CMOS nodes and capable of ferroelectric behavior at thicknesses below 10 nm.

Ferroelectric Gate Stack

The defining element of a FeFET is its gate stack, which contains a ferroelectric layer, often hafnium zirconium oxide (HZO) or silicon-doped HfO2, between the gate electrode and the semiconductor channel. Applying a positive or negative gate pulse above the coercive field switches the polarization of the ferroelectric layer, shifting the threshold voltage of the transistor between two stable states. Reading the stored state requires only a small read voltage, typically below the coercive field, so the stored data is preserved. Hafnium oxide-based FeFETs have demonstrated write voltages below 5 V and switching times below 10 ns, as documented in research published through AIP Applied Physics Reviews.

Memory Array Architectures

A single FeFET can serve as a 1T memory cell, eliminating the separate storage capacitor required by conventional 1T1C ferroelectric random-access memory (FeRAM). This simplification reduces cell area and makes FeFETs attractive for embedded nonvolatile memory in microcontrollers and system-on-chip designs. Multilevel cell operation, in which the threshold voltage can be set to more than two stable states, has been demonstrated by ramping write pulse amplitude or by using laminated ferroelectric stacks; this approach increases the information density per device. Work on 1T FeFET memory arrays and their feasibility has been documented in IEEE Xplore research on FeFET array design.

Neuromorphic and In-Memory Computing

Beyond binary storage, the analog polarization states of FeFETs make them suitable as synaptic weights in neural network hardware. A FeFET can be programmed to intermediate threshold voltages by applying pulses of varying amplitude or number, mimicking the gradual potentiation and depression of a biological synapse. This behavior has been exploited in crossbar arrays intended to perform matrix-vector multiplication in hardware, reducing the energy cost of inference workloads that would otherwise require large data transfers between a processor and a memory module. Research on FeFET-based computing-in-memory circuits has been reviewed in MDPI Nanomaterials, which covers unit circuit design and hardware neural network mapping.

Applications

FeFETs have applications in a wide range of disciplines, including:

• Embedded nonvolatile memory for microcontrollers and IoT edge devices
• Storage-class memory bridging the gap between DRAM speed and flash density
• Neuromorphic computing hardware implementing synaptic weight storage
• Low-power AI inference accelerators using in-memory matrix operations
• Flexible and transparent electronics using non-silicon channel materials