What Are Electron Traps?

Electron traps are localized electronic states within the energy gap of a semiconductor or insulator that can capture and hold electrons for a period of time before releasing them. These states arise from structural imperfections in the crystal lattice, including vacancies, interstitial atoms, dislocations, and impurity atoms whose energy levels fall deep within the forbidden band rather than close to the conduction or valence band edge. Because a deeply trapped electron is effectively removed from electrical conduction for a time that can range from microseconds to years, electron traps degrade carrier lifetime, reduce minority-carrier diffusion lengths, and contribute to leakage currents and threshold voltage instability in semiconductor devices. Understanding and controlling trap densities is a central concern in the design of transistors, memory cells, and photovoltaic devices.

The distinction between shallow and deep traps reflects the energy required to thermally re-emit the captured carrier. Shallow traps lie within a few kT of a band edge and release their carriers readily at room temperature; deep traps require substantially more thermal energy and can hold carriers long enough to act as recombination centers.

Deep-Level Trap States and Carrier Recombination

Deep-level electron traps occupy energy positions well within the semiconductor band gap, typically more than 0.2 eV from either band edge. When an electron is captured at such a trap, it may subsequently capture a hole from the valence band, resulting in non-radiative recombination through the Shockley-Read-Hall (SRH) mechanism. This process is particularly harmful in solar cells, where it reduces open-circuit voltage and minority-carrier collection efficiency, and in bipolar and high-voltage power devices, where it shortens carrier lifetime and increases switching losses. In dynamic random-access memory (DRAM), trap-mediated leakage currents shorten the data retention time of storage capacitors, requiring more frequent refresh cycles. The ScienceDirect overview of deep-level transient spectroscopy describes how the concentration, energy level, and capture cross-section of these traps directly set leakage current and minority-carrier lifetime in a given device.

Common sources of deep electron traps include gold, platinum, and transition metals in silicon, which are sometimes intentionally introduced to reduce carrier lifetime in fast-switching power diodes. In III-V semiconductors such as gallium arsenide, native point defects such as the EL2 defect, an arsenic antisite, create prominent midgap trap levels that affect both bulk transport and surface passivation quality.

Trap Characterization Techniques

The primary tool for characterizing deep electron traps in semiconductors is deep-level transient spectroscopy (DLTS), a technique introduced by David Lang in 1974. In DLTS, the capacitance of a Schottky or p-n junction diode is monitored as a function of temperature after a brief voltage pulse fills the traps with carriers. As the temperature rises, each trap level emits its carriers at a characteristic rate, producing a transient in the junction capacitance. The peak temperature and magnitude of each transient yield the trap's activation energy, concentration, and capture cross-section. The IntechOpen chapter on DLTS in photovoltaic materials illustrates how the technique is applied to identify and quantify trap distributions in solar cell absorber layers. Complementary techniques include thermally stimulated current (TSC) measurements and admittance spectroscopy, the latter being well suited to thin-film and organic semiconductor structures where junction geometries differ from conventional diodes.

Interface traps at the oxide-semiconductor boundary in metal-oxide-semiconductor (MOS) devices are a distinct class of electron traps characterized by their continuous energy distribution within the gap. The OSTI article on injection deep-level transient spectroscopy covers methods for measuring trap capture rates in these high-field environments.

Applications

Electron traps are relevant in a wide range of device contexts, including:

• Reliability and leakage current analysis in MOSFET and HEMT power devices
• Data retention in flash memory, where charge trapping in the gate dielectric stores information
• Minority-carrier lifetime engineering in fast-switching rectifiers and bipolar power transistors
• Efficiency loss analysis in silicon and III-V solar cells
• Radiation damage assessment in space-qualified semiconductor components