Drain avalanche hot carrier injection
What Is Drain Avalanche Hot Carrier Injection?
Drain avalanche hot carrier injection (DAHC injection) is a reliability degradation mechanism in n-channel MOSFETs in which carriers generated by impact ionization near the drain are accelerated to energies far above the thermal equilibrium value and then injected into the gate oxide, causing permanent changes to device parameters over time. The mechanism is distinct from other hot-carrier injection modes because it relies first on avalanche multiplication: when the drain voltage significantly exceeds the gate voltage, the high electric field in the drain depletion region initiates impact ionization, producing electron-hole pairs. Holes accelerated toward the substrate generate a substrate current, while a fraction of the hot electrons and hot holes reach sufficient energy to surmount the silicon-oxide energy barrier and become trapped in the oxide or at the silicon-oxide interface.
DAHC injection became a primary reliability concern as CMOS technology scaled below the 1 micrometer gate length node in the 1980s, because shorter gate lengths require higher drain fields to maintain drive current, directly increasing the severity of the mechanism. The field draws on semiconductor device physics, solid-state quantum mechanics, and semiconductor process engineering. The foundational work on hot-carrier degradation in submicron MOSFETs was published in IEE Proceedings in 1983, and the TU Wien doctoral research on hot-carrier degradation mechanisms provides a thorough review of the carrier heating models and injection rates used in modern reliability simulation.
Physical Mechanism
In normal MOSFET operation, the drain is biased at a positive voltage to attract electrons flowing from source to drain. When the drain bias is high relative to the gate bias, the gate does not fully control the channel near the drain, and the depletion region at the drain junction widens. The electric field at the peak of this depletion region can exceed 10^6 V/cm in submicron devices, which is sufficient to cause impact ionization: a carrier gains enough kinetic energy between collisions to ionize a lattice atom, creating a secondary electron-hole pair. This avalanche process multiplies the carrier population and generates substrate current proportional to the ionization rate.
Hot holes produced in the drain avalanche plasma drift toward the surface under the influence of the oxide field and are injected into the gate oxide, creating oxide-trapped positive charge near the drain. Hot electrons simultaneously injected create interface states and negative oxide charge. Both types of trapped charge alter the local threshold voltage and transconductance in the degraded region, even though the degraded zone extends only a few tens of nanometers from the drain edge. The IEEE Xplore paper on hot-hole injection and the small degraded channel region documents how hole injection governs interface state creation in this regime.
Device Parameter Degradation
The accumulated interface states and oxide charge cause measurable shifts in the MOSFET's threshold voltage, linear transconductance, and drain saturation current. Because the degraded region is concentrated near the drain, the degradation signature in n-channel devices typically includes a decrease in drive current and transconductance with relatively modest threshold voltage shift, distinguishing DAHC degradation from other injection modes that produce stronger threshold shifts. In p-channel devices operating under the same bias polarity, the mechanism is reversed: hot electrons from electron-impact ionization dominate, producing different degradation rates and spatial distributions.
Reliability Assessment and Mitigation
Accelerated stress testing under elevated drain voltage and reduced gate voltage, combined with lifetime extrapolation models based on substrate current, is the standard method for qualifying MOSFET designs against DAHC injection lifetime targets. Process modifications such as lightly doped drain (LDD) implants reduce the peak electric field at the drain by spreading the depletion region over a larger distance, substantially lowering the substrate current and DAHC injection rate. Tektronix application notes on evaluating hot-carrier-induced degradation describe the measurement procedures and fixture requirements used in production reliability qualification.
Applications
Drain avalanche hot carrier injection is relevant to a range of disciplines, including:
- Long-term reliability prediction for CMOS logic and analog circuits
- Lightly doped drain process optimization in sub-100 nm MOSFET fabrication
- Radiation-hardened circuit design for space and defense applications
- High-voltage LDMOS transistors used in RF power amplifiers
- Automotive-grade IC qualification under extended temperature and voltage stress