What Is CMOS?

CMOS, or Complementary Metal-Oxide-Semiconductor, is a semiconductor technology that builds integrated circuit functions by pairing n-channel and p-channel field-effect transistors on the same substrate. The NIST definition of CMOS describes it as a family of logic and memory circuits distinguished by its use of complementary transistor pairs that conduct only during switching transitions, drawing negligible static current. This property made CMOS the dominant fabrication technology for digital logic, microprocessors, memory, and mixed-signal circuits from the 1980s onward, displacing earlier bipolar and NMOS-only processes that consumed far more standby power.

The technology traces its origins to work at Fairchild Semiconductor in the 1960s and was developed into a practical manufacturing platform through the 1970s. Today it underlies virtually every digital chip in production, from microcontrollers in household appliances to processors in data centers, and its continued scaling follows the trajectory described by Moore's Law.

Device Physics and Circuit Operation

A CMOS gate consists of a pull-up network built from p-channel MOSFETs and a complementary pull-down network from n-channel MOSFETs. When the input is high, the n-channel transistors conduct and the p-channel transistors turn off, pulling the output to the low supply rail. When the input is low, the complementary arrangement reverses, pulling the output high. Because one or the other network is always in a high-impedance state during steady logic levels, the path from supply to ground is interrupted and static current is suppressed. Dynamic power consumption, proportional to capacitance times switching frequency times voltage squared, dominates over leakage at nominal operating conditions, which is why reducing supply voltage has been a central objective in every successive CMOS process generation. Transistor models in CMOS technology document the BSIM and PSP compact models used in circuit simulation to predict transistor behavior across process, voltage, and temperature corners.

Fabrication and Process Generations

CMOS integrated circuits are fabricated through planar photolithographic processes that define transistor features in layers of silicon, polysilicon, silicon dioxide, and metal interconnect on a silicon wafer. The minimum feature size, historically characterized by the process node, has shrunk from micrometers in the 1970s to a few nanometers in current production nodes. Each generation requires advances in lithography, including deep ultraviolet and extreme ultraviolet exposure tools, as well as new materials such as high-k dielectrics to replace silicon dioxide gate oxides that become too leaky when thinned below about 1.2 nm. Shallow trench isolation replaces older local oxidation of silicon (LOCOS) in sub-100 nm nodes to suppress parasitic leakage between adjacent transistors. The NIST program on technology and metrology of new electronic materials tracks measurement challenges arising at each new process generation.

Scaling and Power Challenges

As transistor gate lengths have fallen below 10 nm, classical Dennard scaling, which predicted that power density would remain constant as transistors shrank, has broken down. Short-channel effects, including drain-induced barrier lowering and velocity saturation, require circuit designers to manage performance-power tradeoffs that earlier generations could ignore. Subthreshold leakage current, once negligible, now accounts for a substantial fraction of total power in dense logic arrays. Responses include multi-gate architectures such as FinFETs and gate-all-around nanosheets, which improve electrostatic control of the channel, and dynamic voltage-frequency scaling, which adjusts operating conditions to match computational workload.

Applications

CMOS technology has applications in a wide range of fields, including:

• Microprocessors and system-on-chip designs for computing and mobile devices
• Static and dynamic random-access memory in computers and embedded systems
• Image sensors in cameras and medical imaging equipment
• Radio-frequency front ends in wireless communication transceivers
• Biosensors and lab-on-chip platforms in medical diagnostics