Conferences related to Emerging Memory Technologies

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2023 Annual International Conference of the IEEE Engineering in Medicine & Biology Conference (EMBC)

The conference program will consist of plenary lectures, symposia, workshops and invitedsessions of the latest significant findings and developments in all the major fields of biomedical engineering.Submitted full papers will be peer reviewed. Accepted high quality papers will be presented in oral and poster sessions,will appear in the Conference Proceedings and will be indexed in PubMed/MEDLINE.


2020 57th ACM/ESDA/IEEE Design Automation Conference (DAC)

The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2022 59th ACM/ESDA/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2021 58th ACM/ESDA/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2019 56th ACM/ESDA/IEEE Design Automation Conference (DAC)

    EDA (Electronics Design Automation) is becoming ever more important with the continuous scaling of semiconductor devices and the growing complexities of their use in circuits and systems. Demands for lower-power, higher-reliability and more agile electronic systems raise new challenges to both design and design automation of such systems. For the past five decades, the primary focus of research track at DAC has been to showcase leading-edge research and practice in tools and methodologies for the design of circuits and systems.

  • 2018 55th ACM/ESDA/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2017 54th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2016 53nd ACM/EDAC/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2015 52nd ACM/EDAC/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2014 51st ACM/EDAC/IEEE Design Automation Conference (DAC)

    DAC Description for TMRF The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading

  • 2013 50th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 session on design methodologies and EDA tool developments, keynotes, panels, plus User Track presentations. A diverse worldwide community representing more than 1,000 organization attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2012 49th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The Design Automation Conference (DAC) is the premier event for the design of electronic circuits and systems, and for EDA and silicon solutions. DAC features a wide array of technical presentations plus over 200 of the leading electronics design suppliers

  • 2011 48th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The Design Automation Conference is the world s leading technical conference and tradeshow on electronic design and design automation. DAC is where the IC Design and EDA ecosystem learns, networks, and does business.

  • 2010 47th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The Design Automation Conference (DAC) is the premier event for the design of electronic circuits and systems, and for EDA and silicon solutions. DAC features a wide array of technical presentations plus over 200 of the leading electronics design suppliers.

  • 2009 46th ACM/EDAC/IEEE Design Automation Conference (DAC)

    DAC is the premier event for the electronic design community. DAC offers the industry s most prestigious technical conference in combination with the biggest exhibition, bringing together design, design automation and manufacturing market influencers.

  • 2008 45th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The Design Automation Conference (DAC) is the premier event for the design of electronic circuits and systems, and for EDA and silicon solutions. DAC features a wide array of technical presentations plus over 250 of the leading electronics design suppliers.

  • 2007 44th ACM/IEEE Design Automation Conference (DAC)

    The Design Automation Conference (DAC) is the premier Electronic Design Automation (EDA) and silicon solution event. DAC features over 50 technical sessions covering the latest in design methodologies and EDA tool developments and an Exhibition and Demo Suite area with over 250 of the leading EDA, silicon and IP Providers.

  • 2006 43rd ACM/IEEE Design Automation Conference (DAC)

  • 2005 42nd ACM/IEEE Design Automation Conference (DAC)

  • 2004 41st ACM/IEEE Design Automation Conference (DAC)

  • 2003 40th ACM/IEEE Design Automation Conference (DAC)

  • 2002 39th ACM/IEEE Design Automation Conference (DAC)

  • 2001 38th ACM/IEEE Design Automation Conference (DAC)

  • 2000 37th ACM/IEEE Design Automation Conference (DAC)

  • 1999 36th ACM/IEEE Design Automation Conference (DAC)

  • 1998 35th ACM/IEEE Design Automation Conference (DAC)

  • 1997 34th ACM/IEEE Design Automation Conference (DAC)

  • 1996 33rd ACM/IEEE Design Automation Conference (DAC)


2020 IEEE 70th Electronic Components and Technology Conference (ECTC)

ECTC is the premier international conference sponsored by the IEEE Components, Packaging and Manufacturing Society. ECTC paper comprise a wide spectrum of topics, including 3D packaging, electronic components, materials, assembly, interconnections, device and system packaging, optoelectronics, reliability, and simulation.


2020 IEEE International Conference on Image Processing (ICIP)

The International Conference on Image Processing (ICIP), sponsored by the IEEE SignalProcessing Society, is the premier forum for the presentation of technological advances andresearch results in the fields of theoretical, experimental, and applied image and videoprocessing. ICIP 2020, the 27th in the series that has been held annually since 1994, bringstogether leading engineers and scientists in image and video processing from around the world.


2020 IEEE International Electron Devices Meeting (IEDM)

the IEEE/IEDM has been the world's main forum for reporting breakthroughs in technology, design, manufacturing, physics and the modeling of semiconductors and other electronic devices. Topics range from deep submicron CMOS transistors and memories to novel displays and imagers, from compound semiconductor materials to nanotechnology devices and architectures, from micromachined devices to smart -power technologies, etc.


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Periodicals related to Emerging Memory Technologies

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Applied Superconductivity, IEEE Transactions on

Contains articles on the applications and other relevant technology. Electronic applications include analog and digital circuits employing thin films and active devices such as Josephson junctions. Power applications include magnet design as well asmotors, generators, and power transmission


Circuits and Systems II: Express Briefs, IEEE Transactions on

Part I will now contain regular papers focusing on all matters related to fundamental theory, applications, analog and digital signal processing. Part II will report on the latest significant results across all of these topic areas.


Communications Magazine, IEEE

IEEE Communications Magazine was the number three most-cited journal in telecommunications and the number eighteen cited journal in electrical and electronics engineering in 2004, according to the annual Journal Citation Report (2004 edition) published by the Institute for Scientific Information. Read more at http://www.ieee.org/products/citations.html. This magazine covers all areas of communications such as lightwave telecommunications, high-speed data communications, personal communications ...


Communications Surveys & Tutorials, IEEE

Each tutorial reviews currents communications topics in network management and computer and wireless communications. Available tutorials, which are 2.5 to 5 hours in length contains the original visuals and voice-over by the presenter. IEEE Communications Surveys & Tutorials features two distinct types of articles: original articles and reprints. The original articles are exclusively written for IEEE Communications Surveys & Tutorials ...


Communications, IEEE Transactions on

Telephone, telegraphy, facsimile, and point-to-point television, by electromagnetic propagation, including radio; wire; aerial, underground, coaxial, and submarine cables; waveguides, communication satellites, and lasers; in marine, aeronautical, space and fixed station services; repeaters, radio relaying, signal storage, and regeneration; telecommunication error detection and correction; multiplexing and carrier techniques; communication switching systems; data communications; and communication theory. In addition to the above, ...


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Most published Xplore authors for Emerging Memory Technologies

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Xplore Articles related to Emerging Memory Technologies

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Engineering crossbar based emerging memory technologies

2012 IEEE 30th International Conference on Computer Design (ICCD), 2012

Emerging Resistive Random Access Memories (RRAM) devices are an attractive option for future memory architectures due to their low-power and high density. However, their capacity is limited by sneak paths and the sensitivity of the sense amplifiers (SA). We develop a framework to maximize the capacity of RRAM memories by modeling the interactions between memory capacity, sneak paths, device parameters, ...


Emerging memory technologies: Challenges and opportunities

Proceedings of Technical Program of 2012 VLSI Technology, System and Application, 2012

In this paper, the evolution, limits and challenges of charge-storage Silicon Non Volatile Memory technologies are presented, with a special attention for 3D architectures. Then, new resistive memory technologies are introduced. Main principles, challenges and opportunities are discussed. In particular, an overview of our recent research work on phase change memory (PCM) and metal oxide resistive switching memory (OxRRAM) will ...


Emerging memory technologies for high density applications

2017 47th European Solid-State Device Research Conference (ESSDERC), 2017

Comparison of most mature and promising emerging memory technologies respect to mainstream NAND and DRAM and challenges for the introduction in the market for high density applications.


Interconnect roles for emerging memory technologies in 3D architecture

2016 IEEE International Interconnect Technology Conference / Advanced Metallization Conference (IITC/AMC), 2016

Summary form only given. Emerging memory integration into 3D architecture has the potential to overcome current memory shortfalls in speed, power consumption, reliability and cost vectors for the future data centric computing. Intensive investment has been placed in various cell structures (PCRAM, STTRAM, OxRAM and CBRAM) and 3D architectures (3D XPoint, 3D ReRAM) recently to capture the future commercial IoT ...


Embedded tutorial - Emerging memory technologies: What it means for computer system designers

2013 26th International Conference on VLSI Design and 2013 12th International Conference on Embedded Systems, 2013

Summary form only given. As conventional memory technologies such as DRAM run into the scaling wall, architects and system designers are forced to look at alternative technologies for building future computer systems. Several emerging Non-Volatile Memory (NVM) technologies such as PCM, STT-RAM, and Memristors have the potential to boost memory capacity in a scalable and power-efficient manner. However, these technologies ...


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Educational Resources on Emerging Memory Technologies

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IEEE.tv Videos

Rajiv V. Joshi - 2018 Daniel E. Noble Award for Emerging Technologies at IEEE ISSCC
The Memory of Cars Talk by Tom Coughlin
Mary Lynne Nielsen: Standards and Emerging Technologies - Studio Tech Talks: Sections Congress 2017
IRDS: Beyond CMOS & Emerging Research Materials - Shamik Das at INC 2019
Sri Chandrasekaren: Standards and Emerging Technologies - Studio Tech Talks: Sections Congress 2017
Towards Logic-in-Memory circuits using 3D-integrated Nanomagnetic Logic - Fabrizio Riente: 2016 International Conference on Rebooting Computing
Ted Berger: Far Futures Panel - Technologies for Increasing Human Memory - TTM 2018
IMS 2014 Enabling Technologies and Architectures for 5G Wireless
MicroApps: Implications of Emerging Technologies on Power Amplifer Manufacturing Test Speed (Agilent Technologies)
IRDS: Lithography - Mark Neisser at INC 2019
A Conversation with... Wendell Wallach: IEEE TechEthics
Rebooting Computing Panel - Stan Williams: 2016 Technology Time Machine
A Flexible Testbed for 5G Waveform Generation and Analysis: MicroApps 2015 - Keysight Technologies
Jaynie Shorb from Broadcom at WIE ILC 2016
Approaches towards energy-efficiency in the cloud for emerging markets
MicroApps: Memory Effect Enhancements for X-Parameter Models in ADS (Agilent Technologies)
Quantum Photonic Networks for Computing and Simulation - Plenary Speaker: Ian Walmsley - IPC 2018
Computer-Assisted Audiovisual Language Learning
Magnetic Materials and Magnetic Devices - Josep Fontcuberta: IEEE Magnetics Distinguished Lecture 2016
MicroApps: Flexible RF Stimulus/Response Validation of Emerging Communications Standards (Agilent EEsof)

IEEE-USA E-Books

  • Engineering crossbar based emerging memory technologies

    Emerging Resistive Random Access Memories (RRAM) devices are an attractive option for future memory architectures due to their low-power and high density. However, their capacity is limited by sneak paths and the sensitivity of the sense amplifiers (SA). We develop a framework to maximize the capacity of RRAM memories by modeling the interactions between memory capacity, sneak paths, device parameters, and the sense amplifier. The framework explores the design space of the memory by considering different read/write mechanisms, sneak path elimination techniques, and multi-level storage.

  • Emerging memory technologies: Challenges and opportunities

    In this paper, the evolution, limits and challenges of charge-storage Silicon Non Volatile Memory technologies are presented, with a special attention for 3D architectures. Then, new resistive memory technologies are introduced. Main principles, challenges and opportunities are discussed. In particular, an overview of our recent research work on phase change memory (PCM) and metal oxide resistive switching memory (OxRRAM) will be given.

  • Emerging memory technologies for high density applications

    Comparison of most mature and promising emerging memory technologies respect to mainstream NAND and DRAM and challenges for the introduction in the market for high density applications.

  • Interconnect roles for emerging memory technologies in 3D architecture

    Summary form only given. Emerging memory integration into 3D architecture has the potential to overcome current memory shortfalls in speed, power consumption, reliability and cost vectors for the future data centric computing. Intensive investment has been placed in various cell structures (PCRAM, STTRAM, OxRAM and CBRAM) and 3D architectures (3D XPoint, 3D ReRAM) recently to capture the future commercial IoT market. After reviewing status of emerging memories and 3D architectures, that are generally back end of the line (BEOL) compatible, this talk will highlight the challenges of interconnect in these new element and integration, and discuss the need of new materials.

  • Embedded tutorial - Emerging memory technologies: What it means for computer system designers

    Summary form only given. As conventional memory technologies such as DRAM run into the scaling wall, architects and system designers are forced to look at alternative technologies for building future computer systems. Several emerging Non-Volatile Memory (NVM) technologies such as PCM, STT-RAM, and Memristors have the potential to boost memory capacity in a scalable and power-efficient manner. However, these technologies are not drop-in replacements and will require novel solutions to enable their deployment. Even the prime candidates among these technologies have their own set of challenges such as higher read latency (than DRAM), much higher write latency, and limited write endurance. In this talk, I will discuss some of our recent work that addresses these challenges. Our first solution is hybrid memory system that combines emerging memory technologies with a small DRAM buffer, thereby obtaining the latency of DRAM in the common case, and the higher capacity of emerging technologies. Such a hybrid memory system allows combining technologies that have latency higher than DRAM without having significant impact on read latency. Second, we target the problem of limited write endurance, which is common to many of the emerging memory technologies. This problem is exacerbated by non-uniformity in write traffic to memory, causing frequently written lines to fail much earlier than others thereby reducing system lifetime significantly. Unfortunately, existing wear-leveling techniques require large storage tables and indirection, resulting insignificant area and latency overheads. We propose Start-Gap, a simple and effective wear-leveling technique that incurs an overhead of only few bytes and still provides lifetime close to ideal wear leveling. Finally, I will discuss the performance impact of high write latency, as most of the emerging memory technologies tend to have write latency much higher than the read latency. While a higher write latency can typically be tolerated using buffers, once the write request is scheduled for service to a bank, it can still cause increased latency for later arriving read requests to the same bank. To avoid this latency penalty caused by contention from slow write operations, we propose write cancellation and write pausing as a means to tolerate slow writes.

  • Evaluation of emerging memory technologies for HPC, data intensive applications

    DRAM technology has several shortcomings in terms of performance, energy efficiency and scaling. Several emerging memory technologies have the potential to compensate for the limitations of DRAM when replacing or complementing DRAM in the memory sub-system. In this paper, we evaluate the impact of emerging technologies on HPC and data-intensive workloads modeling a 5-level hybrid memory hierarchy design. Our results show that 1) an additional level of faster DRAM technology (i.e. EDRAM or HMC) interposed between the last level cache and DRAM can improve performance and energy efficiency, 2) a non-volatile main memory (i.e. PCM, STTRAM, or FeRAM) with a small DRAM acting as a cache can reduce the cost and energy consumption at large capacities, and 3) a combination of the two approaches, which essentially replaces the traditional DRAM with a small EDRAM or HMC cache between the last level cache and the non-volatile memory, can grant capacity and improved performance and energy efficiency. We also explore a hybrid DRAM-NVM design with a partitioned address space and find that this approach is marginally beneficial compared to the simpler 5-level design. Finally, we generalize our analysis and show the impact of emerging technologies for a range of latency and energy parameters.

  • Session 3 - Emerging Memory Technologies I

    Start of the above-titled section of the conference proceedings record.

  • Hot topic session 9C: Test and fault tolerance for emerging memory technologies

    Ever larger on-die memory arrays for future processors in CMOS logic technology drive the need for dense and scalable embedded memory alternatives beyond SRAM and eDRAM. Recent advances in nonvolatile spin transfer torque (STT) RAM technology, which stores data by the spin orientation of a soft ferromagnetic material and shows current induced switching, have created interest for its use as embedded memory. STTRAM exhibits scalable write current, sufficient read margin and nonvolatility or persistence, all of which make it an attractive solution for last level cache, embedded cache or even main memory. In an era of on-die non-volatile storage, new defect, disturb and fault mechanisms need to be comprehended during characterization as well as manufacturing tests. The first part of the talk will introduce STTRAM and review the fundamentals of the cell design, the read and write mechanisms as well as recent advances in technology, which make it a potential successor to eDRAM, followed by how variations and thermal noise limit the material and cell design space. The second part will discuss new test models that would be required for such non-volatile storage, the necessity of large scale data collection and analysis, as well as the need for BIST and on-line testing, and conclude with challenges and opportunities in STTRAM testing that lie ahead of us.

  • Emerging memory technologies

    Ferroelectric RAM (FRAM) and phase-change RAM (PRAM) have been recently focused as candidates for ideal memory which can solve the problems of conventional memories. FRAM and PRAM have the properties of nonvolatility and fast write speed, which are considered as key properties for high performance mobile application and embedded solution. The process technologies for the integration of high performance/high density emerging memories (FRAM and PRAM) is reviewed

  • Session 15 - Emerging Memory Technologies II

    Start of the above-titled section of the conference proceedings record.



Standards related to Emerging Memory Technologies

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