Germanium

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Germanium is a chemical element with the symbol Ge and atomic number 32. (Wikipedia.org)






Conferences related to Germanium

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2019 20th International Symposium on Quality Electronic Design (ISQED)

20th International Symposium on Quality Electronic Design (ISQED 2019) is the premier interdisciplinary and multidisciplinary Electronic Design conference?bridges the gap among Electronic/Semiconductor ecosystem members providing electronic design tools, integrated circuit technologies, semiconductor technology,packaging, assembly & test to achieve design quality.


2019 22nd European Microelectronics and Packaging Conference & Exhibition (EMPC)

The EMPC 2019 program will focus on industrial needs, trends and solutions, and academic R&DThis event brings together researchers, innovators, technologists, business and marketingmanagers with an interest in microelectronics and photonics packaging, providing communication,education and interaction focused on developments of technologies of the present and for thefuture, including 3D Integration, SMT, CoB and FC-Assembly, Embedding, Wafer LevelPackaging, Encapsulation, Printed Electronics, MEMS, Photonics, HF, HT and Power-Electronics, Flexible Electronics, Advanced Materials, Thermal Management,Modeling/Design/Simulation and Reliability.


2019 44th International Conference on Infrared, Millimeter, and Terahertz Waves (IRMMW-THz)

Science, technology and applications spanning the millimeter-waves, terahertz and infrared spectral regions


2019 56th ACM/ESDA/IEEE Design Automation Conference (DAC)

EDA (Electronics Design Automation) is becoming ever more important with the continuous scaling of semiconductor devices and the growing complexities of their use in circuits and systems. Demands for lower-power, higher-reliability and more agile electronic systems raise new challenges to both design and design automation of such systems. For the past five decades, the primary focus of research track at DAC has been to showcase leading-edge research and practice in tools and methodologies for the design of circuits and systems.

  • 2022 59th ACM/ESDA/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2021 58th ACM/ESDA/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2020 57th ACM/ESDA/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2018 55th ACM/ESDA/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2017 54th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2016 53nd ACM/EDAC/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2015 52nd ACM/EDAC/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2014 51st ACM/EDAC/IEEE Design Automation Conference (DAC)

    DAC Description for TMRF The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading

  • 2013 50th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 session on design methodologies and EDA tool developments, keynotes, panels, plus User Track presentations. A diverse worldwide community representing more than 1,000 organization attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2012 49th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The Design Automation Conference (DAC) is the premier event for the design of electronic circuits and systems, and for EDA and silicon solutions. DAC features a wide array of technical presentations plus over 200 of the leading electronics design suppliers

  • 2011 48th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The Design Automation Conference is the world s leading technical conference and tradeshow on electronic design and design automation. DAC is where the IC Design and EDA ecosystem learns, networks, and does business.

  • 2010 47th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The Design Automation Conference (DAC) is the premier event for the design of electronic circuits and systems, and for EDA and silicon solutions. DAC features a wide array of technical presentations plus over 200 of the leading electronics design suppliers.

  • 2009 46th ACM/EDAC/IEEE Design Automation Conference (DAC)

    DAC is the premier event for the electronic design community. DAC offers the industry s most prestigious technical conference in combination with the biggest exhibition, bringing together design, design automation and manufacturing market influencers.

  • 2008 45th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The Design Automation Conference (DAC) is the premier event for the design of electronic circuits and systems, and for EDA and silicon solutions. DAC features a wide array of technical presentations plus over 250 of the leading electronics design suppliers.

  • 2007 44th ACM/IEEE Design Automation Conference (DAC)

    The Design Automation Conference (DAC) is the premier Electronic Design Automation (EDA) and silicon solution event. DAC features over 50 technical sessions covering the latest in design methodologies and EDA tool developments and an Exhibition and Demo Suite area with over 250 of the leading EDA, silicon and IP Providers.

  • 2006 43rd ACM/IEEE Design Automation Conference (DAC)

  • 2005 42nd ACM/IEEE Design Automation Conference (DAC)

  • 2004 41st ACM/IEEE Design Automation Conference (DAC)

  • 2003 40th ACM/IEEE Design Automation Conference (DAC)

  • 2002 39th ACM/IEEE Design Automation Conference (DAC)

  • 2001 38th ACM/IEEE Design Automation Conference (DAC)

  • 2000 37th ACM/IEEE Design Automation Conference (DAC)

  • 1999 36th ACM/IEEE Design Automation Conference (DAC)

  • 1998 35th ACM/IEEE Design Automation Conference (DAC)

  • 1997 34th ACM/IEEE Design Automation Conference (DAC)

  • 1996 33rd ACM/IEEE Design Automation Conference (DAC)


2019 IEEE 17th International Conference on Industrial Informatics (INDIN)

Industrial information technologies


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Periodicals related to Germanium

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Device and Materials Reliability, IEEE Transactions on

Provides leading edge information that is critical to the creation of reliable electronic devices and materials, and a focus for interdisciplinary communication in the state of the art of reliability of electronic devices, and the materials used in their manufacture. It focuses on the reliability of electronic, optical, and magnetic devices, and microsystems; the materials and processes used in the ...


Electron Device Letters, IEEE

Publishes original and significant contributions relating to the theory, design, performance and reliability of electron devices, including optoelectronic devices, nanoscale devices, solid-state devices, integrated electronic devices, energy sources, power devices, displays, sensors, electro-mechanical devices, quantum devices and electron tubes.


Electron Devices, IEEE Transactions on

Publishes original and significant contributions relating to the theory, design, performance and reliability of electron devices, including optoelectronics devices, nanoscale devices, solid-state devices, integrated electronic devices, energy sources, power devices, displays, sensors, electro-mechanical devices, quantum devices and electron tubes.


Instrumentation and Measurement, IEEE Transactions on

Measurements and instrumentation utilizing electrical and electronic techniques.


Lightwave Technology, Journal of

All aspects of optical guided-wave science, technology, and engineering in the areas of fiber and cable technologies; active and passive guided-wave componentry (light sources, detectors, repeaters, switches, fiber sensors, etc.); integrated optics and optoelectronics; systems and subsystems; new applications; and unique field trials.


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Most published Xplore authors for Germanium

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Xplore Articles related to Germanium

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Direct band gap electroluminescence from bulk germanium at room temperature using an asymmetric metal/germanium/metal structure

2014 7th International Silicon-Germanium Technology and Device Meeting (ISTDM), 2014

As a promising material for fabricating on-chip optoelectronic devices, germanium (Ge) has a direct band gap of 0.8 eV, which matches with the wavelength for optical communication. The energy difference is only 134 meV between direct and indirect band gaps, implying the possibility of a direct band gap light emission. In general, a p-i-n diode structure is used for a ...


Peculiarities of germanium driving back from germanium-silicate glass formed in the process of oxidation of the germanium-doped polycrystalline silikon films

2010 20th International Crimean Conference "Microwave & Telecommunication Technology", 2010

It is determined that the content of Ge in the volume of germanium-silicate glass (GSG) influences density of nanocrystalline grains. It is ascertained that germanium atoms are unevenly distributing between separate nanoclusters as well as in the limits of one cluster. The size and density of germanium nanoclusters may be independently checked by the way of changing of germanium content ...


Effects of germanium layer on silicon/germanium superlattice solar cells

2013 IEEE 39th Photovoltaic Specialists Conference (PVSC), 2013

Silicon germanium solar cells have widely been explored in recent years due to the property of germanium material that is capable to absorb light in low energy (IR range). However, the lattice mismatch between the silicon and germanium materials may lead to misfit dislocation defect on the solar cell. The defect can be reduced by arranging the silicon and germanium ...


Effect of Germanium Concentration on the Dielectric Function of Strained Si1-xGex Films

2012 International Silicon-Germanium Technology and Device Meeting (ISTDM), 2012

Transistors fabricated using strained silicon-germanium alloy channels provide improved carrier mobility. While the electrical properties of Si1-xGexfor a variety of values of x and the optical properties of strain-free Si1-xGexfor x= 0 to 1 have been reported, reports of the optical properties of pseudomorphic Si1-xGexwere limited to x <; 0.3. For Ge concentrations of less than 30%, the optical properties ...


Laser Annealing of Amorphous Germanium on Silicon–Germanium Source/Drain for Strain and Performance Enhancement in pMOSFETs

IEEE Electron Device Letters, 2008

We report the first demonstration of a novel germanium-enrichment process for forming a silicon-germanium (SiGe) source/drain (S/D) stressor with a high Ge content. The process involves laser-induced local melting and intermixing of a Ge layer with an underlying Si0.8Ge0.2S/D region, leading to a graded SiGe S/D stressor with a significant increase in the peak Ge content. Various laser fluences were ...


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Educational Resources on Germanium

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IEEE-USA E-Books

  • Direct band gap electroluminescence from bulk germanium at room temperature using an asymmetric metal/germanium/metal structure

    As a promising material for fabricating on-chip optoelectronic devices, germanium (Ge) has a direct band gap of 0.8 eV, which matches with the wavelength for optical communication. The energy difference is only 134 meV between direct and indirect band gaps, implying the possibility of a direct band gap light emission. In general, a p-i-n diode structure is used for a Ge photo emitter, of which fabrication process is relatively complicated and high-quality n-type doping is still an issue. Recently we achieved high Schottky barrier heights for electrons ΦBN= 0.60 eV (HfGe/n-Ge) and holes ΦBP= 0.57 eV (TiN/p-Ge) [1,2]. Based on this technology, we demonstrate direct band gap room temperature electroluminescence (EL) from bulk Ge using a fin-type asymmetric metel/Ge/metal (HfGe/Ge/TiN) structure.

  • Peculiarities of germanium driving back from germanium-silicate glass formed in the process of oxidation of the germanium-doped polycrystalline silikon films

    It is determined that the content of Ge in the volume of germanium-silicate glass (GSG) influences density of nanocrystalline grains. It is ascertained that germanium atoms are unevenly distributing between separate nanoclusters as well as in the limits of one cluster. The size and density of germanium nanoclusters may be independently checked by the way of changing of germanium content in the composition of GSG, by the medium, temperature and by the heat treatment.

  • Effects of germanium layer on silicon/germanium superlattice solar cells

    Silicon germanium solar cells have widely been explored in recent years due to the property of germanium material that is capable to absorb light in low energy (IR range). However, the lattice mismatch between the silicon and germanium materials may lead to misfit dislocation defect on the solar cell. The defect can be reduced by arranging the silicon and germanium materials in superlattice (multilayer) structures whereby more lights can be absorbed by the solar cell which will increase its efficiency. In this paper, PC1D solar cell modeling software has been used to simulate and analyze the effects of the germanium thickness on the silicon/germanium superlattice (multilayer) solar cell. The total thickness is limited to 1μm. The simulation result shows that an efficiency of 10.16% (VOC= 0.4521V, ISC= 3.337A, FF =0.6734) is achieved with 0.2μm-Ge and 0.2μm-Si window layer, and 0.6μm-Si absorber layer.

  • Effect of Germanium Concentration on the Dielectric Function of Strained Si1-xGex Films

    Transistors fabricated using strained silicon-germanium alloy channels provide improved carrier mobility. While the electrical properties of Si1-xGexfor a variety of values of x and the optical properties of strain-free Si1-xGexfor x= 0 to 1 have been reported, reports of the optical properties of pseudomorphic Si1-xGexwere limited to x <; 0.3. For Ge concentrations of less than 30%, the optical properties follow the low shear elastic response [1, 2]. Here, we report an in-depth study of the optical properties of bi-axially strained pseudomorphic Si1-xGexalloys for Ge concentrations ranging from 0.05 to 0.75. Optical properties (complex refractive index/dielectric function) of semiconductors are dominated by strong absorption at critical points (CP). Strain often shifts the E1and E1+Δ CPs. The spin orbit splitting Δ increases with germanium concentration. Strained semiconductors are described by an elastic theory approach that predicts the shifts of the critical points. There are two approximations for the optical response depending on the magnitude of spin-orbit coupling versus the shift in CP energy for shear stress. The low shear approximation used previously for the calculation of elastic response of critical points (direct gap transitions) is no longer valid for psuedomorphic Si1-xGexalloys having germanium concentrations greater than 40%. The optical properties of these alloys follow a high sheer approximation and high shear effects can be seen very prominently for concentrations above 50%, where two peaks are readily apparent for E1with an energy seperation greater than the spin orbit splitting. Undoped Si1-xGexfilms, with Ge concentrations from 0.05 to 0.75 were grown on Si (001) substrates using ultra-high vacuum and reduced pressure chemical vapor deposition. Layer thickness and composition was measured using high resolution X-ray diffraction. Figure 1 shows the Omega- 2Theta 004 rocking curves for some of the wafers starting from 5% Ge concentration. Relaxation scans and reciprocal space maps confirmed the alloys as fully strained, low defect and high quality structural formations. The dielectric function of pseudomorphic alloys was evaluated using spectroscopic ellipsometry from 0.73 eV to 5.17 eV (245nm to 1700nm). Figure 2 shows two peaks near the E1and E1+Δ critical points for higher germanium concentrations. Errors in ellipsometric based thickness measurements occur if the complex refractive index of relaxed SiGe alloys is used to measure pseudomorphic SiGe films.

  • Laser Annealing of Amorphous Germanium on Silicon–Germanium Source/Drain for Strain and Performance Enhancement in pMOSFETs

    We report the first demonstration of a novel germanium-enrichment process for forming a silicon-germanium (SiGe) source/drain (S/D) stressor with a high Ge content. The process involves laser-induced local melting and intermixing of a Ge layer with an underlying Si0.8Ge0.2S/D region, leading to a graded SiGe S/D stressor with a significant increase in the peak Ge content. Various laser fluences were investigated for the laser annealing process. The process is then successfully integrated in a device fabrication flow, forming strained silicon-on-insulator p-channel field-effect transistors (p-FETs) with a high Ge content in SiGe S/D. A drive current enhancement of ~ 12% was achieved with this process, as compared to a strained p-FET with Si0.8Ge0.2S/D p-FETs. The_I_Dsatenhancement, primarily attributed to strain-induced mobility improvement, is found to increase with decreasing gate lengths.

  • Protein patterning using germanium as a sacrificial layer

    With the rise of microfluidic diagnostics, there is a need for more efficient methods of patterning surface-attached moieties, including proteins like antibodies, onto microchannel surfaces. This arises because almost all of the solvents and processes used for surface-attachment chemistries (or their payloads) are incompatible with sacrificial layers usually photoresist during microfabrication, rendering it difficult to easily pattern active chemistry onto a surface in manufacture scale. We present a simple method, based on thin film germanium dissolution, which is compatible with both modern nanolithographic techniques and surface chemistries. Simply, because germanium thin films dissolve readily, controllably and rapidly in water (but not organic solvents), these films can be used to mask and protect areas of the substrate during the attachment of surface chemistries. We demonstrate the process and results using microscale patterns. The resolution and alignment of this method depends on the photolithography tool used; nanoscale patterning is not difficult to achieve. In addition, we show that with non-conformal germanium deposition (e.g. e-beam evaporation), the conjugation of surface chemistry on vertical side walls can be manipulated by controlling the thickness of the deposited germanium layer, opening another dimension for microfluidic devices and cell manipulation research.

  • Germanium for photonic applications

    Localized GOI wires have been grown using a LPE process resulting in single crystal layers up to 400 urn in length and 5 urn in width. We have reported on the design, fabrication and characterisation of a 4-channel AMMI structure integrated with germanium p-i-n photodetectors to form a silicon photonics receiver. Light detection at 50 Gb/s has been demonstrated with a low dark current of <; 20 nA at -1 V bias. The AMMI structure exhibits a low insertion loss of <; -0.5 dB and cross-talk of <; -15 dB across the 4 channels.

  • Single Atom Devices in Silicon and Germanium

    Summary form only given. Over the past decade we have developed a radical new strategy for the fabrication of atomic-scale devices in silicon and germanium [1-4]. Using this process we have demonstrated that Ohm''s Law survives to the atomic-scale [4,5] and the formation of all-epitaxial single electron transistors [6,7] down to the few electron limit. Most recently we have demonstrated a precision single atom transistor [8]. We will present atomic- scale images and electronic characteristics of these atomically precise deviceOver the past decade we have developed a radical new strategy for the fabrication of atomic-scale devices in silicon and germanium [1-4]. Using this process we have demonstrated that Ohm''s Law survives to the atomic-scale [4,5] and the formation of all-epitaxial single electron transistors [6,7] down to the few electron limit. Most recently we have demonstrated a precision single atom transistor [8]. We will present atomic-scale images and electronic characteristics of these atomically precise devices and demonstrate the impact of atomically abrupt vertical and lateral confinement on electron transport. We will also highlight some recent results towards single shot spin read-out of these precisely placed donors and present some of the challenges to achieving truly scalable donor based quantum computing architectures in silicon.

  • High Quality Epitaxial Germanium on Si (110) using Liquid Phase Crystallization for Low—Cost III-V Solar-Cells

    Germanium integration on silicon is required for fabricating high efficiency III-V low-cost solar cells on silicon. In this work, we present a single step thermal annealing of amorphous germanium films as a method of monolithic integration of epitaxial germanium on crystalline silicon (110) wafers. The re-crystallization progresses via liquid phase epitaxy by heating the germanium layer in inert ambient to right above its melting temperature of 9370C. On slow cooling; the Ge layer gets oriented by the underlying Si (100) wafer, yielding an epitaxial Ge film on Si. SEM show that the films are continuous and crack free whereas XRD measurements indicated highly oriented films. 1 micron thick film had rocking curve FWHM of 0.15 degree corresponding to dislocation densities of low 109cm-2. Also, AFM measurements indicate that 1 micron films have RMS roughness of ~ 80nm for scan area of 25 μm2.

  • Modeling 20-nm Germanium FinFET With the Industry Standard FinFET Model

    In this letter, we present modeling results for germanium p-type FinFETs using the industry standard Berkeley Spice Common Multi-gate Field Effect Transistor (BSIM-CMG) model. The effect of perpendicular electrical field on hole mobility in germanium FinFETs is found to be different from silicon FinFETs. We present an updated Ge mobility equation to account for this difference. With this single update, BSIM-CMG agrees very well with the measured I-V data of Ge FinFETs with a gate-length from 130 to 20 nm. We conclude that a production quality standard model is available for simulation of circuits employing p-type Ge FinFET.



Standards related to Germanium

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American National Standard Calibration and Use of Germanium Spectrometers for the Measurement of Gamma-Ray Emission Rates of Radionuclides


American National Standard Calibration of Germanium Detectors for In-Situ Gamma-Ray Measurements


IEEE Standard Test Procedures for Germanium Gamma-Ray Detectors

Same as for 325-1986. Following is the abstract for 325-1986: The basic requirements for qualifying Class 1E equipment with interfaces that are to be used in nuclear power generating stations are described. The principles, procedures, and methods of qualification are covered. These qualification requirements, when met, will confirm the adequacy of the equipment design under normal, abnormal, design basis event, ...


IEEE Standard Test Procedures for High-Purity Germanium Crystals for Radiation Detectors



Jobs related to Germanium

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