Conferences related to RF Design

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2020 57th ACM/ESDA/IEEE Design Automation Conference (DAC)

The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2022 59th ACM/ESDA/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2021 58th ACM/ESDA/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2018 55th ACM/ESDA/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2017 54th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2015 52nd ACM/EDAC/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2014 51st ACM/EDAC/IEEE Design Automation Conference (DAC)

    DAC Description for TMRF The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading

  • 2013 50th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 session on design methodologies and EDA tool developments, keynotes, panels, plus User Track presentations. A diverse worldwide community representing more than 1,000 organization attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2012 49th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The Design Automation Conference (DAC) is the premier event for the design of electronic circuits and systems, and for EDA and silicon solutions. DAC features a wide array of technical presentations plus over 200 of the leading electronics design suppliers

  • 2011 48th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The Design Automation Conference is the world s leading technical conference and tradeshow on electronic design and design automation. DAC is where the IC Design and EDA ecosystem learns, networks, and does business.

  • 2010 47th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The Design Automation Conference (DAC) is the premier event for the design of electronic circuits and systems, and for EDA and silicon solutions. DAC features a wide array of technical presentations plus over 200 of the leading electronics design suppliers.

  • 2009 46th ACM/EDAC/IEEE Design Automation Conference (DAC)

    DAC is the premier event for the electronic design community. DAC offers the industry s most prestigious technical conference in combination with the biggest exhibition, bringing together design, design automation and manufacturing market influencers.

  • 2008 45th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The Design Automation Conference (DAC) is the premier event for the design of electronic circuits and systems, and for EDA and silicon solutions. DAC features a wide array of technical presentations plus over 250 of the leading electronics design suppliers.

  • 2007 44th ACM/IEEE Design Automation Conference (DAC)

    The Design Automation Conference (DAC) is the premier Electronic Design Automation (EDA) and silicon solution event. DAC features over 50 technical sessions covering the latest in design methodologies and EDA tool developments and an Exhibition and Demo Suite area with over 250 of the leading EDA, silicon and IP Providers.

  • 2006 43rd ACM/IEEE Design Automation Conference (DAC)

  • 2005 42nd ACM/IEEE Design Automation Conference (DAC)


2019 41st Annual International Conference of the IEEE Engineering in Medicine & Biology Society (EMBC)

The conference program will consist of plenary lectures, symposia, workshops andinvitedsessions of the latest significant findings and developments in all the major fields ofbiomedical engineering.Submitted papers will be peer reviewed. Accepted high quality paperswill be presented in oral and postersessions, will appear in the Conference Proceedings and willbe indexed in PubMed/MEDLINE & IEEE Xplore


2019 IEEE 19th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SiRF)

This is a set of five conferences with a focus on wireless components, applications and systems that affect both now and our future lifestyle. The main niche of these conferences is to bring together technologists, circuit designers, system designers and entrepreneurs at a single event. It was and is the place where these worlds meet, where new processes and systems can be benchmarked against the needs of circuit designers at the bleeding edge of RF systems. This is also an area where today's design compromises can trigger tomorrow's advanced technologies, where dreams can become a reality.


2019 IEEE 69th Electronic Components and Technology Conference (ECTC)

premier components, packaging and technology conference


2019 IEEE Applied Power Electronics Conference and Exposition (APEC)

APEC focuses on the practical and applied aspects of the power electronics business. The conference addresses issues of immediate and long term importance to practicing power electronics engineer.


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Periodicals related to RF Design

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Advanced Packaging, IEEE Transactions on

The IEEE Transactions on Advanced Packaging has its focus on the modeling, design, and analysis of advanced electronic, photonic, sensors, and MEMS packaging.


Aerospace and Electronic Systems Magazine, IEEE

The IEEE Aerospace and Electronic Systems Magazine publishes articles concerned with the various aspects of systems for space, air, ocean, or ground environments.


Antennas and Propagation, IEEE Transactions on

Experimental and theoretical advances in antennas including design and development, and in the propagation of electromagnetic waves including scattering, diffraction and interaction with continuous media; and applications pertinent to antennas and propagation, such as remote sensing, applied optics, and millimeter and submillimeter wave techniques.


Applied Superconductivity, IEEE Transactions on

Contains articles on the applications and other relevant technology. Electronic applications include analog and digital circuits employing thin films and active devices such as Josephson junctions. Power applications include magnet design as well asmotors, generators, and power transmission


Circuits and Systems I: Regular Papers, IEEE Transactions on

Part I will now contain regular papers focusing on all matters related to fundamental theory, applications, analog and digital signal processing. Part II will report on the latest significant results across all of these topic areas.


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Xplore Articles related to RF Design

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Fully-integrated WCDMA direct conversion SiGeC BiCMOS receiver

Bipolar/BiCMOS Circuits and Technology, 2004. Proceedings of the 2004 Meeting, 2004

This paper describes a WCDMA direct conversion receiver which has been integrated in a BiCMOS SiGe-carbon process featuring 0.25 /spl mu/m/f/sub T/=60 GHz bipolar transistors. This receiver includes an integrated RF-front- end with local oscillator quadrature generator, 5/sup th/ order Butterworth analog baseband lowpass filter (LPF) and variable gain amplifier (VGA), cut- off frequency calibrator, DAC for DC-offset calibration, serial ...


Applications of Neural Networks for RF Design

Applications of Neural Networks for RF Design, 08/20/2007

Neural Networks are information processing systems inspired by the ability of human brain to learn from observations and to generalize by abstraction. It has been used in diverse fields such as pattern recognition, speech processing, control, medical applications and more. In recent years, it has emerged as an attractive vehicle in the RF/microwave CAD community to address the challenges in ...


Novel shielding structure for LTE and 3G RF design

2012 Asia Pacific Microwave Conference Proceedings, 2012

This paper describes a novel method of shielding for multiple compartments. A molding, scribing, and coating process is used to create the shielding structure that is flexible, high performance, and low cost. Simulation is used to analyze and predict the shielding effect for various coating material, thickness, and over frequency. This simulation is verified by experiment. Moreover, a HSPA modem ...


RF design methodology for design-cycle-time reduction using parameterization of embedded passives on multilayer organic substrates

2008 IEEE MTT-S International Microwave Symposium Digest, 2008

This paper presents an RF design methodology for reducing the design-cycle- time (DCT) using parameterization of embedded passive devices on multilayer organic substrates. Based on parameterized design libraries of embedded passive devices, designers can easily map ideal circuits into lossy circuits and physical layouts and use shunt parasitics of embedded inductors and capacitors, which results in design cycle time reduction. ...


Receiver RF design considerations for wireless communications systems

1996 IEEE International Symposium on Circuits and Systems. Circuits and Systems Connecting the World. ISCAS 96, 1996

In order to design integrated circuit solutions for wireless communications systems, receiver RF design trade-offs must be understood. This paper will present the RF environment and RF design issues for receivers.


More Xplore Articles

Educational Resources on RF Design

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IEEE.tv Videos

Receiver Design and Analysis: RF Boot Camp
IMS 2012 Microapps - RF System Design: Moving Beyond a Linear Datasheet
IMS 2012 Microapps - Optimizing the Design and Verification of 4G RF Power Amplifiers
MicroApps: First-Pass Design Methodology for RF Modules (Agilent Technologies)
PA Design: RF Boot Camp
IMS 2012 Microapps - Linking RF Design thru to Test: Intro to Model Extraction
Impedance Matching: RF Boot Camp
IMS 2012 Microapps - Panel Session: Device Characterization Methods and Advanced RF/ Microwave Design
Network Analysis: RF Boot Camp
RF Power Amplifier Design for Pseudo Envelope Tracking
MicroApps: 200W RF Power Amplifer Design using a Nonlinear Vector Network Analyzer and Measured Load-Dependent X-Parameters (2) (Agilent Technologies)
Micro-Apps 2013: Integrated Electro-Thermal Design of a SiGe PA
RF as the Differentiator (RFIC 2015 Keynote)
Addressing Key Test Challenges for LTE/LTE- A Multi-Antenna Beamforming Designs: MicroApps 2015 - Keysight Technologies
IMS 2012 Microapps - The Next Generation of Communications Design, Validate, and Test Dr. Mark Pierpoint
Qualifying RF Systems for 5G Using Off the Shelf Parts Without Iterations: MicroApps 2015 - Keysight Technologies
Design of Monolithic Silicon-Based Envelope-Tracking Power Amplifiers for Broadband Wireless Applications
A 28GHz CMOS Direct Conversion Transceiver with Packaged Antenna Arrays for 5G Cellular Systems: RFIC Industry Showcase 2017
RF Induced Communication Errors in RFFE MIPI Controlled Power Amplifiers: RFIC Interactive Forum
Micro-Apps Keynote 2013: Modern RF Measurements and How They Drive Spectrum Analyzer Digital IF Processor Design

IEEE-USA E-Books

  • Fully-integrated WCDMA direct conversion SiGeC BiCMOS receiver

    This paper describes a WCDMA direct conversion receiver which has been integrated in a BiCMOS SiGe-carbon process featuring 0.25 /spl mu/m/f/sub T/=60 GHz bipolar transistors. This receiver includes an integrated RF-front- end with local oscillator quadrature generator, 5/sup th/ order Butterworth analog baseband lowpass filter (LPF) and variable gain amplifier (VGA), cut- off frequency calibrator, DAC for DC-offset calibration, serial bus interface and voltage and current reference generators. In the high/low gain modes, this device consumes 25 mA and 20 mA respectively with 2.7 V power supply. The die is wire bonded directly on the validation board. Within the receive band, the measurements show 51 dB of overall gain, NF=5 dB, IIP3= -9 dBm, ICP1 = -15dBm.

  • Applications of Neural Networks for RF Design

    Neural Networks are information processing systems inspired by the ability of human brain to learn from observations and to generalize by abstraction. It has been used in diverse fields such as pattern recognition, speech processing, control, medical applications and more. In recent years, it has emerged as an attractive vehicle in the RF/microwave CAD community to address the challenges in high-frequency electronic modeling and design. Neural networks can learn and generalize from data allowing model development even when component formulas are unavailable. Neural network models are universal approximators allowing re-use of the same modeling technology for both linear and nonlinear problems and at both device and circuit levels.

  • Novel shielding structure for LTE and 3G RF design

    This paper describes a novel method of shielding for multiple compartments. A molding, scribing, and coating process is used to create the shielding structure that is flexible, high performance, and low cost. Simulation is used to analyze and predict the shielding effect for various coating material, thickness, and over frequency. This simulation is verified by experiment. Moreover, a HSPA modem is implemented using this shielding structure. The result shows that this modem has excellent RF performance, and meets all 3GPP RF requirements.

  • RF design methodology for design-cycle-time reduction using parameterization of embedded passives on multilayer organic substrates

    This paper presents an RF design methodology for reducing the design-cycle- time (DCT) using parameterization of embedded passive devices on multilayer organic substrates. Based on parameterized design libraries of embedded passive devices, designers can easily map ideal circuits into lossy circuits and physical layouts and use shunt parasitics of embedded inductors and capacitors, which results in design cycle time reduction. The proposed method was demonstrated through design of compact and highperformance bandpass filters on multilayer organic substrates by RF design experts and non-experts.

  • Receiver RF design considerations for wireless communications systems

    In order to design integrated circuit solutions for wireless communications systems, receiver RF design trade-offs must be understood. This paper will present the RF environment and RF design issues for receivers.

  • Wireless RF design challenges

    The challenges and opportunities for the RF designer have perhaps never been greater. The drive to higher levels of integration in the extremely competitive cellular chipset market place; the emergence of new wireless communications links such as Bluetooth and WLAN; and the continual need to provide multi-band, multi-mode, multiservice, modulation independent, cost effective transceivers have all produced a great demand for RF design skills. This paper discusses the markets, system level specifications, and RF design challenges.

  • Analog/RF design techniques for high performance nanoelectronic on-chip interconnects

    On-chip interconnects form the bottleneck of VLSI system performance. As technology progresses, VLSI on-chip interconnects encounter increasingly significant challenges, such as (1) signal attenuation and (2) crosstalk coupling. This paper proposes two analog/RF design techniques for high performance nanoelectronic on-chip interconnects: (1) application of distributed amplifiers for signal attenuation compensation by reducing interconnect effective resistance, and (2) application of bandpass filters for noise immunity in a frequency separated VLSI on-chip communication system. HSPICE-RF simulation results in 65 nm CMOS technology verify that the proposed analog/RF design techniques achieve improved performance and reliability for high performance nanoelectronic on-chip interconnects.

  • F6: Mixed-signal/RF design and modeling in next-generation CMOS

    Technology awareness and modeling is important in all areas of mixed-signal and RF design. This forum intends to provide a holistic overview and discussion spanning a variety of important topics in device modeling, reliability and simulation in next-generation CMOS. It begins with an analog /RF-centric comparison between FinFET and ultra-thin-body SOI technology. The next two talks then venture into bias stress and Electrostatic Discharge Protection (ESD), which are two issues of ever-increasing importance for future scaling. The fourth presentation discusses the latest developments surrounding the popular BSIM transistor model, and explains how this new model can be efficiently coupled to the analog/RF design process. Motivated by their increasing significance in integrated RF transceivers, the next talk outlines a future roadmap for passive components in scaled technologies. Then, we expand upon modeling challenges that arise when components are stacked in three dimensions. Finally, this series of modeling talks is rounded up by two comprehensive presentations that summarize key challenges from the foundry and EDA tool vendor perspectives.

  • Developing skills for industry (RF design)

    At the University of Plymouth the Communication Engineering Group runs industrial postgraduate courses in RF design. These have been designed to meet the specific requirements of individual companies and carefully tailored to match the skills base of the attendees. The authors describe the approach to the design of these courses.<<ETX>>

  • RF Design Challenges at 90nm RFCMOS Technology Under Low Voltage Applications

    This paper presents an overview of the RF design challenges in 90nm RFCMOS technology for low voltage applications. It will first cover the state of the art 90nm RFCMOS technology offerings of advanced active and passive devices. The design challenges of key RF circuit blocks such as LNA, mixer and VCO will be discussed in details, with the emphasis on the performance impact to gain, noise and linearity under low supply voltage. The accurate device modeling for FET devices to account for substrate, oxide stress and parasitic effects are also addressed



Standards related to RF Design

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IEEE Standard for Radio-Frequency Energy and Current-Flow Symbols

Description of warning symbols for radio frequency radiation and radio frequency induced and contact currents in the frequency range of 3 kHz to 300 GHz.