Flash memory

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Flash memory is a non-volatile computer storage chip that can be electrically erased and reprogrammed. (Wikipedia.org)






Conferences related to Flash memory

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2020 Joint Conference of the IEEE International Frequency Control Symposium and International Symposium on Applications of Ferroelectrics (IFCS-ISAF)

Ferroelectric materials and applications


2018 14th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT)

Process & Device Technologies1. Channel Engineering2. High-k/Metal gate Technology3. Advanced Source/Drain Technology4. Interconnect Technology5. Advanced 3D Integration6. Novel Process Technologies7. Ultra-Thin Body Transistors and Device Variability8. Advanced High-k Metal Gate SoC and High Performance CMOS Platforms 9. CMOS Performance Enhancing and Novel Devices 10. Advanced FinFETs and Nanowire FETs11. CNT, MTJ Devices and Nanowire Photodiodes12. Low- Power and Steep Slope Switching Devices13. Graphene Devices14. Advanced Technologies for Ge MOSFETs15. Organic semiconductor devices and technologies16. Compound semiconductor devices and Technology 17. Ultra High Speed Transistors, HEMT/HBT etc. 18. Advanced Power Devices and Reliability19. Flash Memory20. IT Magnetic RAM21. Resistive RAM

  • 2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT)

    Process & Device Technologies1. Channel Engineering2. High-k/Metal gate Technology3. Advanced Source/Drain Technology4. Interconnect Technology5. Advanced 3D Integration6. Novel Process Technologies7. Ultra-Thin Body Transistors and Device Variability8. Advanced High-k Metal Gate SoC and High Performance CMOS Platforms 9. CMOS Performance Enhancing and Novel Devices 10. Advanced FinFETs and Nanowire FETs11. CNT, MTJ Devices and Nanowire Photodiodes12. Low- Power and Steep Slope Switching Devices13. Graphene Devices14. Advanced Technologies for Ge MOSFETs15. Organic semiconductor devices and technologies16. Compound semiconductor devices and Technology 17. Ultra High Speed Transistors, HEMT/HBT etc. 18. Advanced Power Devices and Reliability19. Flash Memory20. IT Magnetic RAM21. Resistive RAMs22. Phase Change Memory23. 3-Dimensional Memory24. MEMS Technology25. Thin Film Transistors26. Biosensors27. PV and Energy Harvesting28. Front End of Line (FEOL) R

  • 2014 IEEE 12th International Conference on Solid -State and Integrated Circuit Technology (ICSICT)

    Process & Device Technologies1. Channel Engineering2. High-k/Metal gate Technology3. Advanced Source/Drain Technology4. Interconnect Technology5. Advanced 3D Integration6. Novel Process Technologies7. Ultra-Thin Body Transistors and Device Variability8. Advanced High-k Metal Gate SoC and High Performance CMOS Platforms 9. CMOS Performance Enhancing and Novel Devices 10. Advanced FinFETs and Nanowire FETs11. CNT, MTJ Devices and Nanowire Photodiodes12. Low- Power and Steep Slope Switching Devices13. Graphene Devices14. Advanced Technologies for Ge MOSFETs15. Organic semiconductor devices and technologies16. Compound semiconductor devices and Technology 17. Ultra High Speed Transistors, HEMT/HBT etc. 18. Advanced Power Devices and Reliability19. Flash Memory20. IT Magnetic RAM21. Resistive RAMs22. Phase Change Memory23. 3-Dimensional Memory24. MEMS Technology25. Thin Film Transistors26. Biosensors27. PV and Energy Harvesting28. Front End of Line (FEOL) R

  • 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology (ICSICT)

    Silicon IC, Silicon/germanium devices , Interconnect , Low K and High Kdielectric , Advance Memories , nano -electronics, Organic and Compound semiconductor devices ,sensors and MEMS, Semiconductor material erization, Reliability , Modeling and simulation,Packaging and testing , Digital, Analog, Mixed Signal IC and SOC design technology,Low -power, RF devices & circuits, ICCAD

  • 2010 IEEE 10th International Conference on Solid-State and Integrated Circuit Technology (ICSICT)

    Silicon IC, Silicon/germanium devices , Interconnect , Low K and High K dielectric , Advance Memories , nano-electronics, Organic and Compound semiconductor devices , sensors and MEMS, Semiconductor material characterization, Reliability , Modeling and simulation, Packaging and testing , Digital, Analog, Mixed Signal IC and SOC design technology,Low-power, RF devices & circuits, IC CAD .

  • 2008 9th International Conference on Solid-State and Integrated-Circuit Technology (ICSICT)

  • 2006 8th International Conference on Solid-State and Integrated-Circuit Technology (ICSICT)

  • 2004 7th International Conference on Solid-State and Integrated-Circuit Technology (ICSICT)


2018 31st International Conference on VLSI Design and 2018 17th International Conference on Embedded Systems (VLSID)

This conference is a forum for researchers and designers to present and discuss various aspects of VLSI design, EDA, embedded systems, and enabling technologies. The program will consist of regular paper sessions, special sessions, embedded tutorials, panel discussions, design contest, industrial exhibits and tutorials. This is the premier conference/exhibition in this area in India, attracting designers, EDA professionals, and EDA tool users. The program committee for the conference has a significant representation from the EDA research community and a large fraction of the papers published in this conference are EDA-related


2018 Annual Reliability and Maintainability Symposium (RAMS)

Scope:Tutorials and original papers on reliability, maintainability, safety, risk management, and logistics


2018 Design, Automation & Test in Europe Conference & Exhibition (DATE)

The DATE conference addresses all aspects of research into technologies for electronic and embedded system engineering. It covers the design process, test, and automation tools for electronics ranging from integrated circuits to distributed embedded systems. This includes both hardware and embedded software design issues. The conference scope also includes the elaboration of design requirements and new architectures for challenging application fields such as telecoms, wireless communications, multimedia, healthcare, smart energy and automotive systems. Companies also present innovative industrial designs to foster the feedback fromrealworld design to research. DATE also hosts a number of special sessions, events within the main technical programme such as panels, hot-topic sessions, tutorials and workshops technical programme such as panels, hot-topic sessions, tutorials and workshops.

  • 2017 Design, Automation & Test in Europe Conference & Exhibition (DATE)

    The DATE conference addresses all aspects of research into technologies for electronic and embedded system engineering. It covers the design process, test, and automation tools for electronics ranging from integrated circuits to distributed embedded systems. This includes both hardware and embedded software design issues. The conference scope also includes the elaboration of design requirements and new architectures for challenging application fields such as telecoms, wireless communications, multimedia, healthcare, smart energy and automotive systems. Companies also present innovative industrial designs to foster the feedback fromrealworld design to research. DATE also hosts a number of special sessions, events within the main technical programme such as panels, hot-topic sessions, tutorials and workshops technical programme such as panels, hot-topic sessions, tutorials and workshops.

  • 2016 Design, Automation & Test in Europe Conference & Exhibition (DATE)

    The DATE conference addresses all aspects of research into technologies for electronic andembedded system engineering. It covers the design process, test, and automation tools forelectronics ranging from integrated circuits to distributed embedded systems. This includes bothhardware and embedded software design issues. The conference scope also includes theelaboration of design requirements and new architectures for challenging application fields suchas telecoms, wireless communications, multimedia, healthcare, smart energy and automotivesystems. Companies also present innovative industrial designs to foster the feedback from realworlddesign to research. DATE also hosts a number of special sessions, events within the maintechnical programme such as panels, hot-topic sessions, tutorials and workshops technical programme such as panels, hot-topic sessions, tutorials and workshops

  • 2015 Design, Automation & Test in Europe Conference & Exhibition (DATE)

    The DATE conference addresses all aspects of research into technologies for electronic and embedded system engineering. It covers the design process, test, and automation tools for electronics ranging from integrated circuits to distributed embedded systems. This includes both hardware and embedded software design issues. The conference scope also includes the elaboration of design requirements and new architectures for challenging application fields such as telecoms, wireless communications, multimedia, healthcare, smart energy and automotive systems. Companies also present innovative industrial designs to foster the feedback from realworld design to research. DATE also hosts a number of special sessions, events within the main technical programme such as panels, hot-topic sessions, tutorials and workshops.

  • 2014 Design, Automation & Test in Europe Conference & Exhibition (DATE)

    The DATE conference addresses all aspects of research into technologies for electronic and embedded system engineering. It covers the design process, test, and automation tools for electronics ranging from integrated circuits to distributed embedded systems. This includes both hardware and embedded software design issues. The conference scope also includes the elaboration of design requirements and new architectures for challenging application fields such as telecoms, wireless communications, multimedia, healthcare, smart energy and automotive systems. Companies also present innovative industrial designs to foster the feedback from real-world design to research. DATE also hosts a number of special sessions, events within the main technical programme such as panels, hot-topic sessions, tutorials and workshops

  • 2013 Design, Automation & Test in Europe Conference & Exhibition (DATE 2013)

    DATE is the complete event for the European electronic and test community. A leading world conference and exhibition, DATE unites 2,000 professionals with approximately 60 exhibiting companies, cutting edge R&D, industrial designers and technical managers from around the world.

  • 2012 Design, Automation & Test in Europe Conference & Exhibition (DATE 2012)

    DATE is the complete event for the European electronic system and test community. A leading world conference and exhibition, DATE unites 2,000 professionals with some 60 exhibiting companies, cutting edge R&D, industrial designers and technical managers from around the world.

  • 2011 Design, Automation & Test in Europe Conference & Exhibition (DATE 2011)

    DATE is the complete event for the European electronic system and test community. A world leading conference and exhibition, DATE unites 2,000 professionals with some 60 exhibiting companies, cutting edge R&D, industrial designers and technical managers from around the world.

  • 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010)

    All aspects of research into technologies for electronic and (embedded) systems engineering. It covers the design process, test, and tools for design automation of electronic products ranging from integrated circuits to distributed large-scale systems.

  • 2009 Design, Automation & Test in Europe Conference & Exhibition (DATE 2009)

    The Design, Automation, and Test in Europe (DATE) conference is the world's premier conference dedicated to electronics system design & test. The technical programme features: Four distinctive and integrated themes, covering all aspects of systems design and engineering. Two special days are focusing on SoC Development Strategies and Multicore Applications.

  • 2008 Design, Automation & Test in Europe Conference & Exhibition (DATE 2008)

    The 11th DATE conference and exhibition is the main European event bringing together designers and design automation users, researchers and vendors, as well as specialists in the hardware and software design, test and manufacturing of electronic circuits and systems. It puts strong emphasis on ICs/SoCs, reconfigurable hardware and embedded systems, including embedded software. The five-day event consists of a conference with plenary invited papers, regular papers, panels, hot-topic sessions, tutorials.

  • 2007 Design, Automation & Test in Europe Conference & Exhibition (DATE 2007)

    DATE is the main European event bringing together designers and design automation users, researchers and vendors, as well as specialists in the hardware and software design, test and manufacturing of electronic circuits and systems. It puts strong emphasis on both ICs/SoCs, reconfigurable hardware and embedded systems, including embedded software.

  • 2006 Design, Automation & Test in Europe Conference & Exhibition (DATE 2006)

  • 2005 Design, Automation & Test in Europe Conference & Exhibition (DATE)

  • 2004 Design, Automation & Test in Europe Conference & Exhibition (DATE)

  • 2003 Design, Automation & Test in Europe Conference & Exhibition (DATE)

  • 2002 Design, Automation & Test in Europe Conference & Exhibition (DATE)

  • 2001 Design, Automation & Test in Europe Conference & Exhibition (DATE)

  • 2000 Design, Automation & Test in Europe Conference & Exhibition (DATE)

  • 1999 Design, Automation & Test in Europe Conference & Exhibition (DATE)


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Periodicals related to Flash memory

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Circuits and Systems for Video Technology, IEEE Transactions on

Video A/D and D/A, display technology, image analysis and processing, video signal characterization and representation, video compression techniques and signal processing, multidimensional filters and transforms, analog video signal processing, neural networks for video applications, nonlinear video signal processing, video storage and retrieval, computer vision, packet video, high-speed real-time circuits, VLSI architecture and implementation for video technology, multiprocessor systems--hardware and software-- ...


Circuits and Systems II: Express Briefs, IEEE Transactions on

Part I will now contain regular papers focusing on all matters related to fundamental theory, applications, analog and digital signal processing. Part II will report on the latest significant results across all of these topic areas.


Communications Letters, IEEE

Covers topics in the scope of IEEE Transactions on Communications but in the form of very brief publication (maximum of 6column lengths, including all diagrams and tables.)


Communications, IEEE Transactions on

Telephone, telegraphy, facsimile, and point-to-point television, by electromagnetic propagation, including radio; wire; aerial, underground, coaxial, and submarine cables; waveguides, communication satellites, and lasers; in marine, aeronautical, space and fixed station services; repeaters, radio relaying, signal storage, and regeneration; telecommunication error detection and correction; multiplexing and carrier techniques; communication switching systems; data communications; and communication theory. In addition to the above, ...


Components and Packaging Technologies, IEEE Transactions on

Component parts, hybrid microelectronics, materials, packaging techniques, and manufacturing technology.


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Xplore Articles related to Flash memory

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Effect of substrate bias on the performance and reliability of the split-gate source-side injected flash memory

[{u'author_order': 1, u'affiliation': u'Dept. of Electr. Eng., Nat. Cheng Kung Univ., Tainan, Taiwan', u'full_name': u'Kuo-Ching Huang'}, {u'author_order': 2, u'full_name': u'Yean-Kuen Fang'}, {u'author_order': 3, u'full_name': u'Dun-Nian Yaung'}, {u'author_order': 4, u'full_name': u'Chii-Wen Chen'}, {u'author_order': 5, u'full_name': u'Hung-Cheng Sung'}, {u'author_order': 6, u'full_name': u'Di-Son Kuo'}, {u'author_order': 7, u'full_name': u'C.S. Wang'}, {u'author_order': 8, u'full_name': u'Mong-Song Liang'}] IEEE Electron Device Letters, 1999

The effects of the substrate bias on the characteristics of split-gate EEPROM/Flash memory cells have been investigated. It is experimentally demonstrated that applying negative substrate bias (NSB) can improve the programming and erasing speed significantly. The improvements can be attributed that NSB effectively increase the needed electrical fields for fast programming and erasing, respectively. Furthermore, the cycling endurance is improved ...


A 3.42 /spl mu/m/sup 2/ Flash Memory Cell Technology Conformable to a Sector Erase

[{u'author_order': 1, u'affiliation': u'Hitachi Device Engineering Co., Japan', u'full_name': u'H. Kume'}, {u'author_order': 2, u'full_name': u'T. Tanaka'}, {u'author_order': 3, u'full_name': u'T. Adachi'}, {u'author_order': 4, u'full_name': u'N. Miyamoto'}, {u'author_order': 5, u'full_name': u'S. Saeki'}, {u'author_order': 6, u'full_name': u'Y. Ohji'}, {u'author_order': 7, u'full_name': u'M. Ushiyama'}, {u'author_order': 8, u'full_name': u'T. Kobayashi'}, {u'author_order': 9, u'full_name': u'T. Nishida'}, {u'author_order': 10, u'full_name': u'Y. Kawamoto'}, {u'author_order': 11, u'full_name': u'K. Seki'}] 1991 Symposium on VLSI Technology, 1991

None


Split-gate NAND flash memory at 120nm technology node featuring fast programming and erase

[{u'author_order': 1, u'affiliation': u'PowerChip Semicond. Corp., Hsin-Chu, Taiwan', u'full_name': u'Cheng-Yuan Hsu'}, {u'author_order': 2, u'affiliation': u'PowerChip Semicond. Corp., Hsin-Chu, Taiwan', u'full_name': u'Chi-Wei Hung'}, {u'author_order': 3, u'affiliation': u'PowerChip Semicond. Corp., Hsin-Chu, Taiwan', u'full_name': u'Da Sung'}, {u'author_order': 4, u'affiliation': u'PowerChip Semicond. Corp., Hsin-Chu, Taiwan', u'full_name': u'Chi-Shan Wu'}, {u'author_order': 5, u'affiliation': u'PowerChip Semicond. Corp., Hsin-Chu, Taiwan', u'full_name': u'S.C. Chen'}, {u'author_order': 6, u'affiliation': u'PowerChip Semicond. Corp., Hsin-Chu, Taiwan', u'full_name': u'H.H. Kuo'}, {u'author_order': 7, u'affiliation': u'PowerChip Semicond. Corp., Hsin-Chu, Taiwan', u'full_name': u'J.Y. Pan'}, {u'author_order': 8, u'affiliation': u'PowerChip Semicond. Corp., Hsin-Chu, Taiwan', u'full_name': u'C.L. Chen'}, {u'author_order': 9, u'affiliation': u'PowerChip Semicond. Corp., Hsin-Chu, Taiwan', u'full_name': u'I.C. Chuang'}, {u'author_order': 10, u'affiliation': u'PowerChip Semicond. Corp., Hsin-Chu, Taiwan', u'full_name': u'V. Huang'}, {u'author_order': 11, u'affiliation': u'PowerChip Semicond. Corp., Hsin-Chu, Taiwan', u'full_name': u'C.C. Hsue'}, {u'author_order': 12, u'full_name': u'D.-T. Fan'}, {u'author_order': 13, u'full_name': u'Jung-Chang Lu'}, {u'author_order': 14, u'full_name': u'C.Y.-S. Cho'}, {u'author_order': 15, u'full_name': u'K. Tseng'}, {u'author_order': 16, u'full_name': u'A. Hsu'}, {u'author_order': 17, u'full_name': u'B. Sheen'}, {u'author_order': 18, u'full_name': u'P. Tuntasood'}, {u'author_order': 19, u'full_name': u'Chiou-Feng Chen'}] Digest of Technical Papers. 2004 Symposium on VLSI Technology, 2004., 2004

For the first time, split-gate NAND flash memory featuring interpoly erase and mid-channel programming is demonstrated at 120nm technology node. The cell array operates at single polarity voltages lower than 12V. Erase and programming can be accomplished in 0.5ms and 10/spl mu/s, respectively.


Stress-induced leakage current of tunnel oxide derived from flash memory read-disturb characteristics

[{u'author_order': 1, u'affiliation': u'Microelectron. Eng. Lab., Toshiba Corp., Yokohama, Japan', u'full_name': u'S. Satoh'}, {u'author_order': 2, u'full_name': u'G. Hemink'}, {u'author_order': 3, u'full_name': u'K. Hatakeyama'}, {u'author_order': 4, u'full_name': u'S. Aritome'}] IEEE Transactions on Electron Devices, 1998

This paper describes the characteristics of the stress-induced leakage current of tunnel oxide derived from flash memory read-disturb characteristics. The following three items were newly observed. First, the threshold voltage shift (/spl Delta/V/sub th/) of the memory cell under the gate bias condition (read disturb condition) consists of two regions, a decay region and a steady-state region. The decay region ...


Observations of single electron trapping/detrapping events in tunnel oxide of SuperFlash/spl trade/ memory cell

[{u'author_order': 1, u'affiliation': u'Silicon Storage Technol. Inc., Sunnyvale, CA, USA', u'full_name': u'Y. Tkachev'}, {u'author_order': 2, u'affiliation': u'Silicon Storage Technol. Inc., Sunnyvale, CA, USA', u'full_name': u'Xian Liu'}, {u'author_order': 3, u'affiliation': u'Silicon Storage Technol. Inc., Sunnyvale, CA, USA', u'full_name': u'A. Kotov'}, {u'author_order': 4, u'affiliation': u'Silicon Storage Technol. Inc., Sunnyvale, CA, USA', u'full_name': u'V. Markov'}, {u'author_order': 5, u'affiliation': u'Silicon Storage Technol. Inc., Sunnyvale, CA, USA', u'full_name': u'A. Levi'}] Proceedings. 2004 IEEE Computational Systems Bioinformatics Conference, 2004

Erase instabilities and erase performance degradation due to single-electron trapping events in tunnel oxide of SST split-gate SuperFlash/spl trade/ memory cells have been detected and analyzed for the first time. Whereas the instabilities of erase characteristics in stacked-gate flash memories ("erratic erase") are attributed to hole trapping/detrapping associated with anode hole injection, SuperFlash/spl trade/ cell does not show any hole- ...


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IEEE-USA E-Books

  • Nanomanufacturing for Electronics or Optoelectronics

    Artefacts in widespread use in electronic and optoelectronic systems have been manufactured by low‐cost, high‐volume processes. This chapter reviews recent progress and lack of progress on manufacturability of several nanoscale systems using the criteria: tunnel devices, split‐gate transistors/quantum point contacts, and other nanoscale systems. For any real‐world applications, such as in charge pumps for quantum metrology or specific quantum information processing systems, one needs a strategy to narrow the standard deviation of the device parameters. Of the attributes specific to manufacturability, reproducibility needs further improvement, simple simulations are available, and reliability and service life can be inferred from earlier cryogenic experiments. There are many examples of papers working on the new forms of carbon, fullerenes, nanotubes, and graphene, but these are still in the realms of one‐offs in terms of individual or few devices, or very small and primitive integrated circuits. The same applies to other quasi‐monolayer electron systems.



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