Flash memory

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Flash memory is a non-volatile computer storage chip that can be electrically erased and reprogrammed. (Wikipedia.org)






Conferences related to Flash memory

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2020 Joint Conference of the IEEE International Frequency Control Symposium and International Symposium on Applications of Ferroelectrics (IFCS-ISAF)

Ferroelectric materials and applications


2018 14th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT)

Process & Device Technologies1. Channel Engineering2. High-k/Metal gate Technology3. Advanced Source/Drain Technology4. Interconnect Technology5. Advanced 3D Integration6. Novel Process Technologies7. Ultra-Thin Body Transistors and Device Variability8. Advanced High-k Metal Gate SoC and High Performance CMOS Platforms 9. CMOS Performance Enhancing and Novel Devices 10. Advanced FinFETs and Nanowire FETs11. CNT, MTJ Devices and Nanowire Photodiodes12. Low- Power and Steep Slope Switching Devices13. Graphene Devices14. Advanced Technologies for Ge MOSFETs15. Organic semiconductor devices and technologies16. Compound semiconductor devices and Technology 17. Ultra High Speed Transistors, HEMT/HBT etc. 18. Advanced Power Devices and Reliability19. Flash Memory20. IT Magnetic RAM21. Resistive RAM

  • 2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT)

    Process & Device Technologies1. Channel Engineering2. High-k/Metal gate Technology3. Advanced Source/Drain Technology4. Interconnect Technology5. Advanced 3D Integration6. Novel Process Technologies7. Ultra-Thin Body Transistors and Device Variability8. Advanced High-k Metal Gate SoC and High Performance CMOS Platforms 9. CMOS Performance Enhancing and Novel Devices 10. Advanced FinFETs and Nanowire FETs11. CNT, MTJ Devices and Nanowire Photodiodes12. Low- Power and Steep Slope Switching Devices13. Graphene Devices14. Advanced Technologies for Ge MOSFETs15. Organic semiconductor devices and technologies16. Compound semiconductor devices and Technology 17. Ultra High Speed Transistors, HEMT/HBT etc. 18. Advanced Power Devices and Reliability19. Flash Memory20. IT Magnetic RAM21. Resistive RAMs22. Phase Change Memory23. 3-Dimensional Memory24. MEMS Technology25. Thin Film Transistors26. Biosensors27. PV and Energy Harvesting28. Front End of Line (FEOL) R

  • 2014 IEEE 12th International Conference on Solid -State and Integrated Circuit Technology (ICSICT)

    Process & Device Technologies1. Channel Engineering2. High-k/Metal gate Technology3. Advanced Source/Drain Technology4. Interconnect Technology5. Advanced 3D Integration6. Novel Process Technologies7. Ultra-Thin Body Transistors and Device Variability8. Advanced High-k Metal Gate SoC and High Performance CMOS Platforms 9. CMOS Performance Enhancing and Novel Devices 10. Advanced FinFETs and Nanowire FETs11. CNT, MTJ Devices and Nanowire Photodiodes12. Low- Power and Steep Slope Switching Devices13. Graphene Devices14. Advanced Technologies for Ge MOSFETs15. Organic semiconductor devices and technologies16. Compound semiconductor devices and Technology 17. Ultra High Speed Transistors, HEMT/HBT etc. 18. Advanced Power Devices and Reliability19. Flash Memory20. IT Magnetic RAM21. Resistive RAMs22. Phase Change Memory23. 3-Dimensional Memory24. MEMS Technology25. Thin Film Transistors26. Biosensors27. PV and Energy Harvesting28. Front End of Line (FEOL) R

  • 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology (ICSICT)

    Silicon IC, Silicon/germanium devices , Interconnect , Low K and High Kdielectric , Advance Memories , nano -electronics, Organic and Compound semiconductor devices ,sensors and MEMS, Semiconductor material erization, Reliability , Modeling and simulation,Packaging and testing , Digital, Analog, Mixed Signal IC and SOC design technology,Low -power, RF devices & circuits, ICCAD

  • 2010 IEEE 10th International Conference on Solid-State and Integrated Circuit Technology (ICSICT)

    Silicon IC, Silicon/germanium devices , Interconnect , Low K and High K dielectric , Advance Memories , nano-electronics, Organic and Compound semiconductor devices , sensors and MEMS, Semiconductor material characterization, Reliability , Modeling and simulation, Packaging and testing , Digital, Analog, Mixed Signal IC and SOC design technology,Low-power, RF devices & circuits, IC CAD .

  • 2008 9th International Conference on Solid-State and Integrated-Circuit Technology (ICSICT)

  • 2006 8th International Conference on Solid-State and Integrated-Circuit Technology (ICSICT)

  • 2004 7th International Conference on Solid-State and Integrated-Circuit Technology (ICSICT)


2018 31st International Conference on VLSI Design and 2018 17th International Conference on Embedded Systems (VLSID)

This conference is a forum for researchers and designers to present and discuss various aspects of VLSI design, EDA, embedded systems, and enabling technologies. The program will consist of regular paper sessions, special sessions, embedded tutorials, panel discussions, design contest, industrial exhibits and tutorials. This is the premier conference/exhibition in this area in India, attracting designers, EDA professionals, and EDA tool users. The program committee for the conference has a significant representation from the EDA research community and a large fraction of the papers published in this conference are EDA-related


2018 Annual Reliability and Maintainability Symposium (RAMS)

Scope:Tutorials and original papers on reliability, maintainability, safety, risk management, and logistics


2018 Design, Automation & Test in Europe Conference & Exhibition (DATE)

The DATE conference addresses all aspects of research into technologies for electronic and embedded system engineering. It covers the design process, test, and automation tools for electronics ranging from integrated circuits to distributed embedded systems. This includes both hardware and embedded software design issues. The conference scope also includes the elaboration of design requirements and new architectures for challenging application fields such as telecoms, wireless communications, multimedia, healthcare, smart energy and automotive systems. Companies also present innovative industrial designs to foster the feedback fromrealworld design to research. DATE also hosts a number of special sessions, events within the main technical programme such as panels, hot-topic sessions, tutorials and workshops technical programme such as panels, hot-topic sessions, tutorials and workshops.

  • 2017 Design, Automation & Test in Europe Conference & Exhibition (DATE)

    The DATE conference addresses all aspects of research into technologies for electronic and embedded system engineering. It covers the design process, test, and automation tools for electronics ranging from integrated circuits to distributed embedded systems. This includes both hardware and embedded software design issues. The conference scope also includes the elaboration of design requirements and new architectures for challenging application fields such as telecoms, wireless communications, multimedia, healthcare, smart energy and automotive systems. Companies also present innovative industrial designs to foster the feedback fromrealworld design to research. DATE also hosts a number of special sessions, events within the main technical programme such as panels, hot-topic sessions, tutorials and workshops technical programme such as panels, hot-topic sessions, tutorials and workshops.

  • 2016 Design, Automation & Test in Europe Conference & Exhibition (DATE)

    The DATE conference addresses all aspects of research into technologies for electronic andembedded system engineering. It covers the design process, test, and automation tools forelectronics ranging from integrated circuits to distributed embedded systems. This includes bothhardware and embedded software design issues. The conference scope also includes theelaboration of design requirements and new architectures for challenging application fields suchas telecoms, wireless communications, multimedia, healthcare, smart energy and automotivesystems. Companies also present innovative industrial designs to foster the feedback from realworlddesign to research. DATE also hosts a number of special sessions, events within the maintechnical programme such as panels, hot-topic sessions, tutorials and workshops technical programme such as panels, hot-topic sessions, tutorials and workshops

  • 2015 Design, Automation & Test in Europe Conference & Exhibition (DATE)

    The DATE conference addresses all aspects of research into technologies for electronic and embedded system engineering. It covers the design process, test, and automation tools for electronics ranging from integrated circuits to distributed embedded systems. This includes both hardware and embedded software design issues. The conference scope also includes the elaboration of design requirements and new architectures for challenging application fields such as telecoms, wireless communications, multimedia, healthcare, smart energy and automotive systems. Companies also present innovative industrial designs to foster the feedback from realworld design to research. DATE also hosts a number of special sessions, events within the main technical programme such as panels, hot-topic sessions, tutorials and workshops.

  • 2014 Design, Automation & Test in Europe Conference & Exhibition (DATE)

    The DATE conference addresses all aspects of research into technologies for electronic and embedded system engineering. It covers the design process, test, and automation tools for electronics ranging from integrated circuits to distributed embedded systems. This includes both hardware and embedded software design issues. The conference scope also includes the elaboration of design requirements and new architectures for challenging application fields such as telecoms, wireless communications, multimedia, healthcare, smart energy and automotive systems. Companies also present innovative industrial designs to foster the feedback from real-world design to research. DATE also hosts a number of special sessions, events within the main technical programme such as panels, hot-topic sessions, tutorials and workshops

  • 2013 Design, Automation & Test in Europe Conference & Exhibition (DATE 2013)

    DATE is the complete event for the European electronic and test community. A leading world conference and exhibition, DATE unites 2,000 professionals with approximately 60 exhibiting companies, cutting edge R&D, industrial designers and technical managers from around the world.

  • 2012 Design, Automation & Test in Europe Conference & Exhibition (DATE 2012)

    DATE is the complete event for the European electronic system and test community. A leading world conference and exhibition, DATE unites 2,000 professionals with some 60 exhibiting companies, cutting edge R&D, industrial designers and technical managers from around the world.

  • 2011 Design, Automation & Test in Europe Conference & Exhibition (DATE 2011)

    DATE is the complete event for the European electronic system and test community. A world leading conference and exhibition, DATE unites 2,000 professionals with some 60 exhibiting companies, cutting edge R&D, industrial designers and technical managers from around the world.

  • 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010)

    All aspects of research into technologies for electronic and (embedded) systems engineering. It covers the design process, test, and tools for design automation of electronic products ranging from integrated circuits to distributed large-scale systems.

  • 2009 Design, Automation & Test in Europe Conference & Exhibition (DATE 2009)

    The Design, Automation, and Test in Europe (DATE) conference is the world's premier conference dedicated to electronics system design & test. The technical programme features: Four distinctive and integrated themes, covering all aspects of systems design and engineering. Two special days are focusing on SoC Development Strategies and Multicore Applications.

  • 2008 Design, Automation & Test in Europe Conference & Exhibition (DATE 2008)

    The 11th DATE conference and exhibition is the main European event bringing together designers and design automation users, researchers and vendors, as well as specialists in the hardware and software design, test and manufacturing of electronic circuits and systems. It puts strong emphasis on ICs/SoCs, reconfigurable hardware and embedded systems, including embedded software. The five-day event consists of a conference with plenary invited papers, regular papers, panels, hot-topic sessions, tutorials.

  • 2007 Design, Automation & Test in Europe Conference & Exhibition (DATE 2007)

    DATE is the main European event bringing together designers and design automation users, researchers and vendors, as well as specialists in the hardware and software design, test and manufacturing of electronic circuits and systems. It puts strong emphasis on both ICs/SoCs, reconfigurable hardware and embedded systems, including embedded software.

  • 2006 Design, Automation & Test in Europe Conference & Exhibition (DATE 2006)

  • 2005 Design, Automation & Test in Europe Conference & Exhibition (DATE)

  • 2004 Design, Automation & Test in Europe Conference & Exhibition (DATE)

  • 2003 Design, Automation & Test in Europe Conference & Exhibition (DATE)

  • 2002 Design, Automation & Test in Europe Conference & Exhibition (DATE)

  • 2001 Design, Automation & Test in Europe Conference & Exhibition (DATE)

  • 2000 Design, Automation & Test in Europe Conference & Exhibition (DATE)

  • 1999 Design, Automation & Test in Europe Conference & Exhibition (DATE)


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Periodicals related to Flash memory

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Circuits and Systems for Video Technology, IEEE Transactions on

Video A/D and D/A, display technology, image analysis and processing, video signal characterization and representation, video compression techniques and signal processing, multidimensional filters and transforms, analog video signal processing, neural networks for video applications, nonlinear video signal processing, video storage and retrieval, computer vision, packet video, high-speed real-time circuits, VLSI architecture and implementation for video technology, multiprocessor systems--hardware and software-- ...


Circuits and Systems II: Express Briefs, IEEE Transactions on

Part I will now contain regular papers focusing on all matters related to fundamental theory, applications, analog and digital signal processing. Part II will report on the latest significant results across all of these topic areas.


Communications Letters, IEEE

Covers topics in the scope of IEEE Transactions on Communications but in the form of very brief publication (maximum of 6column lengths, including all diagrams and tables.)


Communications, IEEE Transactions on

Telephone, telegraphy, facsimile, and point-to-point television, by electromagnetic propagation, including radio; wire; aerial, underground, coaxial, and submarine cables; waveguides, communication satellites, and lasers; in marine, aeronautical, space and fixed station services; repeaters, radio relaying, signal storage, and regeneration; telecommunication error detection and correction; multiplexing and carrier techniques; communication switching systems; data communications; and communication theory. In addition to the above, ...


Components and Packaging Technologies, IEEE Transactions on

Component parts, hybrid microelectronics, materials, packaging techniques, and manufacturing technology.


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Most published Xplore authors for Flash memory

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Xplore Articles related to Flash memory

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A high-performance NAND and PRAM hybrid storage design for consumer electronic devices

[{u'author_order': 1, u'affiliation': u'Samsung Advanced Institute of Technology, Samsung Electronics Co. LTD., Giheung, Korea', u'full_name': u'Hyung Gyu Lee'}, {u'author_order': 2, u'affiliation': u'Samsung Advanced Institute of Technology, Samsung Electronics Co. LTD., Giheung, Korea', u'full_name': u'Seungwoo Ryu'}] 2010 Digest of Technical Papers International Conference on Consumer Electronics (ICCE), None

This paper presents a high performance storage solution for CE devices. The proposed storage consists of NAND flash memory and PRAM device. By the complementary use of two memory devices, we dramatically enhance the performance and life-time of NAND flash-based storage.


Data retention after heavy ion exposure of floating gate memories: analysis and simulation

[{u'author_order': 1, u'affiliation': u'Inst. Nazionale di Fisica della Materia, Modena & Reggio Emilia Univ., Italy', u'full_name': u'L. Larcher'}, {u'author_order': 2, u'full_name': u'G. Cellere'}, {u'author_order': 3, u'full_name': u'A. Paccagnella'}, {u'author_order': 4, u'full_name': u'A. Chimenton'}, {u'author_order': 5, u'full_name': u'A. Candelori'}, {u'author_order': 6, u'full_name': u'A. Modelli'}] IEEE Transactions on Nuclear Science, 2003

Floating gate (FG) memories are the most important of current nonvolatile memory technologies. We are investigating the long-term retention issues in advanced Flash memory technologies submitted to heavy ion irradiation. Long tails appear in threshold voltage distribution of cells hit by ions after they have been reprogrammed. This phenomenon is more pronounced in devices with smaller gate area. Results are ...


A Data Mining Based Approach to Electronic Part Obsolescence Forecasting

[{u'author_order': 1, u'full_name': u'Peter A. Sandborn'}, {u'author_order': 2, u'full_name': u'Frank Mauro'}, {u'author_order': 3, u'full_name': u'Ron Knox'}] IEEE Transactions on Components and Packaging Technologies, 2007

Many technologies have life cycles that are shorter than the life cycle of the product they are in. Life cycle mismatches caused by the obsolescence of technology (and particularly the obsolescence of electronic parts) results in high sustainment costs for long field life systems, e.g., avionics and military systems. This paper demonstrates the use of data mining based algorithms to ...


A new 4-phase charge pump without body effects for low supply voltages

[{u'author_order': 1, u'affiliation': u'Dept. of Electr. Eng., Nat. Chung-Hsing Univ., Taichung, Taiwan', u'full_name': u'Hongchin Lin'}, {u'author_order': 2, u'affiliation': u'Dept. of Electr. Eng., Nat. Chung-Hsing Univ., Taichung, Taiwan', u'full_name': u'JainHao Lu'}, {u'author_order': 3, u'full_name': u'Yen-Tai Lin'}] Proceedings. IEEE Asia-Pacific Conference on ASIC,, None

A new four-phase charge pumping circuit for low supply voltages using 0.6 μm triple-well CMOS technology to generate high negative boosted voltages is presented. With the new substrate connected technique, the influence of threshold voltage (-0.94 V) is minimized and the body effect is almost eliminated. A five-stage charge pump can efficiently pump lower than -7 V at supply voltage ...


Program, erase and retention times of thin-oxide Flash-EEPROMs

[{u'author_order': 1, u'affiliation': u"Dipt. di Ingegneria dell'Inf., Univ. degli studi di Pisa, Italy", u'full_name': u'G. Iannaccone'}, {u'author_order': 2, u'full_name': u'S. Gennai'}] 7th International Workshop on Computational Electronics. Book of Abstracts. IWCE (Cat. No.00EX427), None

The purpose of this work is the simulation of program, erase, and retention times of thin-oxide Flash EEPROMs, in which the floating gate is charged through Fowler-Nordheim (FN) or direct tunneling.


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IEEE.tv Videos

The Memory of Cars Talk by Tom Coughlin
What's New in Storage Devices - Jim Gathman from IBM
ISSCC 2012 - Eli Harari Plenary
From Edge To Core: Memory-Driven Hardware and Software Co-Design - IEEE Rebooting Computing Industry Summit 2017
Improved Deep Neural Network Hardware Accelerators Based on Non-Volatile-Memory: the Local Gains Technique: IEEE Rebooting Computing 2017
Towards Logic-in-Memory circuits using 3D-integrated Nanomagnetic Logic - Fabrizio Riente: 2016 International Conference on Rebooting Computing
IMS 2011 Microapps - Memory Effects in RF Circuits: Definition, Manifestations and Fast, Accurate Simulation
Analog to Digital Types
Impact of Linearity and Write Noise of Analog Resistive Memory: IEEE Rebooting Computing 2017
High-Bandwidth Memory Interface Design
Array storing and retrieval
Robotics History: Narratives and Networks Oral Histories: Barbara Hayes Roth
Rajiv V. Joshi - 2018 Daniel E. Noble Award for Emerging Technologies at IEEE ISSCC
Neural Cognitive Robot: Learning, Memory and Intelligence
Jaynie Shorb from Broadcom at WIE ILC 2016
IEEE Medal of Honor Recipient (2009): Dr. Robert Dennard
Accelerating Machine Learning with Non-Volatile Memory: Exploring device and circuit tradeoffs - Pritish Narayanan: 2016 International Conference on Rebooting Computing
IEEE Expert Now
Rebooting Computing Panel - Stan Williams: 2016 Technology Time Machine
Erasing Logic-Memory Boundaries in Superconductor Electronics - Vasili Semenov: 2016 International Conference on Rebooting Computing

IEEE-USA E-Books

  • Nand Flash Memory Devices

    The most important requirement for NAND flash memory is a low bit cost. This chapter discusses the NAND flash memory cell and its scaling technologies. Requirements for isolation in NAND flash memory cell are more severe than other devices due to high-voltage operation during programming. Therefore, it was difficult to scale down of local oxidation of silicon (LOCOS) isolation width beyond 1.5-?>m width due to boron diffusion from isolation bottom by LOCOS oxidation process. Then, a new field through implantation (FTI) process was developed. Next, the self-aligned shallow trench isolation cell (SA-STI cell) with floating gate (FG) wing had been developed. The chapter presents the planar FG cell and also discusses the side wall transfer-transistor (SWATT) cell as alternate memory cell technology for a multilevel NAND flash memory cell. Finally, it presents other advanced NAND flash device technologies.

  • Principle of Nand Flash Memory

    This chapter shows the single-cell architecture of NAND flash memory. One NAND string consists of 32 series-connected stacked gate memory transistors and two select gate transistors. The scaling of a high-voltage transistor (HV Tr) is one of the important challenges for NAND flash memories. Several program and erase schemes were considered to use a NAND flash memory product in early stage of development. There are several program boosting schemes for multilevel NAND flash cells. The first one is a conventional selfboosting (SB) scheme. The second one is a local self-boosting scheme. The third one is the erase-area self-boosting scheme (EASB). EASB was widely used for multilevel cell (MLC) to obtain a higher boosting voltage. In order to relax high electric field, the self-boosting scheme is becoming a more advanced and complicated scheme for each generation of NAND flash memory.

  • Challenges Of Three-Dimensional Nand Flash Memory

    This chapter introduces several types of three-dimensional (3D) NAND flash memory cells. It first addresses the challenges of 3D NAND flash memory and discusses data retention issues. The data retention characteristic of SONOS cell has problems of quick charge loss and large Vt shift in retention bake because of charge detrapping through thinner tunnel oxide. The chapter presents the analysis results of program disturb in 3D NAND cells. The program disturb mechanisms of 3D NAND cells are much different from that of 2D NAND cells, because cell structure and array architecture are totally changed. The cell current is much decreased in the 3D NAND cell, because channel material is changed from crystal Si (substrate Si) to poly-Si. The chapter describes the new structure of the peripheral circuit under cell array. Finally, it discusses the future trend of the 3D NAND cell.

  • Reliability Of Nand Flash Memory

    Reliability of NAND flash memory is more interesting than that of other semiconductor devices. Program and erase of NAND flash perform by electron injection and emission to/from floating gate (FG). There are several methods of electron injection and emission. For electron injection, there are two methods, namely channel hot electron (CHE) injection and Fowler-Nordheim tunneling (FN-t) injection. Data retention is degraded by electron and hole traps in tunnel oxide. Detrapping of trapped charges in tunnel oxide is a major root cause of Vt shift during the data retention test. Read disturb failure is mainly caused in the erase state after program/erase cycling stress. The stress-induced leakage current (SILC), which is generated by program/erase cycling stress, is major root cause for the read-disturb phenomena. The mechanism of erratic over program is considered to be an excess electron injection at hole trap sites in tunnel oxide.

  • Scaling Challenge Of Nand Flash Memory Cells

    This chapter discusses the scaling challenges of the NAND flash memory cell with a multilevel cell beyond 20-nm feature sizes. One important physical phenomenon is the floating-gate (FG) capacitive coupling interference that causes a Vt shift by programming neighbor cells. An increase in Vt distribution width will result in the degradation of read window margin (RWM). The other major physical phenomena to have an impact on RWM are electron injection spread (EIS) and random telegraph noise (RTN). Except for the RWM degradation, there are several other problems, such as control gate (CG) formations between FGs, the word line (WL) high-field problem, and reducing the number of stored electrons. The RWM of a self-aligned shallow trench isolation cell (SA-STI cell) is discussed for NAND flash memories over 2X to 0X-nm generations. The chapter also discusses several scaling problems and limitations over 2X to 0X-nm generations.

  • Prospects and Challenges of NextGeneration Flash Memory Devices

    This chapter contains sections titled: * Introduction * Scaling challenges * Technological innovations * Conclusions

  • Flash Memory Reliability

  • Embedded Flash Memory

  • Flash Memory Applications

  • PChannel Flash Memory Technology



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