Dynamic Memory

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Conferences related to Dynamic Memory

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2011 IEEE 17th International Symposium on High Performance Computer Architecture (HPCA)

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Processor, cache, memory, parallel, multicore, multiprocessor, power-efficient, reliable, secure, embedded, reconfigurable, heterogehous, network processor, interconnect and network interface, emerging, and/or high-performance architectures, Impact of technology on architecture, High-performance I/O systems, Hardware/software trade-offs, Impact of compilers and system software on architecture, Performance modeling, simulation, and projection techniques, applications.


2011 IEEE International Symposium on Parallel & Distributed Processing (IPDPS)

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IPDPS is an international forum for engineers and scientists from around the world to present their latest research findings in all aspects of parallel computation. In addition to technical sessions of submitted paper presentations, the meeting offers workshops, tutorials, and commercial presentations & exhibits. IPDPS represents a unique international gathering of computer scientists from around the world. Now, more than ever, we prize this annual meeting as a testament to the strength of international


2010 25th International Symposium on Computer and Information Sciences (ISCIS)

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Submitted papers can cover any relevant aspect of Computer Science and Engineering, but they should present a clear research contribution written in a clear and concise manner, with experimental evidence or theoretical developments and proofs that support the claims of the paper. The topics covered include (but are not limited) to Computer Architectures and Digital Systems, Algorithms, Theory, Software Engineering, Data Engineering, Computational Intelligence, System Security, Computer Systems and Netwo



Xplore Articles related to Dynamic Memory

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  • Evaluating Dynamics and Bottlenecks of Memory Collaboration in Cluster Systems

    Samih, A.; Ren Wang; Maciocco, C.; Tai, T.-Y.C.; Ronghui Duan; Jiangang Duan; Solihin, D. Cluster, Cloud and Grid Computing (CCGrid), 2012 12th IEEE/ACM International Symposium on, 2012

    With the fast development of highly-integrated distributed systems (cluster systems), designers face interesting memory hierarchy design choices while attempting to avoid the notorious disk swapping. Swapping to the free remote memory through Memory Collaboration has demonstrated its cost-effectiveness compared to over provisioning the cluster for peak load requirements. Recent memory collaboration studies propose several ways on accessing the under-utilized remote ...

  • Smart dynamic memory allocator for embedded systems

    Ramakrishna, M.; Jisung Kim; Woohyong Lee; Youngki Chung Computer and Information Sciences, 2008. ISCIS '08. 23rd International Symposium on, 2008

    Dynamic memory (DM) allocation is one of the most crucial components of modern software engineering. It offers a greatest flexibility to the software systemspsila design; nevertheless, developers of real-time systems often avoid using dynamic memory allocation due to its problems like unbounded or long bounded response time and memory fragmentation. However, the modern complex applications like multimedia streaming and network ...

  • SafeMem: exploiting ECC-memory for detecting memory leaks and memory corruption during production runs

    Feng Qin; Lu, S.; Yuanyuan Zhou High-Performance Computer Architecture, 2005. HPCA-11. 11th International Symposium on, 2005

    Memory leaks and memory corruption are two major forms of software bugs that severely threaten system availability and security. According to the US-CERT vulnerability notes database, 68% of all reported vulnerabilities in 2003 were caused by memory leaks or memory corruption. Dynamic monitoring tools, such as the state-of-the-art Purify, are commonly used to detect memory leaks and memory corruption. However, ...

  • Reducing memory accesses with a system-level design methodology in customized dynamic memory management

    Atienza, D.; Mamagkakis, S.; Catthoor, F.; Mendias, J.M.; Soudris, D. Embedded Systems for Real-Time Multimedia, 2004. ESTImedia 2004. 2nd Workshop on, 2004

    Currently, portable consumer embedded devices are increasing more and more their capabilities and can now implement new algorithms (e.g. multimedia and wireless protocols) that a few years ago were reserved only for powerful workstations. Unfortunately, the original design characteristics of such applications do not often allow to port them directly in current embedded devices. These applications share complex and intensive ...

  • Hardware support for real-time embedded multiprocessor system-on-a-chip memory management

    Shalan, M.; Mooney, V.J. Hardware/Software Codesign, 2002. CODES 2002. Proceedings of the Tenth International Symposium on, 2002

    The aggressive evolution of the semiconductor industry smaller process geometries, higher densities, and greater chip complexity - has provided design engineers the means to create complex, high-performance Systems-on-a-Chip (SoC) designs. Such SoC designs typically have more than one processor and huge memory, all on the same chip. Dealing with the global onchip memory allocation/de-allocation in a dynamic yet deterministic way ...

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Jobs related to Dynamic Memory

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IMEC Resident Advanced Memory Engineer Qualcomm, Inc.
Thermo Dynamic Engineer BRP US Inc.
Memory Architect Qualcomm, Inc.
Memory IO/SI Engineer Qualcomm, Inc.
SRAM Embedded Memory Designer Qualcomm, Inc.
Dynamic Systems and Controls Engineer Rolls Royce
Mask Layout Design Manager - Memory Qualcomm, Inc.
Memory Characterization & Compiler Engineer Qualcomm, Inc.
One-Time-Programmable/Non-Volatile Memory Circuit Design Engineer Qualcomm, Inc.
Non-Volatile Memory Circuit Designer - New College Grad Freescale
Digital Design Verification Engineer - Memory Coherence, Austin, TX Qualcomm, Inc.
System Memory Management Unit (SMMU) Verification Engineer - Raleigh, NC (RTP) Qualcomm, Inc.
Network-on-Chip and Memory Hierarchy Performance Model Developer - Raleigh, NC (RTP) Qualcomm, Inc.
Hardware Platform Architect Qualcomm, Inc.
Embedded Software Engineer - Processor Architecture Evolution (Qualcomm Research San Diego) Qualcomm, Inc.
SoC Architect Qualcomm, Inc.
Electrical Engineer I - Hardware Design Engineer Dell
Electrical Engineer II - Hardware Design Engineer Dell
Lead Datapath Circuit Designer Qualcomm, Inc.
LLVM Compiler Engineer, Austin, TX Qualcomm, Inc.
Software Engineer (Qualcomm Research San Diego) Qualcomm, Inc.
Quantitative Computational HPC Developer Quantlab Financial
Mixed Signal ASIC Architect Engineer for Advanced User Interfaces Qualcomm, Inc.
Senior System Architect - ASICS (Qualcomm Research San Diego) Qualcomm, Inc.
Embedded System Software Engineer Qualcomm, Inc.

Educational Resources on Dynamic Memory

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  • Effects of Reliability Mechanisms On VLSI Circuit Functionality

    Ellis, Wayne Effects of Reliability Mechanisms On VLSI Circuit Functionality, 2004

    This tutorial discusses examples of reliability mechanisms and how these can affect the normal operation of selected VLSI circuits. Large circuit-count ASIC chips use standard digital and analog circuits such as Logic gates, eSRAM, eDRAM and I/O circuits which must function properly under various voltage and thermal environments. These chips are subjected to Reliability Screens such as Burn In to ...

  • Type-2 Fuzzy Logic Controllers: Towards a New Approach for Handling Uncertainties in Real World Environments

    Hagras, Hani Type-2 Fuzzy Logic Controllers: Towards a New Approach for Handling Uncertainties in Real World Environments, 2008

    This course will have a large impact on a large audience as handling uncertainties will be a very important challenge to any real world application that operate in real world changing and dynamic environments. The course will present the theoretical aspects of type-2 FLCs and how to build a type-2 FLC. The course will also present many applications in different ...


Standards related to Dynamic Memory

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No standards are currently tagged "Dynamic Memory"


Periodicals related to Dynamic Memory

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  • Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on

    Methods, algorithms, and human-machine interfaces for physical and logical design, including: planning, synthesis, partitioning, modeling, simulation, layout, verification, testing, and documentation of integrated-circuit and systems designs of all complexities. Practical applications of aids resulting in producible analog, digital, optical, or microwave integrated circuits are emphasized.