Dynamic voltage scaling
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DAC Description for TMRF The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading
2013 IEEE International Symposium on Low Power Electronics and Design (ISLPED)
technology, architecture, circuits, tools, systems, software and applications
A-SSCC 2012 is an international forum for presenting the most updated and advanced chips and circuit designs in solid-state and semiconductor fields.
Methods, algorithms, and human-machine interfaces for physical and logical design, including: planning, synthesis, partitioning, modeling, simulation, layout, verification, testing, and documentation of integrated-circuit and systems designs of all complexities. Practical applications of aids resulting in producible analog, digital, optical, or microwave integrated circuits are emphasized.
Fundamental technologies used in the control and conversion of electric power. Topics include dc-to- dc converter design, direct off-line switching power supplies, inverters, controlled rectifiers, control techniques, modeling, analysis and simulation techniques, the application of power circuit components (power semiconductors, magnetics, capacitors), and thermal performance of electronic power systems.
The IEEE Journal of Solid-State Circuits publishes papers each month in the broad area of solid-state circuits with particular emphasis on transistor-level design of integrated circuits. It also provides coverage of topics such as device modeling, technology, systems design, layout, and testing that relate directly to IC design. Integrated circuits and VLSI are of principal interest; material related to discrete ...
Integrated circuits and systems;VLSI based Architecture and applications; highspeed circuits and interconnect; mixed-signal SoC; speed/area/power/noise tradeoffs in CMOS circuits.
Gupta, V.; Singh, M. Green Computing Conference (IGCC), 2013 International, 2013
Dynamic voltage scaling is a technique for lowering energy consumption in microelectronic systems when the performance required is at times lower than the system's peak capability. This paper proposes a new voltage scaling technique for asynchronous systems which allows fine-grain scaling of supply voltage, i.e. each stage in the pipeline is allowed to scale its voltage independently. Instead of applying ...
Seokwoo Lee; Das, S.; Pham, T.; Austin, T.; Blaauw, D.; Mudge, T. Low Power Electronics and Design, 2004. ISLPED '04. Proceedings of the 2004 International Symposium on, 2004
The quadratic relationship between voltage and energy has made dynamic voltage scaling (DVS) one of the most powerful techniques to reduce system power demands. Recently, techniques such as Razor DVS, voltage overscaling, and intelligent energy management have emerged as approaches to further reduce voltage by eliminating costly voltage margins inserted into traditional designs to ensure always-correct operation. The degree to ...
Kejiu Zhang; Shiguo Luo; Wu, T.X.; Batarseh, I. Power Electronics, IEEE Transactions on, 2014
This paper comprehensively investigates the power-related issues and introduces new control schemes in dynamic voltage scaling (DVS), which is now used in modern multi-core processor and multiprocessor system-on-chip to reduce operational voltage under light load conditions. With the aggressive motivation to boost dynamic power efficiency, the design specification of voltage transition (dv/dt) for the DVS is pushing the physical limitation ...
Andrei, A.; Schmitz, M.; Eles, P.; Zebo Peng; Al Hashimi, B.M. Computer Aided Design, 2004. ICCAD-2004. IEEE/ACM International Conference on, 2004
We propose a new technique for the combined voltage scaling of processors and communication links, taking into account dynamic as well as leakage power consumption. The voltage scaling technique achieves energy efficiency by simultaneously scaling the supply and body bias voltages in the case of processors and buses with repeaters, while energy efficiency on fat wires is achieved through dynamic ...
Bo Zhai; Blaauw, D.; Sylvester, D.; Flautner, K. Very Large Scale Integration (VLSI) Systems, IEEE Transactions on, 2005
Dynamic voltage scaling (DVS) is a popular approach for energy reduction of integrated circuits. Current processors that use DVS typically have an operating voltage range from full to half of the maximum V/sub dd/. However, there is no fundamental reason why designs cannot operate over a much larger voltage range: from full V/sub dd/ to subthreshold voltages. This possibility raises ...
Ellis, Wayne Effects of Reliability Mechanisms On VLSI Circuit Functionality, 2004
This tutorial discusses examples of reliability mechanisms and how these can affect the normal operation of selected VLSI circuits. Large circuit-count ASIC chips use standard digital and analog circuits such as Logic gates, eSRAM, eDRAM and I/O circuits which must function properly under various voltage and thermal environments. These chips are subjected to Reliability Screens such as Burn In to ...
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