Dynamic voltage scaling
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The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.
2013 IEEE International Symposium on Low Power Electronics and Design (ISLPED)
technology, architecture, circuits, tools, systems, software and applications
A-SSCC 2012 is an international forum for presenting the most updated and advanced chips and circuit designs in solid-state and semiconductor fields.
Methods, algorithms, and human-machine interfaces for physical and logical design, including: planning, synthesis, partitioning, modeling, simulation, layout, verification, testing, and documentation of integrated-circuit and systems designs of all complexities. Practical applications of aids resulting in producible analog, digital, optical, or microwave integrated circuits are emphasized.
Fundamental technologies used in the control and conversion of electric power. Topics include dc-to- dc converter design, direct off-line switching power supplies, inverters, controlled rectifiers, control techniques, modeling, analysis and simulation techniques, the application of power circuit components (power semiconductors, magnetics, capacitors), and thermal performance of electronic power systems.
The IEEE Journal of Solid-State Circuits publishes papers each month in the broad area of solid-state circuits with particular emphasis on transistor-level design of integrated circuits. It also provides coverage of topics such as device modeling, technology, systems design, layout, and testing that relate directly to IC design. Integrated circuits and VLSI are of principal interest; material related to discrete ...
Integrated circuits and systems;VLSI based Architecture and applications; highspeed circuits and interconnect; mixed-signal SoC; speed/area/power/noise tradeoffs in CMOS circuits.
Joshi, G.; Jardosh, S.; Ranjan, P. Wireless Communication and Sensor Networks, 2007. WCSN '07. Third International Conference on, 2007
Wireless communication is the most energy expensive operation for energy constrained wireless sensor networks. Dynamic modulation scaling (DMS) is a technique useful for optimizing transmission energy with respect to number of packets that need to be transmitted at that particular time intervals. In general, DMS trades off transmission energy against transmission delays. Multilevel (M-ary) modulation is the key aspect for ...
Bilavarn, S.B.; Belleudy, C.; Auguin, M.; Dupont, T.; Fouilliart, A.M. Digital System Design Architectures, Methods and Tools, 2008. DSD '08. 11th EUROMICRO Conference on, 2008
The intent of the recent H.264/AVC standard is to provide high quality video at low bit-rates and work effectively on a wide variety of networks and systems. A promising application is video broadcasting on mobile terminals butin practice, increased processing power and power management are required for embedded systems. In this paper, we consider an embedded multiprocessor to answer these ...
Azizi, N.; Khellah, M.M.; De, V.K.; Najm, F.N. Very Large Scale Integration (VLSI) Systems, IEEE Transactions on, 2007
We present a new methodology which takes into consideration the effect of within-die (WID) process variations on a low-voltage parallel system. We show that in the presence of process variations one should use a higher supply voltage than would otherwise be predicted to minimize the power consumption of a parallel systems. Previous analyses, which ignored WID process variations, provide a ...
Perigny, R.; Un-Ku Moon; Temes, G. Circuits and Systems, 2001. ISCAS 2001. The 2001 IEEE International Symposium on, 2001
This paper describes the operation of three types of charge pump circuits. Power efficiency theory of charge pumps is discussed. A method of estimating the output ripple of a charge pump from the size of the capacitors used is described. A new charge pump circuit that uses two cascoded buffer transistors to improve the area efficiency is proposed
Bishop, Stanley R. Nuclear Science, IEEE Transactions on, 1966
A logarithmic amplifier is described which has a dynamic range of 6 decades of input current (from 10-13 to 10-7 A) while maintaining very good logarithmic response (output voltage deviates less than ±1% from a logarithmic function). A high degree of temperature stability is also achieved (total offset less than ±2% of full scale voltage over ambient temperature range from ...
Ellis, Wayne Effects of Reliability Mechanisms On VLSI Circuit Functionality, 2004
This tutorial discusses examples of reliability mechanisms and how these can affect the normal operation of selected VLSI circuits. Large circuit-count ASIC chips use standard digital and analog circuits such as Logic gates, eSRAM, eDRAM and I/O circuits which must function properly under various voltage and thermal environments. These chips are subjected to Reliability Screens such as Burn In to ...
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